m255
K4
z2
13
!s112 1.1
!i10d 8192
!i10e 25
!i10f 100
cModel Technology
Z0 dD:/PCIE/IAP_IGL2/PCIE_IAP/simulation
vAXI_MASTER_TO_SLAVE
Z1 !s110 1461767013
!i10b 1
!s100 >AA=Zn0izm>[E?`RcQzI23
IoG8CXDh[mKajWghj]EN183
Z2 VDg1SIo80bB@j0V0VzS_@n1
Z3 dD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/simulation
w1418851769
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/AXI_MASTER_TO_SLAVE.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/AXI_MASTER_TO_SLAVE.v
Z4 L0 21
Z5 OW;L;10.4c;61
r1
!s85 0
31
Z6 !s108 1461767013.000000
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/AXI_MASTER_TO_SLAVE.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/AXI_MASTER_TO_SLAVE.v|
!s101 -O0
!i113 1
Z7 o-work presynth -O0
Z8 !s92 +incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core -work presynth -O0
n@a@x@i_@m@a@s@t@e@r_@t@o_@s@l@a@v@e
vController
R1
!i10b 1
!s100 gTNO=0g24KMP]Hkg:fKnz2
I0;1Jf37=b?6mECc3JA;M[1
R2
R3
w1430233721
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/Controller.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/Controller.v
Z9 L0 23
R5
r1
!s85 0
31
R6
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/Controller.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/Controller.v|
!s101 -O0
!i113 1
R7
R8
n@controller
vCoreConfigP
Z10 !s110 1461767017
!i10b 1
!s100 NC@o4lVhJKc>5][eOzz[e1
IoKeQ>3T]`jSKETT<N^l?22
R2
R3
w1421767000
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreConfigP/7.0.105/rtl/vlog/core/coreconfigp.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreConfigP/7.0.105/rtl/vlog/core/coreconfigp.v
L0 22
R5
r1
!s85 0
31
Z11 !s108 1461767017.000000
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreConfigP/7.0.105/rtl/vlog/core/coreconfigp.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreConfigP/7.0.105/rtl/vlog/core/coreconfigp.v|
!s101 -O0
!i113 1
R7
R8
n@core@config@p
vCoreResetP
Z12 !s110 1461767015
!i10b 1
!s100 GNO^jQOff>hR9=b6B2heR1
Ie2^HcWOnf]f793RgEn[DW1
R2
R3
Z13 w1455528335
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreResetP/7.0.104/rtl/vlog/core/coreresetp.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreResetP/7.0.104/rtl/vlog/core/coreresetp.v
R9
R5
r1
!s85 0
31
Z14 !s108 1461767015.000000
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreResetP/7.0.104/rtl/vlog/core/coreresetp.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreResetP/7.0.104/rtl/vlog/core/coreresetp.v|
!s101 -O0
!i113 1
R7
R8
n@core@reset@p
vcoreresetp_pcie_hotreset
R12
!i10b 1
!s100 Io@TN_8VJ[8aKmHaHh9@j1
I[B]nhZ0AdKIo`>[_IK3630
R2
R3
R13
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreResetP/7.0.104/rtl/vlog/core/coreresetp_pcie_hotreset.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreResetP/7.0.104/rtl/vlog/core/coreresetp_pcie_hotreset.v
Z15 L0 31
R5
r1
!s85 0
31
R14
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreResetP/7.0.104/rtl/vlog/core/coreresetp_pcie_hotreset.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/Actel/DirectCore/CoreResetP/7.0.104/rtl/vlog/core/coreresetp_pcie_hotreset.v|
!s101 -O0
!i113 1
R7
R8
vDEBOUNCE
R1
!i10b 1
!s100 jFnMg<l45ZOknYO_@7:T52
IMWN?F[_JGQT0jfVeie18H3
R2
R3
w1418787366
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/Debounce.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/Debounce.v
Z16 L0 20
R5
r1
!s85 0
31
R6
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/Debounce.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/Debounce.v|
!s101 -O0
!i113 1
R7
R8
n@d@e@b@o@u@n@c@e
vHOTRESET
R10
!i10b 1
!s100 YKXFfcNH3kT^A3CZ@RPOk2
IK?=1_<Ejm?^W2hbaL=TzW2
R2
R3
w1424024671
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/HOTRESET.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/HOTRESET.v
R15
R5
r1
!s85 0
31
R11
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/HOTRESET.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/HOTRESET.v|
!s101 -O0
!i113 1
R7
R8
n@h@o@t@r@e@s@e@t
vIAP
R12
!i10b 1
!s100 f6bRliM3Gechf>OiT=Jz@0
IRa3AkNJ02QYlF;[YDG7B_1
R2
R3
w1430233745
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/IAP/IAP.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/IAP/IAP.v
L0 9
R5
r1
!s85 0
31
R14
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/IAP/IAP.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/IAP/IAP.v|
!s101 -O0
!i113 1
R7
R8
n@i@a@p
vIAP_CTRL
Z17 !s110 1461767014
!i10b 1
!s100 ;J_4ni:`^[0f=D<1<z7Zl0
Iehb@5@9ag=FlYb@7ncc@70
R2
R3
w1432663126
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/IAP_CTRL/IAP_CTRL.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/IAP_CTRL/IAP_CTRL.v
L0 9
R5
r1
!s85 0
31
!s108 1461767014.000000
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/IAP_CTRL/IAP_CTRL.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/IAP_CTRL/IAP_CTRL.v|
!s101 -O0
!i113 1
R7
R8
n@i@a@p_@c@t@r@l
vIAP_INIT
R17
!i10b 1
!s100 <O]EXYbfSffOXW?eMFeLZ1
Ik0RIWXcPQY0<7nML_;2I=0
R2
R3
w1430233728
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/IAP_INIT.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/IAP_INIT.v
R9
R5
r1
!s85 0
31
R6
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/IAP_INIT.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/IAP_INIT.v|
!s101 -O0
!i113 1
R7
R8
n@i@a@p_@i@n@i@t
vLSRAM_TAMPER
!s110 1461761685
!i10b 1
!s100 zid`FH>WCG`EfjQ0J9zA52
II2iWDdNUnJ=OWeG[:<5CH1
R2
Z18 dD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/simulation
w1428235516
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/LSRAM_TAMPER.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/LSRAM_TAMPER.v
L0 9
R5
r1
!s85 0
31
!s108 1461761685.000000
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/LSRAM_TAMPER.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/LSRAM_TAMPER.v|
!s101 -O0
!i113 1
R7
Z19 !s92 +incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core -work presynth -O0
n@l@s@r@a@m_@t@a@m@p@e@r
vLSRAM_TAMPER_TAMPER_0_TAMPER
Z20 !s110 1461761684
!i10b 1
!s100 lj9fN?H;kUIDU26SMAN203
I[21Oe=<]::SIzH3@;1aY:0
R2
R18
w1428235510
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/TAMPER_0/LSRAM_TAMPER_TAMPER_0_TAMPER.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/TAMPER_0/LSRAM_TAMPER_TAMPER_0_TAMPER.v
L0 5
R5
r1
!s85 0
31
Z21 !s108 1461761684.000000
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/TAMPER_0/LSRAM_TAMPER_TAMPER_0_TAMPER.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/TAMPER_0/LSRAM_TAMPER_TAMPER_0_TAMPER.v|
!s101 -O0
!i113 1
R7
R19
n@l@s@r@a@m_@t@a@m@p@e@r_@t@a@m@p@e@r_0_@t@a@m@p@e@r
vLSRAM_TAMPER_TPSRAM_0_TPSRAM
R20
!i10b 1
!s100 Sblkl[lPEij<UAiX_M^9b2
I1L>:ZA7H4zlOaBTh^]>aF2
R2
R18
w1428235515
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/TPSRAM_0/LSRAM_TAMPER_TPSRAM_0_TPSRAM.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/TPSRAM_0/LSRAM_TAMPER_TPSRAM_0_TPSRAM.v
L0 5
R5
r1
!s85 0
31
R21
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/TPSRAM_0/LSRAM_TAMPER_TPSRAM_0_TPSRAM.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/LSRAM_TAMPER/TPSRAM_0/LSRAM_TAMPER_TPSRAM_0_TPSRAM.v|
!s101 -O0
!i113 1
R7
R19
n@l@s@r@a@m_@t@a@m@p@e@r_@t@p@s@r@a@m_0_@t@p@s@r@a@m
vPCIe_AXI_IF
R12
!i10b 1
!s100 PE>HAih_Kg2Gbn77hO7d[3
IB@^<LN7b5PSlXUindTzhn0
R2
R3
w1418851802
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/PCIe_AXI_IF.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/PCIe_AXI_IF.v
R4
R5
r1
!s85 0
31
R14
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/PCIe_AXI_IF.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/PCIe_AXI_IF.v|
!s101 -O0
!i113 1
R7
R8
n@p@c@ie_@a@x@i_@i@f
vPCIE_IAP
Z22 !s110 1461767019
!i10b 1
!s100 ?zd4zkF_ci7UV=Nl:LgXV1
IV[_Na6ZVBo1hWSLFF4MBH2
R2
R3
w1461766983
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP/PCIE_IAP.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP/PCIE_IAP.v
L0 9
R5
r1
!s85 0
31
Z23 !s108 1461767019.000000
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP/PCIE_IAP.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP/PCIE_IAP.v|
!s101 -O0
!i113 1
R7
R8
n@p@c@i@e_@i@a@p
vPCIE_IAP_sb
R10
!i10b 1
!s100 5`V1543igGVli[le=6H2a1
IiFoEPmOA9hEhe`Jbm>5:>1
R2
R3
Z24 w1461761477
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/PCIE_IAP_sb.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/PCIE_IAP_sb.v
L0 9
R5
r1
!s85 0
31
R11
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/PCIE_IAP_sb.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/PCIE_IAP_sb.v|
!s101 -O0
!i113 1
R7
R8
n@p@c@i@e_@i@a@p_sb
vPCIE_IAP_sb_CCC_0_FCCC
Z25 !s110 1461767016
!i10b 1
!s100 Nno:EHOJQ>JKDoQidYIGW3
I=OEfRblV4N;Ye7If5Z_Jg0
R2
R3
w1461761472
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/CCC_0/PCIE_IAP_sb_CCC_0_FCCC.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/CCC_0/PCIE_IAP_sb_CCC_0_FCCC.v
L0 5
R5
r1
!s85 0
31
R14
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/CCC_0/PCIE_IAP_sb_CCC_0_FCCC.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/CCC_0/PCIE_IAP_sb_CCC_0_FCCC.v|
!s101 -O0
!i113 1
R7
R8
n@p@c@i@e_@i@a@p_sb_@c@c@c_0_@f@c@c@c
vPCIE_IAP_sb_FABOSC_0_OSC
R25
!i10b 1
!s100 SDi=TN1e2]B0cN1oU^:UH0
IV7Q0YSGm@JlPI6C8iULO63
R2
R3
R24
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/FABOSC_0/PCIE_IAP_sb_FABOSC_0_OSC.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/FABOSC_0/PCIE_IAP_sb_FABOSC_0_OSC.v
L0 5
R5
r1
!s85 0
31
Z26 !s108 1461767016.000000
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/FABOSC_0/PCIE_IAP_sb_FABOSC_0_OSC.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb/FABOSC_0/PCIE_IAP_sb_FABOSC_0_OSC.v|
!s101 -O0
!i113 1
R7
R8
n@p@c@i@e_@i@a@p_sb_@f@a@b@o@s@c_0_@o@s@c
vPCIE_IAP_sb_HPMS
R25
!i10b 1
!s100 iJ;M>@8figE`4NX7zQ_?F0
Ih16;Vb;LbTHmk`5jd?DkU2
R2
R3
w1461761467
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb_HPMS/PCIE_IAP_sb_HPMS.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb_HPMS/PCIE_IAP_sb_HPMS.v
L0 9
R5
r1
!s85 0
31
R26
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb_HPMS/PCIE_IAP_sb_HPMS.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP_sb_HPMS/PCIE_IAP_sb_HPMS.v|
!s101 -O0
!i113 1
R7
R8
n@p@c@i@e_@i@a@p_sb_@h@p@m@s
vPCIE_IAP_SERDES_IF2_0_SERDES_IF2
!s110 1418995833
!i10b 1
!s100 8cn;15b>F_dWaK6a::L<n2
IzK2^9QU`HVRa19lCeYhVj0
V`JN@9S9cnhjKRR_L]QIcM3
R0
w1418984159
8D:/PCIE/IAP_IGL2/PCIE_IAP/component/work/PCIE_IAP/SERDES_IF2_0/PCIE_IAP_SERDES_IF2_0_SERDES_IF2.v
FD:/PCIE/IAP_IGL2/PCIE_IAP/component/work/PCIE_IAP/SERDES_IF2_0/PCIE_IAP_SERDES_IF2_0_SERDES_IF2.v
L0 5
OW;L;10.3c;59
r1
!s85 0
31
!s108 1418995833.432000
!s107 D:/PCIE/IAP_IGL2/PCIE_IAP/component/work/PCIE_IAP/SERDES_IF2_0/PCIE_IAP_SERDES_IF2_0_SERDES_IF2.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/PCIE_IAP/component/work/PCIE_IAP/SERDES_IF2_0/PCIE_IAP_SERDES_IF2_0_SERDES_IF2.v|
!s101 -O0
!i113 1
R7
!s92 +incdir+D:/PCIE/IAP_IGL2/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core -work presynth -O0
n@p@c@i@e_@i@a@p_@s@e@r@d@e@s_@i@f2_0_@s@e@r@d@e@s_@i@f2
vPCIE_IAP_SERDES_IF_0_SERDES_IF
R12
!i10b 1
!s100 2^S5N?F>4C:G4@DEPSM;63
IB:2cWQb1L:0D2?5HZJ^o`2
R2
R3
w1461766979
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP/SERDES_IF_0/PCIE_IAP_SERDES_IF_0_SERDES_IF.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP/SERDES_IF_0/PCIE_IAP_SERDES_IF_0_SERDES_IF.v
L0 5
R5
r1
!s85 0
31
R14
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP/SERDES_IF_0/PCIE_IAP_SERDES_IF_0_SERDES_IF.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/PCIE_IAP/SERDES_IF_0/PCIE_IAP_SERDES_IF_0_SERDES_IF.v|
!s101 -O0
!i113 1
R7
R8
n@p@c@i@e_@i@a@p_@s@e@r@d@e@s_@i@f_0_@s@e@r@d@e@s_@i@f
vRam_intferface
R20
!i10b 1
!s100 PAlKHCKS[[JM9EGamel6P1
I:I:kA;lRkS[JkWkS[RO7D2
R2
R18
w1428235357
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/hdl/Ram_interface.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/hdl/Ram_interface.v
R16
R5
r1
!s85 0
31
R21
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/hdl/Ram_interface.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP_igl2/hdl/Ram_interface.v|
!s101 -O0
!i113 1
R7
R19
n@ram_intferface
vSERDES_INIT
R22
!i10b 1
!s100 zKdP2900KMnf:EjPU[_B<2
IAicbD2]>_0kjHeC[DdW;d2
R2
R3
Z27 w1432663622
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/SERDES_INIT.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/SERDES_INIT.v
L0 9
R5
r1
!s85 0
31
R23
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/SERDES_INIT.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/SERDES_INIT.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t
vSERDES_INIT_COREABC_0_ACMTABLE
R10
!i10b 1
!s100 ]:[Rlk@koQTlA8XgnAoLV3
IzMMhBBXcD;^nR6cAYcQmb1
R2
R3
w1432663621
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/acmtable.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/acmtable.v
L0 24
R5
r1
!s85 0
31
R11
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/acmtable.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/acmtable.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t_@c@o@r@e@a@b@c_0_@a@c@m@t@a@b@l@e
vSERDES_INIT_COREABC_0_COREABC
R22
!i10b 1
!s100 9^fPEk?h1G=:_BK;h?MgQ3
I0I]^jW=XW3cM[nTEgd9GW0
R2
R3
R27
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/coreabc.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/coreabc.v
Z28 FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/support.v
L0 46
R5
r1
!s85 0
31
R23
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/support.v|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/coreabc.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/coreabc.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t_@c@o@r@e@a@b@c_0_@c@o@r@e@a@b@c
vSERDES_INIT_COREABC_0_DEBUGBLK
R10
!i10b 1
!s100 6WQ9mz:?fec?VGY4mhIFl0
IGHd8c84AkodjMc3^:J20`2
R2
R3
R27
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/debugblk.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/debugblk.v
R28
Z29 L0 25
R5
r1
!s85 0
31
R11
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/support.v|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/debugblk.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/debugblk.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t_@c@o@r@e@a@b@c_0_@d@e@b@u@g@b@l@k
vSERDES_INIT_COREABC_0_INSTRUCTIONS
Z30 !s110 1461767018
!i10b 1
!s100 J?IiY53Jo0?AkY7z:ZPcL3
IVmeU?ezh><hBfR^jlFc:=1
R2
R3
R27
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructions.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructions.v
R28
L0 26
R5
r1
!s85 0
31
R11
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/support.v|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructions.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructions.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t_@c@o@r@e@a@b@c_0_@i@n@s@t@r@u@c@t@i@o@n@s
vSERDES_INIT_COREABC_0_INSTRUCTNVM
R30
!i10b 1
!s100 AaX9N4ieFRfoXE?E::[>B1
INzmLYSG=Q9^JO>2S@L4[z0
R2
R3
R27
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructnvm_bb.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructnvm_bb.v
R28
R15
R5
r1
!s85 0
31
Z31 !s108 1461767018.000000
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/support.v|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructnvm_bb.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructnvm_bb.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t_@c@o@r@e@a@b@c_0_@i@n@s@t@r@u@c@t@n@v@m
vSERDES_INIT_COREABC_0_INSTRUCTRAM
R30
!i10b 1
!s100 QR:6O_?kdiSX0Q1]O;?XE0
IX=Pf<VQS>9CcRVlMog__m1
R2
R3
R27
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructram.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructram.v
Z32 L0 27
R5
r1
!s85 0
31
R31
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructram.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/instructram.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t_@c@o@r@e@a@b@c_0_@i@n@s@t@r@u@c@t@r@a@m
vSERDES_INIT_COREABC_0_IRAM512X9
R30
!i10b 1
!s100 P6=lI:Yk0Rf@`@^5bjR5O2
I9=]CKgTT]YL>5?XNjcW1f3
R2
R3
R27
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/iram512x9_rtl.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/iram512x9_rtl.v
R32
R5
r1
!s85 0
31
R31
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/iram512x9_rtl.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/iram512x9_rtl.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t_@c@o@r@e@a@b@c_0_@i@r@a@m512@x9
vSERDES_INIT_COREABC_0_RAM128X8
R30
!i10b 1
!s100 AJYHOBJRLXMWe>giCkD6`1
IEhJL=zFOWKXFl<0QI93@60
R2
R3
R27
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram128x8_smartfusion2.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram128x8_smartfusion2.v
R9
R5
r1
!s85 0
31
R31
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram128x8_smartfusion2.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram128x8_smartfusion2.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t_@c@o@r@e@a@b@c_0_@r@a@m128@x8
vSERDES_INIT_COREABC_0_RAM256X16
R30
!i10b 1
!s100 ESjf_7G?>@ZYS<^5fX]=43
I3gP;jP:UQl3Ode0n2H8T=1
R2
R3
R27
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram256x16_rtl.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram256x16_rtl.v
R16
R5
r1
!s85 0
31
R31
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram256x16_rtl.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram256x16_rtl.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t_@c@o@r@e@a@b@c_0_@r@a@m256@x16
vSERDES_INIT_COREABC_0_RAM256X8
R30
!i10b 1
!s100 4z5o<mcXYL=d^l>V7ESO92
IlWRhca;];gZ:`7ARo;9O42
R2
R3
R27
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram256x8_rtl.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram256x8_rtl.v
R16
R5
r1
!s85 0
31
R31
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram256x8_rtl.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ram256x8_rtl.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t_@c@o@r@e@a@b@c_0_@r@a@m256@x8
vSERDES_INIT_COREABC_0_RAMBLOCKS
R30
!i10b 1
!s100 CZQBeFn1NLdzRgS^Mk]8`3
IeCiKWigdMFd=joEe;G=NF0
R2
R3
R27
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ramblocks.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ramblocks.v
R29
R5
r1
!s85 0
31
R31
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ramblocks.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core/ramblocks.v|
!s101 -O0
!i113 1
R7
R8
n@s@e@r@d@e@s_@i@n@i@t_@c@o@r@e@a@b@c_0_@r@a@m@b@l@o@c@k@s
vSPI_Erase
R12
!i10b 1
!s100 joW_B_zek[D8zHC69AFnh3
I0zH`VZEjU[MYm19EG8hal0
R2
R3
w1418851796
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/SPI_Erase.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/SPI_Erase.v
R16
R5
r1
!s85 0
31
R14
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/SPI_Erase.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/SPI_Erase.v|
!s101 -O0
!i113 1
R7
R8
n@s@p@i_@erase
vSPI_PROGRAM
R12
!i10b 1
!s100 lS9jDh@m^T_2JH;c5YV:b1
I1>CnMO0<NDbd8hM7=ISd53
R2
R3
w1418851790
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/SPI_PROGRAM.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/SPI_PROGRAM.v
R16
R5
r1
!s85 0
31
R14
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/SPI_PROGRAM.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/hdl/SPI_PROGRAM.v|
!s101 -O0
!i113 1
R7
R8
n@s@p@i_@p@r@o@g@r@a@m
vtestbench
R22
!i10b 1
!s100 i[g=O>V56HX:zjW>2j<Yn0
Iki2JJ:]:Zf8SLQDz@zI>82
R2
R3
w1418852092
8D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/stimulus/testbench.v
FD:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/stimulus/testbench.v
R4
R5
r1
!s85 0
31
R23
!s107 D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/stimulus/testbench.v|
!s90 -reportprogress|300|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core|+incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/stimulus|-work|presynth|D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/stimulus/testbench.v|
!s101 -O0
!i113 1
R7
!s92 +incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/component/work/SERDES_INIT/COREABC_0/rtl/vlog/core +incdir+D:/PCIE/IAP_IGL2/010/11.7/PCIE_IAP/stimulus -work presynth -O0
