
*******************************************
       Libero SoC, MSS and IP Core VERSIONS
*******************************************

This design was tested with the following: 
	Libero SoC Version: 11.7
	System Builder Version: 1.0	
	CORERESETP Version:7.0.104 
	CoreConfigP Version: 7.0.105	
	SERDES_IF Version: 1.2.210
	Chip Oscillators: 2.0.101
	CCC Version: 2.0.200		

******************************************
     DESIGN FILE DIRECTORY STRUCTURE
******************************************

m2gl_dg0681_liberov11p7_df
    |
    |
    |---libero
    |      |
    |      |--PCIE_IAP.rar
    |	   
    |---pcie_driver
    |      |
    |      |--Drivers_64bitOS
    |      	|
    |      	|--PCIe_Demo.rar
    |
    |---sample_programming_files
    |      |
    |      |--iap_envm_only.spi
    |      |
    |      |--iap_fabric_and_envm.spi
    |      |
    |      |--iap_fabric_only.spi
    |      |
    |      |--pcie_iap.spi
    |      |
    |      |--fabric_and_envm.rar
    |      |
    |      |--LSARM_Workaround
    |	        |
    |       	|--PCIe_IAP_Tamper.rar
    |           |    
    |	        |--PCIe_IAP_top_Tamper.spi
    |
    |---staple_programming_file
    |      |
    |      |--pcie_iap.stp
    |
    |
    |---Readme.txt
    



LiberoProject
========
For reference, the final Libero SoC Verilog project of this demo is given under this folder.
The designs are created for IGLOO2 010 Evaluation Kit with Rev1 silicon.

pcie_driver
==================================
This folder consists the 64-bit Windows OS based Host PC drivers for IGLOO2 PCIe Demo 

sample_programming_files
============================
This folder consists the sample IAP programming files for IGLOO2 010 Evaluation Kit
This folder contains the design files with  workaround for accessing LSRAM after IAP or ISP program 
operation
staple_programming_file
============================
This folder consists the programming file for IGLOO2.