• PCIe_HPDMA_top_syn (synthesis)
  • Synthesis -
    • Compiler Report
    • Compiler Constraint Applicator
    • Pre-mapping Report
      • Clock Summary
    • Mapper Report
      • Clock Conversion
      • Timing Report
        • Performance Summary
        • Clock Relationships
        • Interface Information
        • Detailed Report for Clocks
          • Clock: PCIe_HPDMA_0.CCC_0.GL0_net
            • Starting Points with Worst Slack
            • Ending Points with Worst Slack
            • Worst Path Information
          • Clock: PCIe_HPDMA_0.CCC_0.GL3_net
            • Starting Points with Worst Slack
            • Ending Points with Worst Slack
            • Worst Path Information
          • Clock: PCIe_HPDMA_FABOSC_0_OSC|N_RCOSC_25_50MHZ_CLKOUT_inferred_clock
            • Starting Points with Worst Slack
            • Ending Points with Worst Slack
            • Worst Path Information
          • Clock: PCIe_HPDMA_HPMS|FIC_2_APB_M_PCLK_inferred_clock
            • Starting Points with Worst Slack
            • Ending Points with Worst Slack
            • Worst Path Information
      • Resource Utilization
    • Constraint Checker Report (07:28 22-Apr)
    • Hierarchical Area Report(PCIe_HPDMA_top) (15:04 22-Feb)
  • Session Log (20:54 22-Sep)