#--  Synopsys, Inc.
#--  Version J-2015.03M-SP1-2
#--  Project file F:\Microsemi_prj\IGL2_Standby_tutorial\Libero_project\IGL2_Standby\synthesis\run_options.txt
#--  Written on Thu Feb 18 15:59:27 2016


#project files
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/CNT_UP.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/CNT_UP269.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/LSRAM1Kx18.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/RA_CNT.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/WA_CNT.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/WE_CNT.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/WE_AD_GEN.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/MUXBUS.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/SIGN8x8_MULT.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/MULT11_LSRAM11.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/DFN1C0_18.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/shift_register.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/Fabric_Logic.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/component/work/IGL2_Standby/FCCC_0/IGL2_Standby_FCCC_0_FCCC.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/component/Actel/SgCore/OSC/2.0.101/osc_comps.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/component/work/IGL2_Standby/OSC_0/IGL2_Standby_OSC_0_OSC.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/hdl/Standby_Control.vhd"
add_file -vhdl -lib work "F:/Microsemi_prj/IGL2_Standby_tutorial/Libero_project/IGL2_Standby/component/work/IGL2_Standby/IGL2_Standby.vhd"



#implementation: "synthesis"
impl -add synthesis -type fpga

#device options
set_option -technology IGLOO2
set_option -part M2GL010T
set_option -package FBGA484
set_option -speed_grade -1
set_option -part_companion ""

#compilation/mapping options
set_option -use_fsm_explorer 0
set_option -top_module "work.IGL2_Standby"

# mapper_options
set_option -frequency 100.000
set_option -write_verilog 0
set_option -write_vhdl 0
set_option -srs_instrumentation 1

# actel_options
set_option -rw_check_on_ram 0

# Microsemi G4
set_option -run_prop_extract 1
set_option -maxfan 10000
set_option -clock_globalthreshold 2
set_option -async_globalthreshold 12
set_option -globalthreshold 5000
set_option -low_power_ram_decomp 0
set_option -disable_io_insertion 0
set_option -opcond COMTC
set_option -retiming 0
set_option -report_path 4000
set_option -update_models_cp 0
set_option -preserve_registers 0

# sequential_optimization_options
set_option -symbolic_fsm_compiler 1

# Compiler Options
set_option -compiler_compatible 0
set_option -resource_sharing 1

# Compiler Options
set_option -auto_infer_blackbox 0

#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_file "./IGL2_Standby.edn"
impl -active "synthesis"
