@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[31] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[30] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[29] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[28] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[27] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[26] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[25] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[24] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[23] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[22] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[21] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[20] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit CORECONFIGP_0.FIC_2_APB_M_PRDATA[19] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[6] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[4] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[2] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[0] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Register bit CORECONFIGP_0.paddr[16] (in view view:work.MDDR_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":546:4:546:9|Removing instance MDDR_Demo_top_0.MDDR_Demo_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[18] because it is equivalent to instance MDDR_Demo_top_0.MDDR_Demo_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[17]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigmaster\2.1.102\rtl\vlog\core\coreconfigmaster.v":723:4:723:9|Register bit HSIZE[2] (in view view:work.CoreConfigMaster_Z2(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Register bit arbRegSMCurrentState[12] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z5_1(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Register bit arbRegSMCurrentState[8] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z5_1(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Register bit arbRegSMCurrentState[4] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z5_1(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\uart_if\coreuart_0\rtl\vlog\core_obfuscated\tx_async.v":301:0:301:5|Register bit CUARTlI0l[4] (in view view:work.UART_IF_COREUART_0_Tx_async_0s_0s_0s_1s_2s_3s_4s_5s_6s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO161 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\uart_if\coreuart_0\rtl\vlog\core_obfuscated\rx_async.v":754:0:754:5|Register bit CUARTIOll[3] (in view view:work.UART_IF_COREUART_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)) is always 1. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\uart_if\coreuart_0\rtl\vlog\core_obfuscated\rx_async.v":754:0:754:5|Register bit CUARTIOll[2] (in view view:work.UART_IF_COREUART_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\uart_if\coreuart_0\rtl\vlog\core_obfuscated\rx_async.v":754:0:754:5|Register bit CUARTIOll[1] (in view view:work.UART_IF_COREUART_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\hdl\axi_if.v":93:0:93:5|Removing instance MDDR_Demo_top_0.AXI_IF_0.AWLEN[3] because it is equivalent to instance MDDR_Demo_top_0.AXI_IF_0.AWLEN[2]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\hdl\axi_if.v":93:0:93:5|Removing instance MDDR_Demo_top_0.AXI_IF_0.AWLEN[2] because it is equivalent to instance MDDR_Demo_top_0.AXI_IF_0.AWLEN[1]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\hdl\axi_if.v":93:0:93:5|Removing instance MDDR_Demo_top_0.AXI_IF_0.AWLEN[1] because it is equivalent to instance MDDR_Demo_top_0.AXI_IF_0.AWLEN[0]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\hdl\axi_if.v":220:0:220:5|Removing instance MDDR_Demo_top_0.AXI_IF_0.ARLEN[3] because it is equivalent to instance MDDR_Demo_top_0.AXI_IF_0.ARLEN[2]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\hdl\axi_if.v":220:0:220:5|Removing instance MDDR_Demo_top_0.AXI_IF_0.ARLEN[2] because it is equivalent to instance MDDR_Demo_top_0.AXI_IF_0.ARLEN[1]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\hdl\axi_if.v":220:0:220:5|Removing instance MDDR_Demo_top_0.AXI_IF_0.ARLEN[1] because it is equivalent to instance MDDR_Demo_top_0.AXI_IF_0.ARLEN[0]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[7] because it is equivalent to instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[11]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[3] because it is equivalent to instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[11]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[15] because it is equivalent to instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[11]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[14] because it is equivalent to instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[6]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[10] because it is equivalent to instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[6]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[9] because it is equivalent to instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[5]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: MT246 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\mddr_demo\ccc_0\mddr_demo_ccc_0_fccc.v":23:36:23:43|Blackbox CCC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results)
@W: MT447 :"c:/users/i63442/desktop/v12.6 updates/igloo2/dg0534_igl2_mddr_demo_df_1/final/m2gl_dg0534_df/libero_project/designer/top/synthesis.fdc":13:0:13:0|Timing constraint (from [get_cells { MDDR_Demo_top_0.MDDR_Demo_0.CORERESETP_0.MSS_HPMS_READY_int }] to [get_cells { MDDR_Demo_top_0.MDDR_Demo_0.CORERESETP_0.sm0_areset_n_rcosc MDDR_Demo_top_0.MDDR_Demo_0.CORERESETP_0.sm0_areset_n_rcosc_q1 }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design 
@W: MT447 :"c:/users/i63442/desktop/v12.6 updates/igloo2/dg0534_igl2_mddr_demo_df_1/final/m2gl_dg0534_df/libero_project/designer/top/synthesis.fdc":14:0:14:0|Timing constraint (from [get_cells { MDDR_Demo_top_0.MDDR_Demo_0.CORERESETP_0.MSS_HPMS_READY_int MDDR_Demo_top_0.MDDR_Demo_0.CORERESETP_0.SDIF*_PERST_N_re }] to [get_cells { MDDR_Demo_top_0.MDDR_Demo_0.CORERESETP_0.sdif*_areset_n_rcosc* }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design 
@W: MT447 :"c:/users/i63442/desktop/v12.6 updates/igloo2/dg0534_igl2_mddr_demo_df_1/final/m2gl_dg0534_df/libero_project/designer/top/synthesis.fdc":16:0:16:0|Timing constraint (through [get_pins { MDDR_Demo_top_0.MDDR_Demo_0.MDDR_Demo_HPMS_0.MSS_ADLIB_INST.CONFIG_PRESET_N }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design 
@W: MT447 :"c:/users/i63442/desktop/v12.6 updates/igloo2/dg0534_igl2_mddr_demo_df_1/final/m2gl_dg0534_df/libero_project/designer/top/synthesis.fdc":17:0:17:0|Timing constraint (through [get_pins { MDDR_Demo_top_0.MDDR_Demo_0.SYSRESET_POR.POWER_ON_RESET_N }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design 
