@N: MF916 |Option synthesis_strategy=base is enabled. 
@N: MF248 |Running in 64-bit mode.
@N: MF667 |Clock conversion disabled. (Command "set_option -fix_gated_and_generated_clocks 0" in the project file.)
@N: MO111 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\mddr_demo\fabosc_0\mddr_demo_fabosc_0_osc.v":20:7:20:16|Tristate driver XTLOSC_O2F (in view: work.MDDR_Demo_FABOSC_0_OSC(verilog)) on net XTLOSC_O2F (in view: work.MDDR_Demo_FABOSC_0_OSC(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\mddr_demo\fabosc_0\mddr_demo_fabosc_0_osc.v":19:7:19:16|Tristate driver XTLOSC_CCC (in view: work.MDDR_Demo_FABOSC_0_OSC(verilog)) on net XTLOSC_CCC (in view: work.MDDR_Demo_FABOSC_0_OSC(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\mddr_demo\fabosc_0\mddr_demo_fabosc_0_osc.v":18:7:18:20|Tristate driver RCOSC_1MHZ_O2F (in view: work.MDDR_Demo_FABOSC_0_OSC(verilog)) on net RCOSC_1MHZ_O2F (in view: work.MDDR_Demo_FABOSC_0_OSC(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\mddr_demo\fabosc_0\mddr_demo_fabosc_0_osc.v":17:7:17:20|Tristate driver RCOSC_1MHZ_CCC (in view: work.MDDR_Demo_FABOSC_0_OSC(verilog)) on net RCOSC_1MHZ_CCC (in view: work.MDDR_Demo_FABOSC_0_OSC(verilog)) has its enable tied to GND.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\uart_if\coreuart_0\rtl\vlog\core_obfuscated\rx_async.v":1339:0:1339:5|Removing sequential instance CUARTI0Il (in view: work.UART_IF_COREUART_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances.
@N: MO231 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\hdl\axi_if.v":93:0:93:5|Found counter in view:work.AXI_IF_0s_1s_2s_3s_0s_1s_2s_4294967292s_4294967293s_Z1(verilog) instance WDATA_int[63:0] 
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[16] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[17] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[18] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[19] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[20] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[21] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[22] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[23] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[24] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[25] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[26] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[27] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[28] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[29] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[30] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.pwdata[31] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.paddr[11] (in view: work.MDDR_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance CORECONFIGP_0.paddr[14] (in view: work.MDDR_Demo(verilog)) because it does not drive other instances.
@N: MO231 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigmaster\2.1.102\rtl\vlog\core\coreconfigmaster.v":723:4:723:9|Found counter in view:work.CoreConfigMaster_Z2(verilog) instance pause_count[4:0] 
@N: MF179 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigmaster\2.1.102\rtl\vlog\core\coreconfigmaster.v":573:21:573:46|Found 32 by 32 bit equality operator ('==') d_state152 (in view: work.CoreConfigMaster_Z2(verilog))
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v":79:4:79:9|Removing sequential instance masterDataInProg[3] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVESTAGE_0s_0_0_0(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v":79:4:79:9|Removing sequential instance masterDataInProg[2] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVESTAGE_0s_0_0_0(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v":79:4:79:9|Removing sequential instance masterDataInProg[1] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVESTAGE_0s_0_0_0(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: MO231 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":1613:4:1613:9|Found counter in view:work.CoreResetP_Z10(verilog) instance count_ddr[13:0] 
@N: MO231 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\uart_if\coreuart_0\rtl\vlog\core_obfuscated\clock_gen.v":219:0:219:5|Found counter in view:work.UART_IF_COREUART_0_Clock_gen_1s_0s(verilog) instance genblk1\.CUARTO0[12:0] 
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\uart_if\coreuart_0\rtl\vlog\core_obfuscated\tx_async.v":808:0:808:5|Removing sequential instance CUARTO00l (in view: work.UART_IF_COREUART_0_Tx_async_0s_0s_0s_1s_2s_3s_4s_5s_6s(verilog)) because it does not drive other instances.
@N: MO225 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\uart_if\coreuart_0\rtl\vlog\core_obfuscated\rx_async.v":871:0:871:5|There are no possible illegal states for state machine CUARTll0[3:0] (in view: work.UART_IF_COREUART_0_Rx_async_0s_0s_0s_1s_2s_3s(verilog)); safe FSM implementation is not required.
@N: MO231 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\hdl\uart_if_fsm.v":128:0:128:5|Found counter in view:work.UART_IF_FSM(verilog) instance cnt_1k[9:0] 
@N: MO231 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\hdl\uart_if_fsm.v":128:0:128:5|Found counter in view:work.UART_IF_FSM(verilog) instance RAM_WADDR[7:0] 
@N: MO231 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\hdl\uart_if_fsm.v":128:0:128:5|Found counter in view:work.UART_IF_FSM(verilog) instance RAM_RADDR[10:0] 
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance MDDR_Demo_0.CORERESETP_0.DDR_READY_int (in view: work.MDDR_Demo_top(verilog)) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":163:0:163:5|Removing sequential instance MDDR_Demo_0.CoreAHBLite_0.matrix4x16.masterstage_0.regHSIZE[2] (in view: work.MDDR_Demo_top(verilog)) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[2] (in view: work.top(verilog)) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[6] (in view: work.top(verilog)) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[11] (in view: work.top(verilog)) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\work\uart_if\coreuart_0\rtl\vlog\core_obfuscated\rx_async.v":1154:0:1154:5|Removing sequential instance UART_IF_0.COREUART_0.CUARTO01.CUARTO0Il[8] (in view: work.top(verilog)) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance MDDR_Demo_top_0.MDDR_Demo_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[5] (in view: work.top(verilog)) because it does not drive other instances.
@N: BN362 :"c:\users\i63442\desktop\v12.6 updates\igloo2\dg0534_igl2_mddr_demo_df_1\final\m2gl_dg0534_df\libero_project\component\actel\directcore\coreconfigmaster\2.1.102\rtl\vlog\core\coreconfigmaster.v":723:4:723:9|Removing sequential instance MDDR_Demo_top_0.MDDR_Demo_0.ConfigMaster_0.state[8] (in view: work.top(verilog)) because it does not drive other instances.
@N: FP130 |Promoting Net INIT_DONE_int_arst on CLKINT  I_276 
@N: FP130 |Promoting Net MDDR_Demo_top_0.MDDR_Demo_0.MSS_HPMS_READY_int_arst on CLKINT  I_277 
@N: FP130 |Promoting Net MDDR_Demo_top_0.MDDR_Demo_0.FIC_2_APB_M_PRESET_N_arst on CLKINT  I_278 
@N: FP130 |Promoting Net MDDR_Demo_top_0.MDDR_Demo_0.CORECONFIGP_0_APB_S_PCLK on CLKINT  I_279 
@N: FP130 |Promoting Net MDDR_Demo_top_0.MDDR_Demo_0.CORERESETP_0.sm0_areset_n_clk_base on CLKINT  I_280 
@N: FP130 |Promoting Net MDDR_Demo_top_0.MDDR_Demo_0.CORERESETP_0.sm0_areset_n_rcosc on CLKINT  I_281 
@N: FP130 |Promoting Net MDDR_Demo_top_0.MDDR_Demo_0.CORERESETP_0.sm0_areset_n_arst on CLKINT  I_282 
@N: BW103 |The default time unit for the Synopsys Constraint File (SDC or FDC) is 1ns.
@N: BW107 |Synopsys Constraint File capacitance units using default value of 1pF 
@N: MT615 |Found clock MDDR_Demo_top_0/MDDR_Demo_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT with period 20.00ns 
@N: MT615 |Found clock MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_HPMS_0/CLK_CONFIG_APB with period 50.00ns 
@N: MT615 |Found clock MDDR_Demo_top_0/MDDR_Demo_0/CCC_0/GL0 with period 50.00ns 
@N: MT615 |Found clock MDDR_Demo_top_0/MDDR_Demo_0/CCC_0/GL2 with period 12.50ns 
@N: MT320 |This timing report is an estimate of place and route data. For final timing results, use the FPGA vendor place and route report.
@N: MT322 |Clock constraints include only register-to-register paths associated with each individual clock.
