#### START OF AREA REPORT #####[
Part: M2GL010TSVF400-1 (Microchip)
Click here to go to specific block report:
top
MDDR_Demo_top
AXI_IF_0s_1s_2s_3s_0s_1s_2s_4294967292s_4294967293s_Z1
MDDR_Demo
MDDR_Demo_CCC_0_FCCC
CoreConfigMaster_Z2
CoreAHBLite_Z6
COREAHBLITE_MATRIX4X16_1_1_85_65536_0_0_0_0s
COREAHBLITE_MASTERSTAGE_1_1_85_65536_0s_0_1_0
COREAHBLITE_DEFAULTSLAVESM_0s_0_1_0
COREAHBLITE_SLAVESTAGE_0s_0_0_0
COREAHBLITE_SLAVEARBITER_Z5_1
CoreConfigP_Z9
CoreResetP_Z10
MDDR_Demo_FABOSC_0_OSC
MDDR_Demo_HPMS
UART_IF
UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s
UART_IF_COREUART_0_Clock_gen_1s_0s
UART_IF_COREUART_0_Tx_async_0s_0s_0s_1s_2s_3s_4s_5s_6s
UART_IF_COREUART_0_Rx_async_0s_0s_0s_1s_2s_3s
UART_IF_TPSRAM_0_TPSRAM
UART_IF_FSM
-------------------------------------------------------------------
######## Utilization report for Top level view: top ########
===================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1242 100 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top: 1242 (43.73 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1127 100 %
ARI1 310 100 %
BLACK BOX 5 100 %
======================================================
Total COMBINATIONAL LOGIC in the block top: 1442 (50.77 % Utilization)
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MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 4 100 %
====================================================
Total MEMORY ELEMENTS in the block top: 4 (0.14 % Utilization)
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GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 10 100 %
===================================================
Total GLOBAL BUFFERS in the block top: 10 (0.35 % Utilization)
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IO PADS
Name Total elements Utilization Notes
-------------------------------------------------
IO 51 100 %
=================================================
Total IO PADS in the block top: 51 (1.80 % Utilization)
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-------------------------------------------------------------------
######## Utilization report for cell: MDDR_Demo_top ########
Instance path: top.MDDR_Demo_top
===================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 795 64 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top.MDDR_Demo_top: 795 (27.99 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 793 70.4 %
ARI1 173 55.8 %
BLACK BOX 5 100 %
======================================================
Total COMBINATIONAL LOGIC in the block top.MDDR_Demo_top: 971 (34.19 % Utilization)
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GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 10 100 %
===================================================
Total GLOBAL BUFFERS in the block top.MDDR_Demo_top: 10 (0.35 % Utilization)
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IO PADS
Name Total elements Utilization Notes
-------------------------------------------------
IO 49 96.1 %
=================================================
Total IO PADS in the block top.MDDR_Demo_top: 49 (1.73 % Utilization)
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------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: AXI_IF_0s_1s_2s_3s_0s_1s_2s_4294967292s_4294967293s_Z1 ########
Instance path: MDDR_Demo_top.AXI_IF_0s_1s_2s_3s_0s_1s_2s_4294967292s_4294967293s_Z1
============================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 216 17.4 %
=================================================
Total SEQUENTIAL ELEMENTS in the block MDDR_Demo_top.AXI_IF_0s_1s_2s_3s_0s_1s_2s_4294967292s_4294967293s_Z1: 216 (7.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 42 3.73 %
ARI1 65 21 %
=================================================
Total COMBINATIONAL LOGIC in the block MDDR_Demo_top.AXI_IF_0s_1s_2s_3s_0s_1s_2s_4294967292s_4294967293s_Z1: 107 (3.77 % Utilization)
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---------------------------------------------------------------
######## Utilization report for cell: MDDR_Demo ########
Instance path: MDDR_Demo_top.MDDR_Demo
===============================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 579 46.6 %
=================================================
Total SEQUENTIAL ELEMENTS in the block MDDR_Demo_top.MDDR_Demo: 579 (20.39 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 751 66.6 %
ARI1 108 34.8 %
BLACK BOX 5 100 %
======================================================
Total COMBINATIONAL LOGIC in the block MDDR_Demo_top.MDDR_Demo: 864 (30.42 % Utilization)
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GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 10 100 %
===================================================
Total GLOBAL BUFFERS in the block MDDR_Demo_top.MDDR_Demo: 10 (0.35 % Utilization)
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IO PADS
Name Total elements Utilization Notes
-------------------------------------------------
IO 49 96.1 %
=================================================
Total IO PADS in the block MDDR_Demo_top.MDDR_Demo: 49 (1.73 % Utilization)
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--------------------------------------------------------------------
######## Utilization report for cell: CoreAHBLite_Z6 ########
Instance path: MDDR_Demo.CoreAHBLite_Z6
====================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 55 4.43 %
=================================================
Total SEQUENTIAL ELEMENTS in the block MDDR_Demo.CoreAHBLite_Z6: 55 (1.94 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 108 9.58 %
=================================================
Total COMBINATIONAL LOGIC in the block MDDR_Demo.CoreAHBLite_Z6: 108 (3.80 % Utilization)
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--------------------------------------------------------------------------------------------------
######## Utilization report for cell: COREAHBLITE_MATRIX4X16_1_1_85_65536_0_0_0_0s ########
Instance path: CoreAHBLite_Z6.COREAHBLITE_MATRIX4X16_1_1_85_65536_0_0_0_0s
==================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 55 4.43 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CoreAHBLite_Z6.COREAHBLITE_MATRIX4X16_1_1_85_65536_0_0_0_0s: 55 (1.94 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 108 9.58 %
=================================================
Total COMBINATIONAL LOGIC in the block CoreAHBLite_Z6.COREAHBLITE_MATRIX4X16_1_1_85_65536_0_0_0_0s: 108 (3.80 % Utilization)
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-----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: COREAHBLITE_MASTERSTAGE_1_1_85_65536_0s_0_1_0 ########
Instance path: COREAHBLITE_MATRIX4X16_1_1_85_65536_0_0_0_0s.COREAHBLITE_MASTERSTAGE_1_1_85_65536_0s_0_1_0
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 51 4.11 %
=================================================
Total SEQUENTIAL ELEMENTS in the block COREAHBLITE_MATRIX4X16_1_1_85_65536_0_0_0_0s.COREAHBLITE_MASTERSTAGE_1_1_85_65536_0s_0_1_0: 51 (1.80 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 35 3.11 %
=================================================
Total COMBINATIONAL LOGIC in the block COREAHBLITE_MATRIX4X16_1_1_85_65536_0_0_0_0s.COREAHBLITE_MASTERSTAGE_1_1_85_65536_0s_0_1_0: 35 (1.23 % Utilization)
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--------------------------------------------------------------------------------------------------
######## Utilization report for cell: COREAHBLITE_DEFAULTSLAVESM_0s_0_1_0 ########
Instance path: COREAHBLITE_MASTERSTAGE_1_1_85_65536_0s_0_1_0.COREAHBLITE_DEFAULTSLAVESM_0s_0_1_0
==================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1 0.08050 %
=================================================
Total SEQUENTIAL ELEMENTS in the block COREAHBLITE_MASTERSTAGE_1_1_85_65536_0s_0_1_0.COREAHBLITE_DEFAULTSLAVESM_0s_0_1_0: 1 (0.04 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 6 0.5320 %
=================================================
Total COMBINATIONAL LOGIC in the block COREAHBLITE_MASTERSTAGE_1_1_85_65536_0s_0_1_0.COREAHBLITE_DEFAULTSLAVESM_0s_0_1_0: 6 (0.21 % Utilization)
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---------------------------------------------------------------------------------------------
######## Utilization report for cell: COREAHBLITE_SLAVESTAGE_0s_0_0_0 ########
Instance path: COREAHBLITE_MATRIX4X16_1_1_85_65536_0_0_0_0s.COREAHBLITE_SLAVESTAGE_0s_0_0_0
=============================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 4 0.3220 %
=================================================
Total SEQUENTIAL ELEMENTS in the block COREAHBLITE_MATRIX4X16_1_1_85_65536_0_0_0_0s.COREAHBLITE_SLAVESTAGE_0s_0_0_0: 4 (0.14 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 73 6.48 %
=================================================
Total COMBINATIONAL LOGIC in the block COREAHBLITE_MATRIX4X16_1_1_85_65536_0_0_0_0s.COREAHBLITE_SLAVESTAGE_0s_0_0_0: 73 (2.57 % Utilization)
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-----------------------------------------------------------------------------------
######## Utilization report for cell: COREAHBLITE_SLAVEARBITER_Z5_1 ########
Instance path: COREAHBLITE_SLAVESTAGE_0s_0_0_0.COREAHBLITE_SLAVEARBITER_Z5_1
===================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 3 0.2420 %
=================================================
Total SEQUENTIAL ELEMENTS in the block COREAHBLITE_SLAVESTAGE_0s_0_0_0.COREAHBLITE_SLAVEARBITER_Z5_1: 3 (0.11 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 8 0.710 %
=================================================
Total COMBINATIONAL LOGIC in the block COREAHBLITE_SLAVESTAGE_0s_0_0_0.COREAHBLITE_SLAVEARBITER_Z5_1: 8 (0.28 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: CoreConfigMaster_Z2 ########
Instance path: MDDR_Demo.CoreConfigMaster_Z2
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 380 30.6 %
=================================================
Total SEQUENTIAL ELEMENTS in the block MDDR_Demo.CoreConfigMaster_Z2: 380 (13.38 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 536 47.6 %
ARI1 94 30.3 %
=================================================
Total COMBINATIONAL LOGIC in the block MDDR_Demo.CoreConfigMaster_Z2: 630 (22.18 % Utilization)
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--------------------------------------------------------------------
######## Utilization report for cell: CoreConfigP_Z9 ########
Instance path: MDDR_Demo.CoreConfigP_Z9
====================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 74 5.96 %
=================================================
Total SEQUENTIAL ELEMENTS in the block MDDR_Demo.CoreConfigP_Z9: 74 (2.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 54 4.79 %
=================================================
Total COMBINATIONAL LOGIC in the block MDDR_Demo.CoreConfigP_Z9: 54 (1.90 % Utilization)
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--------------------------------------------------------------------
######## Utilization report for cell: CoreResetP_Z10 ########
Instance path: MDDR_Demo.CoreResetP_Z10
====================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 70 5.64 %
=================================================
Total SEQUENTIAL ELEMENTS in the block MDDR_Demo.CoreResetP_Z10: 70 (2.46 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 20 1.77 %
ARI1 14 4.52 %
=================================================
Total COMBINATIONAL LOGIC in the block MDDR_Demo.CoreResetP_Z10: 34 (1.20 % Utilization)
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GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 5 50 %
===================================================
Total GLOBAL BUFFERS in the block MDDR_Demo.CoreResetP_Z10: 5 (0.18 % Utilization)
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--------------------------------------------------------------------------
######## Utilization report for cell: MDDR_Demo_CCC_0_FCCC ########
Instance path: MDDR_Demo.MDDR_Demo_CCC_0_FCCC
==========================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 1 20 %
======================================================
Total COMBINATIONAL LOGIC in the block MDDR_Demo.MDDR_Demo_CCC_0_FCCC: 1 (0.04 % Utilization)
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GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 2 20 %
===================================================
Total GLOBAL BUFFERS in the block MDDR_Demo.MDDR_Demo_CCC_0_FCCC: 2 (0.07 % Utilization)
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----------------------------------------------------------------------------
######## Utilization report for cell: MDDR_Demo_FABOSC_0_OSC ########
Instance path: MDDR_Demo.MDDR_Demo_FABOSC_0_OSC
============================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 2 40 %
======================================================
Total COMBINATIONAL LOGIC in the block MDDR_Demo.MDDR_Demo_FABOSC_0_OSC: 2 (0.07 % Utilization)
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GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 1 10 %
===================================================
Total GLOBAL BUFFERS in the block MDDR_Demo.MDDR_Demo_FABOSC_0_OSC: 1 (0.04 % Utilization)
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--------------------------------------------------------------------
######## Utilization report for cell: MDDR_Demo_HPMS ########
Instance path: MDDR_Demo.MDDR_Demo_HPMS
====================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 33 2.93 %
BLACK BOX 1 20 %
======================================================
Total COMBINATIONAL LOGIC in the block MDDR_Demo.MDDR_Demo_HPMS: 34 (1.20 % Utilization)
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GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 2 20 %
===================================================
Total GLOBAL BUFFERS in the block MDDR_Demo.MDDR_Demo_HPMS: 2 (0.07 % Utilization)
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IO PADS
Name Total elements Utilization Notes
-------------------------------------------------
IO 49 96.1 %
=================================================
Total IO PADS in the block MDDR_Demo.MDDR_Demo_HPMS: 49 (1.73 % Utilization)
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-------------------------------------------------------------
######## Utilization report for cell: UART_IF ########
Instance path: top.UART_IF
=============================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 447 36 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top.UART_IF: 447 (15.74 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 334 29.6 %
ARI1 137 44.2 %
=================================================
Total COMBINATIONAL LOGIC in the block top.UART_IF: 471 (16.58 % Utilization)
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MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 4 100 %
====================================================
Total MEMORY ELEMENTS in the block top.UART_IF: 4 (0.14 % Utilization)
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----------------------------------------------------------------------------------------------------
######## Utilization report for cell: UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s ########
Instance path: UART_IF.UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s
====================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 79 6.36 %
=================================================
Total SEQUENTIAL ELEMENTS in the block UART_IF.UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s: 79 (2.78 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 67 5.94 %
ARI1 19 6.13 %
=================================================
Total COMBINATIONAL LOGIC in the block UART_IF.UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s: 86 (3.03 % Utilization)
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--------------------------------------------------------------------------------------------------
######## Utilization report for cell: UART_IF_COREUART_0_Clock_gen_1s_0s ########
Instance path: UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s.UART_IF_COREUART_0_Clock_gen_1s_0s
==================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 19 1.53 %
=================================================
Total SEQUENTIAL ELEMENTS in the block UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s.UART_IF_COREUART_0_Clock_gen_1s_0s: 19 (0.67 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 10 0.8870 %
ARI1 14 4.52 %
=================================================
Total COMBINATIONAL LOGIC in the block UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s.UART_IF_COREUART_0_Clock_gen_1s_0s: 24 (0.85 % Utilization)
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-------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: UART_IF_COREUART_0_Rx_async_0s_0s_0s_1s_2s_3s ########
Instance path: UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s.UART_IF_COREUART_0_Rx_async_0s_0s_0s_1s_2s_3s
=============================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 32 2.58 %
=================================================
Total SEQUENTIAL ELEMENTS in the block UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s.UART_IF_COREUART_0_Rx_async_0s_0s_0s_1s_2s_3s: 32 (1.13 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 41 3.64 %
=================================================
Total COMBINATIONAL LOGIC in the block UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s.UART_IF_COREUART_0_Rx_async_0s_0s_0s_1s_2s_3s: 41 (1.44 % Utilization)
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----------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: UART_IF_COREUART_0_Tx_async_0s_0s_0s_1s_2s_3s_4s_5s_6s ########
Instance path: UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s.UART_IF_COREUART_0_Tx_async_0s_0s_0s_1s_2s_3s_4s_5s_6s
======================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 19 1.53 %
=================================================
Total SEQUENTIAL ELEMENTS in the block UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s.UART_IF_COREUART_0_Tx_async_0s_0s_0s_1s_2s_3s_4s_5s_6s: 19 (0.67 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 15 1.33 %
ARI1 5 1.61 %
=================================================
Total COMBINATIONAL LOGIC in the block UART_IF_COREUART_0_COREUART_0s_0s_0s_24s_1s_0s.UART_IF_COREUART_0_Tx_async_0s_0s_0s_1s_2s_3s_4s_5s_6s: 20 (0.70 % Utilization)
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-----------------------------------------------------------------
######## Utilization report for cell: UART_IF_FSM ########
Instance path: UART_IF.UART_IF_FSM
=================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 368 29.6 %
=================================================
Total SEQUENTIAL ELEMENTS in the block UART_IF.UART_IF_FSM: 368 (12.96 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 267 23.7 %
ARI1 118 38.1 %
=================================================
Total COMBINATIONAL LOGIC in the block UART_IF.UART_IF_FSM: 385 (13.56 % Utilization)
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-----------------------------------------------------------------------------
######## Utilization report for cell: UART_IF_TPSRAM_0_TPSRAM ########
Instance path: UART_IF.UART_IF_TPSRAM_0_TPSRAM
=============================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 4 100 %
====================================================
Total MEMORY ELEMENTS in the block UART_IF.UART_IF_TPSRAM_0_TPSRAM: 4 (0.14 % Utilization)
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##### END OF AREA REPORT #####]