Microsemi Corporation - Microsemi Libero Software Release v12.6 (Version 12.900.20.24)

Date      :  Tue Mar 30 10:13:13 2021
Project   :  C:\Users\I63442\Desktop\v12.6 updates\Igloo2\DG0534_IGL2_MDDR_Demo_DF_1\Libero_Project
Component :  MDDR_Demo
Family    :  IGLOO2


HDL source files for all Synthesis and Simulation tools:
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo/CCC_0/MDDR_Demo_CCC_0_FCCC.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/CoreConfigMaster/2.1.102/rtl/vlog/core/coreconfigmaster.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_addrdec.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_defaultslavesm.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_slavearbiter.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_masterstage.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_slavestage.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_matrix4x16.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_feedthrough.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_interconnect_ntom.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_master_stage.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_matrix_m.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_matrix_s.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_ra_arbiter.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_ra_channel.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_rd_channel.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_rdmatrix_4Mto1S.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_rdmatrix_16Sto1M.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_slave_stage.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_wa_arbiter.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_wa_channel.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_wd_channel.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_wresp_channel.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_wrmatrix_4Mto1S.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_rdmatrix_4Mto1S_hgs_high.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_rdmatrix_4Mto1S_hgs_low.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_wrmatrix_4Mto1S_hgs_high.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/core/axi_wrmatrix_4Mto1S_hgs_low.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo/COREAXI_0/rtl/vlog/core/coreaxi.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/CoreConfigP/7.1.100/rtl/vlog/core/coreconfigp.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/CoreResetP/7.1.100/rtl/vlog/core/coreresetp.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/CoreResetP/7.1.100/rtl/vlog/core/coreresetp_pcie_hotreset.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo/FABOSC_0/MDDR_Demo_FABOSC_0_OSC.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo/MDDR_Demo.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo_HPMS/MDDR_Demo_HPMS.v

HDL source files for Synopsys SynplifyPro Synthesis tool:
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/SgCore/OSC/2.0.101/osc_comps.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo_HPMS/MDDR_Demo_HPMS_syn.v

HDL source files for Mentor Precision Synthesis tool:
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/SgCore/OSC/2.0.101/osc_comps_pre.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo_HPMS/MDDR_Demo_HPMS_pre.v

Stimulus files for all Simulation tools:
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo/subsystem.bfm

    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/test/user/axi_slave.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/rtl/vlog/test/user/axi_master.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo/COREAXI_0/rtl/vlog/test/user/testbench.v
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/Actel/DirectCore/COREAXI/3.1.100/coreparameters.v

Configuration files to be used for Programming:
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo_HPMS/MDDR_init.reg

Configuration files to be used for all Simulation tools:
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo_HPMS/MDDR_init.reg

Configuration files to be used for Power Analysis:
    C:/Users/I63442/Desktop/v12.6 updates/Igloo2/DG0534_IGL2_MDDR_Demo_DF_1/Libero_Project/component/work/MDDR_Demo_HPMS/MDDR_init.reg

