# Global Net Report

Microsemi Corporation - Microsemi Libero Software Release v12.6 (Version 12.900.20.24)

Date: Thu Apr 8 17:24:51 2021

## Global Nets Information

| From | GB Location | Net Name | Fanout
--- | --- | --- | --- | ---
1 | GB[3] | (221, 54) | MDDR_Demo_top_0/MDDR_Demo_0/CCC_0/GL2_INST/U0_YNn | 671
2 | GB[7] | (225, 54) | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/INIT_DONE_int_rep_RNI4KI6/U0_YNn | 565
3 | GB[2] | (220, 54) | MDDR_Demo_top_0/MDDR_Demo_0/CCC_0/GL0_INST/U0_YNn | 475
4 | GB[5] | (223, 54) | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/MSS_HPMS_READY_int_rep_RNI9P7F/U0_YNn | 435
5 | GB[6] | (224, 54) | MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_HPMS_0/FIC_2_APB_M_PRESET_N_keep_RNI58GF/U0_YNn | 76
6 | GB[0] | (218, 54) | MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_HPMS_0/MSS_ADLIB_INST_RNICL0E/U0_YNn | 75
7 | GB[4] | (222, 54) | MDDR_Demo_top_0/MDDR_Demo_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YNn | 31
8 | GB[1] | (219, 54) | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/sm0_areset_n_clk_base_RNIEJ51/U0_YNn | 27

## I/O to GB Connections

(none)

## Fabric to GB Connections

| From | From Location | To | Net Name | Net Type | Fanout
--- | --- | --- | --- | --- | --- | ---
1 | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/INIT_DONE_int_rep:Q | (354, 85) | GB[7] | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/INIT_DONE_int_rep_Z | ROUTED | 1
2 | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/MSS_HPMS_READY_int_rep:Q | (360, 79) | GB[5] | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/MSS_HPMS_READY_int_rep_Z | ROUTED | 1
3 | MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_HPMS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CONFIG_PRESET_N | (300, 104) | GB[6] | MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_HPMS_0/FIC_2_APB_M_PRESET_N | ROUTED | 2
4 | MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_HPMS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_CONFIG_APB | (300, 104) | GB[0] | MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_HPMS_0/CLK_CONFIG_APB | ROUTED | 1
5 | MDDR_Demo_top_0/MDDR_Demo_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT | (397, 92) | GB[4] | MDDR_Demo_top_0/MDDR_Demo_0/FABOSC_0/N_RCOSC_25_50MHZ_CLKINT | ROUTED | 1
6 | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/sm0_areset_n_clk_base:Q | (387, 76) | GB[1] | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/sm0_areset_n_clk_base_0 | ROUTED | 1

## CCC to GB Connections

| From | From Location | Pin Swapped for Back Annotation Only | To | Net Name | Net Type | Fanout
--- | --- | --- | --- | --- | --- | --- | ---
1 | MDDR_Demo_top_0/MDDR_Demo_0/CCC_0/CCC_INST/INST_CCC_IP:GL2 | CCC-NE1 (390, 92) | GL2 => GL3 | GB[3] | MDDR_Demo_top_0/MDDR_Demo_0/CCC_0/GL2_net | HARDWIRED | 1
2 | MDDR_Demo_top_0/MDDR_Demo_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 | CCC-NE1 (390, 92) | GL0 => GL2 | GB[2] | MDDR_Demo_top_0/MDDR_Demo_0/CCC_0/GL0_net | HARDWIRED | 1

## CCC Input Connections

| From | From Location | To (Pin Swapped for Back Annotation Only) | CCC Location | Net Name | Net Type | Fanout
--- | --- | --- | --- | --- | --- | --- | ---
1 | MDDR_Demo_top_0/MDDR_Demo_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT | (396, 92) | MDDR_Demo_top_0/MDDR_Demo_0/CCC_0/CCC_INST/INST_CCC_IP:RCOSC_25_50MHZ | CCC-NE1 (390, 92) | MDDR_Demo_top_0/MDDR_Demo_0/FABOSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC | HARDWIRED | 2

## Local Nets to RGB Connections

(none)

## Global Nets to RGB Connections

| From | From Location | Net Name | Fanout |  | RGB Location | Local Fanout
--- | --- | --- | --- | --- | --- | --- | ---
1 | GB[3] | (221, 54) | MDDR_Demo_top_0/MDDR_Demo_0/CCC_0/GL2_INST/U0_YNn | 671 | 1 | (218, 90) | 8
|  |  |  |  | 2 | (219, 87) | 107
|  |  |  |  | 3 | (219, 93) | 105
|  |  |  |  | 4 | (219, 96) | 157
|  |  |  |  | 5 | (219, 99) | 162
|  |  |  |  | 6 | (220, 78) | 14
|  |  |  |  | 7 | (220, 81) | 55
|  |  |  |  | 8 | (220, 102) | 10
|  |  |  |  | 9 | (221, 84) | 53
2 | GB[7] | (225, 54) | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/INIT_DONE_int_rep_RNI4KI6/U0_YNn | 565 | 1 | (218, 87) | 107
|  |  |  |  | 2 | (218, 93) | 77
|  |  |  |  | 3 | (218, 96) | 123
|  |  |  |  | 4 | (218, 99) | 129
|  |  |  |  | 5 | (219, 78) | 14
|  |  |  |  | 6 | (219, 81) | 55
|  |  |  |  | 7 | (219, 102) | 7
|  |  |  |  | 8 | (220, 84) | 53
3 | GB[2] | (220, 54) | MDDR_Demo_top_0/MDDR_Demo_0/CCC_0/GL0_INST/U0_YNn | 475 | 1 | (219, 57) | 21
|  |  |  |  | 2 | (219, 60) | 15
|  |  |  |  | 3 | (219, 72) | 12
|  |  |  |  | 4 | (220, 75) | 16
|  |  |  |  | 5 | (221, 78) | 6
|  |  |  |  | 6 | (221, 102) | 1
|  |  |  |  | 7 | (222, 84) | 5
4 | GB[5] | (223, 54) | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/MSS_HPMS_READY_int_rep_RNI9P7F/U0_YNn | 435 | 1 | (218, 57) | 21
|  |  |  |  | 2 | (218, 60) | 15
5 | GB[6] | (224, 54) | MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_HPMS_0/FIC_2_APB_M_PRESET_N_keep_RNI58GF/U0_YNn | 76 | 1 | (221, 81) | 12
|  |  |  |  | 2 | (222, 75) | 7
|  |  |  |  | 3 | (222, 78) | 33
|  |  |  |  | 4 | (223, 84) | 24
6 | GB[0] | (218, 54) | MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_HPMS_0/MSS_ADLIB_INST_RNICL0E/U0_YNn | 75 | 1 | (218, 75) | 5
|  |  |  |  | 2 | (218, 78) | 33
|  |  |  |  | 3 | (218, 81) | 12
|  |  |  |  | 4 | (218, 84) | 24
|  |  |  |  | 5 | (218, 102) | 1
7 | GB[4] | (222, 54) | MDDR_Demo_top_0/MDDR_Demo_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YNn | 31 | 1 | (220, 72) | 18
|  |  |  |  | 2 | (221, 75) | 13
8 | GB[1] | (219, 54) | MDDR_Demo_top_0/MDDR_Demo_0/CORERESETP_0/sm0_areset_n_clk_base_RNIEJ51/U0_YNn | 27 | 1 | (218, 72) | 12
|  |  |  |  | 2 | (219, 75) | 12
|  |  |  |  | 3 | (219, 84) | 3