#Build: Synplify Pro L-2016.09M-2, Build 065R, Nov 16 2016 #install: D:\cap\sympify_bug_fix\synplify_L201609M-2_W #OS: Windows 8 6.2 #Hostname: W764D-ATHULDEEP # Tue Aug 29 15:41:50 2017 #Implementation: synthesis Synopsys HDL Compiler, version comp2016q3p1, Build 117R, built Nov 17 2016 @N: : | Running in 64-bit mode Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Synopsys Verilog Compiler, version comp2016q3p1, Build 127R, built Nov 24 2016 @N: : | Running in 64-bit mode Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. @I::"D:\cap\sympify_bug_fix\synplify_L201609M-2_W\lib\generic\igloo2.v" (library work) @I::"D:\cap\sympify_bug_fix\synplify_L201609M-2_W\lib\vlog\hypermods.v" (library __hyper__lib__) @I::"D:\cap\sympify_bug_fix\synplify_L201609M-2_W\lib\vlog\umr_capim.v" (library snps_haps) @I::"D:\cap\sympify_bug_fix\synplify_L201609M-2_W\lib\vlog\scemi_objects.v" (library snps_haps) @I::"D:\cap\sympify_bug_fix\synplify_L201609M-2_W\lib\vlog\scemi_pipes.svh" (library snps_haps) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\hdl\Debounce.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo\CoreGPIO_0\rtl\vlog\core\coregpio.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo\SERDES_IF_0\PCIe_Demo_SERDES_IF_0_SERDES_IF_syn.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo\SERDES_IF_0\PCIe_Demo_SERDES_IF_0_SERDES_IF.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreConfigMaster\2.1.102\rtl\vlog\core\coreconfigmaster.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreConfigP\7.1.100\rtl\vlog\core\coreconfigp.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreResetP\7.1.100\rtl\vlog\core\coreresetp_pcie_hotreset.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreResetP\7.1.100\rtl\vlog\core\coreresetp.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo_sb\CCC_0\PCIe_Demo_sb_CCC_0_FCCC.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\SgCore\OSC\2.0.101\osc_comps.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo_sb\FABOSC_0\PCIe_Demo_sb_FABOSC_0_OSC.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo_sb_HPMS\PCIe_Demo_sb_HPMS_syn.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo_sb_HPMS\PCIe_Demo_sb_HPMS.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_addrdec.v" (library COREAHBLITE_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_defaultslavesm.v" (library COREAHBLITE_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v" (library COREAHBLITE_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v" (library COREAHBLITE_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v" (library COREAHBLITE_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_matrix4x16.v" (library COREAHBLITE_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite.v" (library COREAHBLITE_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo_sb\PCIe_Demo_sb.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\hdl\Serial_Num.v" (library work) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo\COREAHBLSRAM_0\rtl\vlog\core\AHBLSramIf.v" (library COREAHBLSRAM_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo\COREAHBLSRAM_0\rtl\vlog\core\lsram_2048to139264x8.v" (library COREAHBLSRAM_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo\COREAHBLSRAM_0\rtl\vlog\core\usram_128to9216x8.v" (library COREAHBLSRAM_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo\COREAHBLSRAM_0\rtl\vlog\core\SramCtrlIf.v" (library COREAHBLSRAM_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo\COREAHBLSRAM_0\rtl\vlog\core\CoreAHBLSRAM.v" (library COREAHBLSRAM_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\COREAHBTOAPB3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_ahbtoapbsm.v" (library COREAHBTOAPB3_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\COREAHBTOAPB3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_penablescheduler.v" (library COREAHBTOAPB3_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\COREAHBTOAPB3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v" (library COREAHBTOAPB3_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\COREAHBTOAPB3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3.v" (library COREAHBTOAPB3_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vlog\core_obfuscated\coreapb3_muxptob3.v" (library COREAPB3_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vlog\core_obfuscated\coreapb3_iaddr_reg.v" (library COREAPB3_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vlog\core_obfuscated\coreapb3.v" (library COREAPB3_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CORESYSSERVICES\3.1.101\rtl\vlog\core\CoreSysServices_AHBLMasterIF.v" (library CORESYSSERVICES_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CORESYSSERVICES\3.1.101\rtl\vlog\core\CoreSysServices_CmdDec.v" (library CORESYSSERVICES_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CORESYSSERVICES\3.1.101\rtl\vlog\core\CoreSysServices_FSMCtrl.v" (library CORESYSSERVICES_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\Actel\DirectCore\CORESYSSERVICES\3.1.101\rtl\vlog\core\CoreSysServices_UserIF.v" (library CORESYSSERVICES_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo\CORESYSSERVICES_0\rtl\vlog\core\CoreSysServices.v" (library CORESYSSERVICES_LIB) @I::"C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\component\work\PCIe_Demo\PCIe_Demo.v" (library work) Verilog syntax check successful! Selecting top level module PCIe_Demo @W:CG775 : coreahblite.v(23) | Found Component CoreAHBLite in library COREAHBLITE_LIB @N:CG364 : coreahblite_addrdec.v(20) | Synthesizing module COREAHBLITE_ADDRDEC in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000000000000 M_AHBSLOTENABLE=17'b00000000000010100 MSB_ADDR=32'b00000000000000000000000000011111 SLAVE_0=16'b0000000000000001 SLAVE_1=16'b0000000000000010 SLAVE_2=16'b0000000000000100 SLAVE_3=16'b0000000000001000 SLAVE_4=16'b0000000000010000 SLAVE_5=16'b0000000000100000 SLAVE_6=16'b0000000001000000 SLAVE_7=16'b0000000010000000 SLAVE_8=16'b0000000100000000 SLAVE_9=16'b0000001000000000 SLAVE_10=16'b0000010000000000 SLAVE_11=16'b0000100000000000 SLAVE_12=16'b0001000000000000 SLAVE_13=16'b0010000000000000 SLAVE_14=16'b0100000000000000 SLAVE_15=16'b1000000000000000 NONE=16'b0000000000000000 Generated name = COREAHBLITE_ADDRDEC_Z1 @N:CG364 : coreahblite_defaultslavesm.v(20) | Synthesizing module COREAHBLITE_DEFAULTSLAVESM in library COREAHBLITE_LIB. SYNC_RESET=32'b00000000000000000000000000000000 IDLE=1'b0 HRESPEXTEND=1'b1 Generated name = COREAHBLITE_DEFAULTSLAVESM_0s_0_1 @N:CG364 : coreahblite_masterstage.v(22) | Synthesizing module COREAHBLITE_MASTERSTAGE in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000000000000 M_AHBSLOTENABLE=17'b00000000000010100 SYNC_RESET=32'b00000000000000000000000000000000 IDLE=1'b0 REGISTERED=1'b1 SLAVE_NONE=17'b00000000000000000 Generated name = COREAHBLITE_MASTERSTAGE_1_1_0_20_0s_0_1_0 @W:CL177 : coreahblite_masterstage.v(625) | Sharing sequential element addrRegSMCurrentState. Add a syn_preserve attribute to the element to prevent sharing. @N:CG364 : coreahblite_addrdec.v(20) | Synthesizing module COREAHBLITE_ADDRDEC in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000000000000 M_AHBSLOTENABLE=17'b00000000000000100 MSB_ADDR=32'b00000000000000000000000000011111 SLAVE_0=16'b0000000000000001 SLAVE_1=16'b0000000000000010 SLAVE_2=16'b0000000000000100 SLAVE_3=16'b0000000000001000 SLAVE_4=16'b0000000000010000 SLAVE_5=16'b0000000000100000 SLAVE_6=16'b0000000001000000 SLAVE_7=16'b0000000010000000 SLAVE_8=16'b0000000100000000 SLAVE_9=16'b0000001000000000 SLAVE_10=16'b0000010000000000 SLAVE_11=16'b0000100000000000 SLAVE_12=16'b0001000000000000 SLAVE_13=16'b0010000000000000 SLAVE_14=16'b0100000000000000 SLAVE_15=16'b1000000000000000 NONE=16'b0000000000000000 Generated name = COREAHBLITE_ADDRDEC_Z2 @N:CG364 : coreahblite_masterstage.v(22) | Synthesizing module COREAHBLITE_MASTERSTAGE in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000000000000 M_AHBSLOTENABLE=17'b00000000000000100 SYNC_RESET=32'b00000000000000000000000000000000 IDLE=1'b0 REGISTERED=1'b1 SLAVE_NONE=17'b00000000000000000 Generated name = COREAHBLITE_MASTERSTAGE_1_1_0_4_0s_0_1_0 @W:CL177 : coreahblite_masterstage.v(625) | Sharing sequential element addrRegSMCurrentState. Add a syn_preserve attribute to the element to prevent sharing. @N:CG364 : coreahblite_addrdec.v(20) | Synthesizing module COREAHBLITE_ADDRDEC in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000000000000 M_AHBSLOTENABLE=17'b00000000000000000 MSB_ADDR=32'b00000000000000000000000000011111 SLAVE_0=16'b0000000000000001 SLAVE_1=16'b0000000000000010 SLAVE_2=16'b0000000000000100 SLAVE_3=16'b0000000000001000 SLAVE_4=16'b0000000000010000 SLAVE_5=16'b0000000000100000 SLAVE_6=16'b0000000001000000 SLAVE_7=16'b0000000010000000 SLAVE_8=16'b0000000100000000 SLAVE_9=16'b0000001000000000 SLAVE_10=16'b0000010000000000 SLAVE_11=16'b0000100000000000 SLAVE_12=16'b0001000000000000 SLAVE_13=16'b0010000000000000 SLAVE_14=16'b0100000000000000 SLAVE_15=16'b1000000000000000 NONE=16'b0000000000000000 Generated name = COREAHBLITE_ADDRDEC_Z3 @N:CG364 : coreahblite_masterstage.v(22) | Synthesizing module COREAHBLITE_MASTERSTAGE in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000000000000 M_AHBSLOTENABLE=17'b00000000000000000 SYNC_RESET=32'b00000000000000000000000000000000 IDLE=1'b0 REGISTERED=1'b1 SLAVE_NONE=17'b00000000000000000 Generated name = COREAHBLITE_MASTERSTAGE_1_1_0_0_0s_0_1_0 @W:CL177 : coreahblite_masterstage.v(625) | Sharing sequential element addrRegSMCurrentState. Add a syn_preserve attribute to the element to prevent sharing. @N:CG364 : coreahblite_slavearbiter.v(20) | Synthesizing module COREAHBLITE_SLAVEARBITER in library COREAHBLITE_LIB. SYNC_RESET=32'b00000000000000000000000000000000 M0EXTEND=4'b0000 M0DONE=4'b0001 M0LOCK=4'b0010 M0LOCKEXTEND=4'b0011 M1EXTEND=4'b0100 M1DONE=4'b0101 M1LOCK=4'b0110 M1LOCKEXTEND=4'b0111 M2EXTEND=4'b1000 M2DONE=4'b1001 M2LOCK=4'b1010 M2LOCKEXTEND=4'b1011 M3EXTEND=4'b1100 M3DONE=4'b1101 M3LOCK=4'b1110 M3LOCKEXTEND=4'b1111 MASTER_0=4'b0001 MASTER_1=4'b0010 MASTER_2=4'b0100 MASTER_3=4'b1000 MASTER_NONE=4'b0000 Generated name = COREAHBLITE_SLAVEARBITER_Z4 @N:CG364 : coreahblite_slavestage.v(22) | Synthesizing module COREAHBLITE_SLAVESTAGE in library COREAHBLITE_LIB. SYNC_RESET=32'b00000000000000000000000000000000 TRN_IDLE=1'b0 MASTER_NONE=4'b0000 Generated name = COREAHBLITE_SLAVESTAGE_0s_0_0 @N:CG364 : coreahblite_matrix4x16.v(23) | Synthesizing module COREAHBLITE_MATRIX4X16 in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000000000000 M0_AHBSLOTENABLE=17'b00000000000010100 M1_AHBSLOTENABLE=17'b00000000000000100 M2_AHBSLOTENABLE=17'b00000000000000000 M3_AHBSLOTENABLE=17'b00000000000000000 SYNC_RESET=32'b00000000000000000000000000000000 Generated name = COREAHBLITE_MATRIX4X16_1_1_0_20_4_0_0_0s @N:CG364 : coreahblite.v(23) | Synthesizing module CoreAHBLite in library COREAHBLITE_LIB. FAMILY=6'b011000 MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC_0=1'b0 SC_1=1'b0 SC_2=1'b0 SC_3=1'b0 SC_4=1'b0 SC_5=1'b0 SC_6=1'b0 SC_7=1'b0 SC_8=1'b0 SC_9=1'b0 SC_10=1'b0 SC_11=1'b0 SC_12=1'b0 SC_13=1'b0 SC_14=1'b0 SC_15=1'b0 M0_AHBSLOT0ENABLE=1'b0 M0_AHBSLOT1ENABLE=1'b0 M0_AHBSLOT2ENABLE=1'b1 M0_AHBSLOT3ENABLE=1'b0 M0_AHBSLOT4ENABLE=1'b1 M0_AHBSLOT5ENABLE=1'b0 M0_AHBSLOT6ENABLE=1'b0 M0_AHBSLOT7ENABLE=1'b0 M0_AHBSLOT8ENABLE=1'b0 M0_AHBSLOT9ENABLE=1'b0 M0_AHBSLOT10ENABLE=1'b0 M0_AHBSLOT11ENABLE=1'b0 M0_AHBSLOT12ENABLE=1'b0 M0_AHBSLOT13ENABLE=1'b0 M0_AHBSLOT14ENABLE=1'b0 M0_AHBSLOT15ENABLE=1'b0 M0_AHBSLOT16ENABLE=1'b0 M1_AHBSLOT0ENABLE=1'b0 M1_AHBSLOT1ENABLE=1'b0 M1_AHBSLOT2ENABLE=1'b1 M1_AHBSLOT3ENABLE=1'b0 M1_AHBSLOT4ENABLE=1'b0 M1_AHBSLOT5ENABLE=1'b0 M1_AHBSLOT6ENABLE=1'b0 M1_AHBSLOT7ENABLE=1'b0 M1_AHBSLOT8ENABLE=1'b0 M1_AHBSLOT9ENABLE=1'b0 M1_AHBSLOT10ENABLE=1'b0 M1_AHBSLOT11ENABLE=1'b0 M1_AHBSLOT12ENABLE=1'b0 M1_AHBSLOT13ENABLE=1'b0 M1_AHBSLOT14ENABLE=1'b0 M1_AHBSLOT15ENABLE=1'b0 M1_AHBSLOT16ENABLE=1'b0 M2_AHBSLOT0ENABLE=1'b0 M2_AHBSLOT1ENABLE=1'b0 M2_AHBSLOT2ENABLE=1'b0 M2_AHBSLOT3ENABLE=1'b0 M2_AHBSLOT4ENABLE=1'b0 M2_AHBSLOT5ENABLE=1'b0 M2_AHBSLOT6ENABLE=1'b0 M2_AHBSLOT7ENABLE=1'b0 M2_AHBSLOT8ENABLE=1'b0 M2_AHBSLOT9ENABLE=1'b0 M2_AHBSLOT10ENABLE=1'b0 M2_AHBSLOT11ENABLE=1'b0 M2_AHBSLOT12ENABLE=1'b0 M2_AHBSLOT13ENABLE=1'b0 M2_AHBSLOT14ENABLE=1'b0 M2_AHBSLOT15ENABLE=1'b0 M2_AHBSLOT16ENABLE=1'b0 M3_AHBSLOT0ENABLE=1'b0 M3_AHBSLOT1ENABLE=1'b0 M3_AHBSLOT2ENABLE=1'b0 M3_AHBSLOT3ENABLE=1'b0 M3_AHBSLOT4ENABLE=1'b0 M3_AHBSLOT5ENABLE=1'b0 M3_AHBSLOT6ENABLE=1'b0 M3_AHBSLOT7ENABLE=1'b0 M3_AHBSLOT8ENABLE=1'b0 M3_AHBSLOT9ENABLE=1'b0 M3_AHBSLOT10ENABLE=1'b0 M3_AHBSLOT11ENABLE=1'b0 M3_AHBSLOT12ENABLE=1'b0 M3_AHBSLOT13ENABLE=1'b0 M3_AHBSLOT14ENABLE=1'b0 M3_AHBSLOT15ENABLE=1'b0 M3_AHBSLOT16ENABLE=1'b0 SYNC_RESET=32'b00000000000000000000000000000000 M0_AHBSLOTENABLE=17'b00000000000010100 M1_AHBSLOTENABLE=17'b00000000000000100 M2_AHBSLOTENABLE=17'b00000000000000000 M3_AHBSLOTENABLE=17'b00000000000000000 SC=16'b0000000000000000 Generated name = CoreAHBLite_Z5 @W:CG775 : CoreAHBLSRAM.v(29) | Found Component PCIe_Demo_COREAHBLSRAM_0_COREAHBLSRAM in library COREAHBLSRAM_LIB @N:CG364 : AHBLSramIf.v(29) | Synthesizing module PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf in library COREAHBLSRAM_LIB. SYNC_RESET=32'b00000000000000000000000000000000 IDLE=2'b00 AHB_WR=2'b01 AHB_RD=2'b10 AHB_DWIDTH=32'b00000000000000000000000000100000 AHB_AWIDTH=32'b00000000000000000000000000100000 RESP_OKAY=2'b00 RESP_ERROR=2'b01 TRN_IDLE=2'b00 TRN_BUSY=2'b01 TRN_SEQ=2'b11 TRN_NONSEQ=2'b10 SINGLE=3'b000 INCR=3'b001 WRAP4=3'b010 INCR4=3'b011 WRAP8=3'b100 INCR8=3'b101 WRAP16=3'b110 INCR16=3'b111 Generated name = PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6 @N:CG179 : AHBLSramIf.v(328) | Removing redundant assignment. @W:CG133 : AHBLSramIf.v(148) | Object sramahb_ack_cnt is declared but not assigned. Either assign a value or remove the declaration. @W:CL169 : AHBLSramIf.v(184) | Pruning unused register HWDATA_d[31:0]. Make sure that there are no unused intermediate registers. @W:CL169 : AHBLSramIf.v(184) | Pruning unused register HTRANS_d[1:0]. Make sure that there are no unused intermediate registers. @W:CL169 : AHBLSramIf.v(184) | Pruning unused register HBURST_d[2:0]. Make sure that there are no unused intermediate registers. @W:CL169 : AHBLSramIf.v(184) | Pruning unused register HSEL_d. Make sure that there are no unused intermediate registers. @W:CL169 : AHBLSramIf.v(184) | Pruning unused register HREADYIN_d. Make sure that there are no unused intermediate registers. @N:CG364 : SramCtrlIf.v(29) | Synthesizing module PCIe_Demo_COREAHBLSRAM_0_SramCtrlIf in library COREAHBLSRAM_LIB. SEL_SRAM_TYPE=32'b00000000000000000000000000000000 LSRAM_NUM_LOCATIONS_DWIDTH32=32'b00000000000000001000100000000000 LSRAM_NUM_LOCATIONS_4=32'b00000000000000001000100000000000 USRAM_NUM_LOCATIONS_DWIDTH32=32'b00000000000000000000001000000000 USRAM_NUM_LOCATIONS_4=32'b00000000000000000000000010000000 AHB_DWIDTH=32'b00000000000000000000000000100000 SYNC_RESET=32'b00000000000000000000000000000000 S_IDLE=2'b00 S_WR=2'b01 S_RD=2'b10 Generated name = PCIe_Demo_COREAHBLSRAM_0_SramCtrlIf_0s_34816s_34816s_512s_128s_32s_0s_0_1_2 @N:CG364 : igloo2.v(382) | Synthesizing module RAM1K18 in library work. @N:CG364 : lsram_2048to139264x8.v(28) | Synthesizing module PCIe_Demo_COREAHBLSRAM_0_lsram_2048to139264x8 in library COREAHBLSRAM_LIB. DEPTH=32'b00000000000000001000100000000000 SYNC_RESET=32'b00000000000000000000000000000000 AHB_DWIDTH=32'b00000000000000000000000000100000 Generated name = PCIe_Demo_COREAHBLSRAM_0_lsram_2048to139264x8_34816s_0s_32s @W:CG133 : lsram_2048to139264x8.v(364) | Object writeAddr0 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(365) | Object writeAddr1 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(366) | Object writeAddr2 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(367) | Object writeAddr3 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(368) | Object writeAddr4 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(369) | Object writeAddr5 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(370) | Object writeAddr6 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(371) | Object writeAddr7 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(372) | Object writeAddr8 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(373) | Object writeAddr9 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(374) | Object writeAddr10 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(375) | Object writeAddr11 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(376) | Object writeAddr12 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(377) | Object writeAddr13 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(378) | Object writeAddr14 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(379) | Object writeAddr15 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(380) | Object writeAddr16 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(381) | Object writeAddr17 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(382) | Object writeAddr18 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(383) | Object writeAddr19 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(384) | Object writeAddr20 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(385) | Object writeAddr21 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(386) | Object writeAddr22 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(387) | Object writeAddr23 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(388) | Object writeAddr24 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(389) | Object writeAddr25 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(390) | Object writeAddr26 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(391) | Object writeAddr27 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(392) | Object writeAddr28 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(393) | Object writeAddr29 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(394) | Object writeAddr30 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(395) | Object writeAddr31 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(396) | Object writeAddr32 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(397) | Object writeAddr33 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(398) | Object writeAddr34 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(399) | Object writeAddr35 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(400) | Object writeAddr36 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(401) | Object writeAddr37 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(402) | Object writeAddr38 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(403) | Object writeAddr39 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(404) | Object writeAddr40 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(405) | Object writeAddr41 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(406) | Object writeAddr42 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(407) | Object writeAddr43 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(408) | Object writeAddr44 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(409) | Object writeAddr45 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(410) | Object writeAddr46 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(411) | Object writeAddr47 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(412) | Object writeAddr48 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(413) | Object writeAddr49 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(414) | Object writeAddr50 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(415) | Object writeAddr51 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(416) | Object writeAddr52 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(417) | Object writeAddr53 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(418) | Object writeAddr54 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(419) | Object writeAddr55 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(420) | Object writeAddr56 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(421) | Object writeAddr57 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(422) | Object writeAddr58 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(423) | Object writeAddr59 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(424) | Object writeAddr60 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(425) | Object writeAddr61 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(426) | Object writeAddr62 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(427) | Object writeAddr63 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(428) | Object writeAddr64 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(429) | Object writeAddr65 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(430) | Object writeAddr66 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(431) | Object writeAddr67 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(432) | Object writeAddr68 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(434) | Object readAddr0 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(435) | Object readAddr1 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(436) | Object readAddr2 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(437) | Object readAddr3 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(438) | Object readAddr4 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(439) | Object readAddr5 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(440) | Object readAddr6 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(441) | Object readAddr7 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(442) | Object readAddr8 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(443) | Object readAddr9 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(444) | Object readAddr10 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(445) | Object readAddr11 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(446) | Object readAddr12 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(447) | Object readAddr13 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(448) | Object readAddr14 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(449) | Object readAddr15 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(450) | Object readAddr16 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(451) | Object readAddr17 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(452) | Object readAddr18 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(453) | Object readAddr19 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(454) | Object readAddr20 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(455) | Object readAddr21 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(456) | Object readAddr22 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(457) | Object readAddr23 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(458) | Object readAddr24 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(459) | Object readAddr25 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(460) | Object readAddr26 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(461) | Object readAddr27 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(462) | Object readAddr28 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(463) | Object readAddr29 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(464) | Object readAddr30 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(465) | Object readAddr31 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(466) | Object readAddr32 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(467) | Object readAddr33 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(468) | Object readAddr34 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(469) | Object readAddr35 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(470) | Object readAddr36 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(471) | Object readAddr37 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(472) | Object readAddr38 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(473) | Object readAddr39 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(474) | Object readAddr40 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(475) | Object readAddr41 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(476) | Object readAddr42 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(477) | Object readAddr43 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(478) | Object readAddr44 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(479) | Object readAddr45 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(480) | Object readAddr46 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(481) | Object readAddr47 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(482) | Object readAddr48 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(483) | Object readAddr49 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(484) | Object readAddr50 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(485) | Object readAddr51 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(486) | Object readAddr52 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(487) | Object readAddr53 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(488) | Object readAddr54 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(489) | Object readAddr55 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(490) | Object readAddr56 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(491) | Object readAddr57 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(492) | Object readAddr58 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(493) | Object readAddr59 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(494) | Object readAddr60 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(495) | Object readAddr61 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(496) | Object readAddr62 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(497) | Object readAddr63 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(498) | Object readAddr64 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(499) | Object readAddr65 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(500) | Object readAddr66 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(501) | Object readAddr67 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : lsram_2048to139264x8.v(502) | Object readAddr68 is declared but not assigned. Either assign a value or remove the declaration. @W:CL168 : lsram_2048to139264x8.v(9909) | Removing instance block17 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9889) | Removing instance block18 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9868) | Removing instance block19 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9848) | Removing instance block20 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9827) | Removing instance block21 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9807) | Removing instance block22 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9786) | Removing instance block23 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9765) | Removing instance block24 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9744) | Removing instance block25 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9724) | Removing instance block26 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9704) | Removing instance block27 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9683) | Removing instance block28 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9662) | Removing instance block29 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9640) | Removing instance block30 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9619) | Removing instance block31 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9599) | Removing instance block32 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9578) | Removing instance block33 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9558) | Removing instance block34 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9538) | Removing instance block35 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9517) | Removing instance block36 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9497) | Removing instance block37 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9477) | Removing instance block38 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9456) | Removing instance block39 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9435) | Removing instance block40 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9415) | Removing instance block41 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9394) | Removing instance block42 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9373) | Removing instance block43 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9352) | Removing instance block44 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9331) | Removing instance block45 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9310) | Removing instance block46 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9289) | Removing instance block47 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9268) | Removing instance block48 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9247) | Removing instance block49 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9226) | Removing instance block50 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9205) | Removing instance block51 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9184) | Removing instance block52 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9163) | Removing instance block53 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9142) | Removing instance block54 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9121) | Removing instance block55 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9100) | Removing instance block56 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9079) | Removing instance block57 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9058) | Removing instance block58 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9037) | Removing instance block59 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(9016) | Removing instance block60 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(8995) | Removing instance block61 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(8974) | Removing instance block62 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(8953) | Removing instance block63 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(8933) | Removing instance block64 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(8913) | Removing instance block65 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(8893) | Removing instance block66 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(8872) | Removing instance block67 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL168 : lsram_2048to139264x8.v(8851) | Removing instance block68 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL169 : lsram_2048to139264x8.v(586) | Pruning unused register ckRdAddr[15:9]. Make sure that there are no unused intermediate registers. @N:CG179 : SramCtrlIf.v(356) | Removing redundant assignment. @W:CG133 : SramCtrlIf.v(103) | Object ahbsram_wdata_upd_r is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : SramCtrlIf.v(104) | Object u_ahbsram_wdata_upd_r is declared but not assigned. Either assign a value or remove the declaration. @W:CG360 : SramCtrlIf.v(111) | Removing wire u_BUSY_all_0, as there is no assignment to it. @W:CG360 : SramCtrlIf.v(112) | Removing wire u_BUSY_all_1, as there is no assignment to it. @W:CG360 : SramCtrlIf.v(113) | Removing wire u_BUSY_all_2, as there is no assignment to it. @W:CG360 : SramCtrlIf.v(114) | Removing wire u_BUSY_all_3, as there is no assignment to it. @W:CG360 : SramCtrlIf.v(116) | Removing wire l_BUSY_all_1, as there is no assignment to it. @W:CG360 : SramCtrlIf.v(117) | Removing wire l_BUSY_all_2, as there is no assignment to it. @W:CG360 : SramCtrlIf.v(118) | Removing wire l_BUSY_all_3, as there is no assignment to it. @N:CG364 : CoreAHBLSRAM.v(29) | Synthesizing module PCIe_Demo_COREAHBLSRAM_0_COREAHBLSRAM in library COREAHBLSRAM_LIB. FAMILY=32'b00000000000000000000000000011000 AHB_DWIDTH=32'b00000000000000000000000000100000 AHB_AWIDTH=32'b00000000000000000000000000100000 LSRAM_NUM_LOCATIONS_DWIDTH32=32'b00000000000000001000100000000000 USRAM_NUM_LOCATIONS_DWIDTH32=32'b00000000000000000000001000000000 SEL_SRAM_TYPE=32'b00000000000000000000000000000000 SYNC_RESET=32'b00000000000000000000000000000000 Generated name = PCIe_Demo_COREAHBLSRAM_0_COREAHBLSRAM_24s_32s_32s_34816s_512s_0s_0s @W:CG775 : coreahbtoapb3.v(8) | Found Component COREAHBTOAPB3 in library COREAHBTOAPB3_LIB @N:CG364 : coreahbtoapb3_ahbtoapbsm.v(8) | Synthesizing module CAHBtoAPB3O in library COREAHBTOAPB3_LIB. SYNC_RESET=32'b00000000000000000000000000000000 CAHBtoAPB3O0=2'b00 CAHBtoAPB3I0=2'b01 CAHBtoAPB3l0=3'b000 CAHBtoAPB3O1=3'b001 CAHBtoAPB3I1=3'b010 CAHBtoAPB3l1=3'b011 CAHBtoAPB3OOI=3'b100 Generated name = CAHBtoAPB3O_0s_0_1_0_1_2_3_4 @N:CG364 : coreahbtoapb3_penablescheduler.v(8) | Synthesizing module CAHBtoAPB3OIl in library COREAHBTOAPB3_LIB. SYNC_RESET=32'b00000000000000000000000000000000 CAHBtoAPB3l0=2'b00 CAHBtoAPB3OOI=2'b01 CAHBtoAPB3IIl=2'b10 Generated name = CAHBtoAPB3OIl_0s_0_1_2 @N:CG364 : coreahbtoapb3_apbaddrdata.v(8) | Synthesizing module CAHBtoAPB3l1I in library COREAHBTOAPB3_LIB. SYNC_RESET=32'b00000000000000000000000000000000 Generated name = CAHBtoAPB3l1I_0s @N:CG364 : coreahbtoapb3.v(8) | Synthesizing module COREAHBTOAPB3 in library COREAHBTOAPB3_LIB. FAMILY=32'b00000000000000000000000000011000 SYNC_RESET=32'b00000000000000000000000000000000 Generated name = COREAHBTOAPB3_24s_0s @W:CG775 : coreapb3.v(13) | Found Component CoreAPB3 in library COREAPB3_LIB @N:CG364 : coreapb3_muxptob3.v(13) | Synthesizing module CAPB3II in library COREAPB3_LIB. @N:CG364 : coreapb3.v(13) | Synthesizing module CoreAPB3 in library COREAPB3_LIB. APB_DWIDTH=6'b100000 IADDR_OPTION=32'b00000000000000000000000000000000 APBSLOT0ENABLE=1'b1 APBSLOT1ENABLE=1'b0 APBSLOT2ENABLE=1'b0 APBSLOT3ENABLE=1'b0 APBSLOT4ENABLE=1'b0 APBSLOT5ENABLE=1'b0 APBSLOT6ENABLE=1'b0 APBSLOT7ENABLE=1'b0 APBSLOT8ENABLE=1'b0 APBSLOT9ENABLE=1'b0 APBSLOT10ENABLE=1'b0 APBSLOT11ENABLE=1'b0 APBSLOT12ENABLE=1'b0 APBSLOT13ENABLE=1'b0 APBSLOT14ENABLE=1'b0 APBSLOT15ENABLE=1'b0 SC_0=1'b0 SC_1=1'b0 SC_2=1'b0 SC_3=1'b0 SC_4=1'b0 SC_5=1'b0 SC_6=1'b0 SC_7=1'b0 SC_8=1'b0 SC_9=1'b0 SC_10=1'b0 SC_11=1'b0 SC_12=1'b0 SC_13=1'b0 SC_14=1'b0 SC_15=1'b0 MADDR_BITS=6'b011100 UPR_NIBBLE_POSN=4'b0110 FAMILY=32'b00000000000000000000000000011000 SYNC_RESET=32'b00000000000000000000000000000000 CAPB3OOl=32'b00000000000000000000000000000000 CAPB3IOl=32'b00000000000000000000000000000001 CAPB3lOl=32'b00000000000000000000000000000010 CAPB3OIl=32'b00000000000000000000000000000011 CAPB3IIl=32'b00000000000000000000000000000100 CAPB3lIl=32'b00000000000000000000000000000101 CAPB3Oll=32'b00000000000000000000000000000110 CAPB3Ill=32'b00000000000000000000000000000111 CAPB3lll=32'b00000000000000000000000000001000 CAPB3O0l=32'b00000000000000000000000000001001 CAPB3I0l=32'b00000000000000000000000000001010 CAPB3l0l=32'b00000000000000000000000000001011 CAPB3O1l=32'b00000000000000000000000000001100 CAPB3I1l=32'b00000000000000000000000000001101 CAPB3l1l=32'b00000000000000000000000000001110 CAPB3OO0=32'b00000000000000000000000000001111 CAPB3IO0=32'b00000000000000000000000000010000 CAPB3lO0=32'b00000000000000000000000000010001 CAPB3OI0=16'b0000000000000001 CAPB3II0=16'b0000000000000000 CAPB3lI0=16'b0000000000000000 CAPB3Ol0=16'b0000000000000000 CAPB3Il0=16'b0000000000000000 CAPB3ll0=16'b0000000000000000 CAPB3O00=16'b0000000000000000 CAPB3I00=16'b0000000000000000 CAPB3l00=16'b0000000000000000 CAPB3O10=16'b0000000000000000 CAPB3I10=16'b0000000000000000 CAPB3l10=16'b0000000000000000 CAPB3OO1=16'b0000000000000000 CAPB3IO1=16'b0000000000000000 CAPB3lO1=16'b0000000000000000 CAPB3OI1=16'b0000000000000000 CAPB3II1=16'b0000000000000000 CAPB3lI1=16'b0000000000000000 Generated name = CoreAPB3_Z7 @W:CG360 : coreapb3.v(1495) | Removing wire CAPB3IlOI, as there is no assignment to it. @N:CG364 : coregpio.v(23) | Synthesizing module PCIe_Demo_CoreGPIO_0_CoreGPIO in library work. IO_NUM=32'b00000000000000000000000000001001 APB_WIDTH=32'b00000000000000000000000000100000 OE_TYPE=1'b1 INT_BUS=1'b0 FIXED_CONFIG_0=1'b1 FIXED_CONFIG_1=1'b1 FIXED_CONFIG_2=1'b1 FIXED_CONFIG_3=1'b1 FIXED_CONFIG_4=1'b1 FIXED_CONFIG_5=1'b1 FIXED_CONFIG_6=1'b1 FIXED_CONFIG_7=1'b1 FIXED_CONFIG_8=1'b1 FIXED_CONFIG_9=1'b0 FIXED_CONFIG_10=1'b0 FIXED_CONFIG_11=1'b0 FIXED_CONFIG_12=1'b0 FIXED_CONFIG_13=1'b0 FIXED_CONFIG_14=1'b0 FIXED_CONFIG_15=1'b0 FIXED_CONFIG_16=1'b0 FIXED_CONFIG_17=1'b0 FIXED_CONFIG_18=1'b0 FIXED_CONFIG_19=1'b0 FIXED_CONFIG_20=1'b0 FIXED_CONFIG_21=1'b0 FIXED_CONFIG_22=1'b0 FIXED_CONFIG_23=1'b0 FIXED_CONFIG_24=1'b0 FIXED_CONFIG_25=1'b0 FIXED_CONFIG_26=1'b0 FIXED_CONFIG_27=1'b0 FIXED_CONFIG_28=1'b0 FIXED_CONFIG_29=1'b0 FIXED_CONFIG_30=1'b0 FIXED_CONFIG_31=1'b0 IO_TYPE_0=2'b10 IO_TYPE_1=2'b10 IO_TYPE_2=2'b10 IO_TYPE_3=2'b10 IO_TYPE_4=2'b10 IO_TYPE_5=2'b10 IO_TYPE_6=2'b10 IO_TYPE_7=2'b10 IO_TYPE_8=2'b10 IO_TYPE_9=2'b00 IO_TYPE_10=2'b00 IO_TYPE_11=2'b00 IO_TYPE_12=2'b00 IO_TYPE_13=2'b00 IO_TYPE_14=2'b00 IO_TYPE_15=2'b00 IO_TYPE_16=2'b00 IO_TYPE_17=2'b00 IO_TYPE_18=2'b00 IO_TYPE_19=2'b00 IO_TYPE_20=2'b00 IO_TYPE_21=2'b00 IO_TYPE_22=2'b00 IO_TYPE_23=2'b00 IO_TYPE_24=2'b00 IO_TYPE_25=2'b00 IO_TYPE_26=2'b00 IO_TYPE_27=2'b00 IO_TYPE_28=2'b00 IO_TYPE_29=2'b00 IO_TYPE_30=2'b00 IO_TYPE_31=2'b00 IO_INT_TYPE_0=3'b111 IO_INT_TYPE_1=3'b111 IO_INT_TYPE_2=3'b111 IO_INT_TYPE_3=3'b111 IO_INT_TYPE_4=3'b111 IO_INT_TYPE_5=3'b111 IO_INT_TYPE_6=3'b111 IO_INT_TYPE_7=3'b111 IO_INT_TYPE_8=3'b111 IO_INT_TYPE_9=3'b111 IO_INT_TYPE_10=3'b111 IO_INT_TYPE_11=3'b111 IO_INT_TYPE_12=3'b111 IO_INT_TYPE_13=3'b111 IO_INT_TYPE_14=3'b111 IO_INT_TYPE_15=3'b111 IO_INT_TYPE_16=3'b111 IO_INT_TYPE_17=3'b111 IO_INT_TYPE_18=3'b111 IO_INT_TYPE_19=3'b111 IO_INT_TYPE_20=3'b111 IO_INT_TYPE_21=3'b111 IO_INT_TYPE_22=3'b111 IO_INT_TYPE_23=3'b111 IO_INT_TYPE_24=3'b111 IO_INT_TYPE_25=3'b111 IO_INT_TYPE_26=3'b111 IO_INT_TYPE_27=3'b111 IO_INT_TYPE_28=3'b111 IO_INT_TYPE_29=3'b111 IO_INT_TYPE_30=3'b111 IO_INT_TYPE_31=3'b111 IO_VAL_0=1'b0 IO_VAL_1=1'b0 IO_VAL_2=1'b0 IO_VAL_3=1'b0 IO_VAL_4=1'b0 IO_VAL_5=1'b0 IO_VAL_6=1'b0 IO_VAL_7=1'b0 IO_VAL_8=1'b0 IO_VAL_9=1'b0 IO_VAL_10=1'b0 IO_VAL_11=1'b0 IO_VAL_12=1'b0 IO_VAL_13=1'b0 IO_VAL_14=1'b0 IO_VAL_15=1'b0 IO_VAL_16=1'b0 IO_VAL_17=1'b0 IO_VAL_18=1'b0 IO_VAL_19=1'b0 IO_VAL_20=1'b0 IO_VAL_21=1'b0 IO_VAL_22=1'b0 IO_VAL_23=1'b0 IO_VAL_24=1'b0 IO_VAL_25=1'b0 IO_VAL_26=1'b0 IO_VAL_27=1'b0 IO_VAL_28=1'b0 IO_VAL_29=1'b0 IO_VAL_30=1'b0 IO_VAL_31=1'b0 FIXED_CONFIG=32'b11111111100000000000000000000000 IO_INT_TYPE=96'b111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 IO_TYPE=64'b1010101010101010100000000000000000000000000000000000000000000000 IO_VAL=32'b00000000000000000000000000000000 Generated name = PCIe_Demo_CoreGPIO_0_CoreGPIO_Z8 @W:CL169 : coregpio.v(464) | Pruning unused register xhdl1.GEN_BITS[8].APB_32.edge_both[8]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(444) | Pruning unused register xhdl1.GEN_BITS[8].APB_32.edge_neg[8]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(424) | Pruning unused register xhdl1.GEN_BITS[8].APB_32.edge_pos[8]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(464) | Pruning unused register xhdl1.GEN_BITS[7].APB_32.edge_both[7]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(444) | Pruning unused register xhdl1.GEN_BITS[7].APB_32.edge_neg[7]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(424) | Pruning unused register xhdl1.GEN_BITS[7].APB_32.edge_pos[7]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(464) | Pruning unused register xhdl1.GEN_BITS[6].APB_32.edge_both[6]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(444) | Pruning unused register xhdl1.GEN_BITS[6].APB_32.edge_neg[6]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(424) | Pruning unused register xhdl1.GEN_BITS[6].APB_32.edge_pos[6]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(464) | Pruning unused register xhdl1.GEN_BITS[5].APB_32.edge_both[5]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(444) | Pruning unused register xhdl1.GEN_BITS[5].APB_32.edge_neg[5]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(424) | Pruning unused register xhdl1.GEN_BITS[5].APB_32.edge_pos[5]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(464) | Pruning unused register xhdl1.GEN_BITS[4].APB_32.edge_both[4]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(444) | Pruning unused register xhdl1.GEN_BITS[4].APB_32.edge_neg[4]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(424) | Pruning unused register xhdl1.GEN_BITS[4].APB_32.edge_pos[4]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(464) | Pruning unused register xhdl1.GEN_BITS[3].APB_32.edge_both[3]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(444) | Pruning unused register xhdl1.GEN_BITS[3].APB_32.edge_neg[3]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(424) | Pruning unused register xhdl1.GEN_BITS[3].APB_32.edge_pos[3]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(464) | Pruning unused register xhdl1.GEN_BITS[2].APB_32.edge_both[2]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(444) | Pruning unused register xhdl1.GEN_BITS[2].APB_32.edge_neg[2]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(424) | Pruning unused register xhdl1.GEN_BITS[2].APB_32.edge_pos[2]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(464) | Pruning unused register xhdl1.GEN_BITS[1].APB_32.edge_both[1]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(444) | Pruning unused register xhdl1.GEN_BITS[1].APB_32.edge_neg[1]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(424) | Pruning unused register xhdl1.GEN_BITS[1].APB_32.edge_pos[1]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(464) | Pruning unused register xhdl1.GEN_BITS[0].APB_32.edge_both[0]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(444) | Pruning unused register xhdl1.GEN_BITS[0].APB_32.edge_neg[0]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(424) | Pruning unused register xhdl1.GEN_BITS[0].APB_32.edge_pos[0]. Make sure that there are no unused intermediate registers. @W:CL190 : coregpio.v(484) | Optimizing register bit xhdl1.GEN_BITS[0].APB_32.INTR_reg[0] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : coregpio.v(484) | Optimizing register bit xhdl1.GEN_BITS[1].APB_32.INTR_reg[1] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : coregpio.v(484) | Optimizing register bit xhdl1.GEN_BITS[2].APB_32.INTR_reg[2] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : coregpio.v(484) | Optimizing register bit xhdl1.GEN_BITS[3].APB_32.INTR_reg[3] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : coregpio.v(484) | Optimizing register bit xhdl1.GEN_BITS[4].APB_32.INTR_reg[4] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : coregpio.v(484) | Optimizing register bit xhdl1.GEN_BITS[5].APB_32.INTR_reg[5] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : coregpio.v(484) | Optimizing register bit xhdl1.GEN_BITS[6].APB_32.INTR_reg[6] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : coregpio.v(484) | Optimizing register bit xhdl1.GEN_BITS[7].APB_32.INTR_reg[7] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : coregpio.v(484) | Optimizing register bit xhdl1.GEN_BITS[8].APB_32.INTR_reg[8] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL169 : coregpio.v(484) | Pruning unused register xhdl1.GEN_BITS[0].APB_32.INTR_reg[0]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(484) | Pruning unused register xhdl1.GEN_BITS[1].APB_32.INTR_reg[1]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(484) | Pruning unused register xhdl1.GEN_BITS[2].APB_32.INTR_reg[2]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(484) | Pruning unused register xhdl1.GEN_BITS[3].APB_32.INTR_reg[3]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(484) | Pruning unused register xhdl1.GEN_BITS[4].APB_32.INTR_reg[4]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(484) | Pruning unused register xhdl1.GEN_BITS[5].APB_32.INTR_reg[5]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(484) | Pruning unused register xhdl1.GEN_BITS[6].APB_32.INTR_reg[6]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(484) | Pruning unused register xhdl1.GEN_BITS[7].APB_32.INTR_reg[7]. Make sure that there are no unused intermediate registers. @W:CL169 : coregpio.v(484) | Pruning unused register xhdl1.GEN_BITS[8].APB_32.INTR_reg[8]. Make sure that there are no unused intermediate registers. @W:CG775 : CoreSysServices.v(30) | Found Component PCIe_Demo_CORESYSSERVICES_0_CORESYSSERVICES in library CORESYSSERVICES_LIB @N:CG364 : CoreSysServices_UserIF.v(30) | Synthesizing module CoreSysServices_UserIF in library CORESYSSERVICES_LIB. SNSERVICE=32'b00000000000000000000000000000001 DSNPTR=32'b00100000000000000000000000000000 UCSERVICE=32'b00000000000000000000000000000000 USERCODEPTR=32'b00100000000000000000000000000000 DCSERVICE=32'b00000000000000000000000000000000 DEVICECERTPTR=32'b00100000000000000000000000000000 SECDCSERVICE=32'b00000000000000000000000000000000 SECONDECCCERTPTR=32'b00100000000000000000000000000000 UDVSERVICE=32'b00000000000000000000000000000000 DESIGNVERPTR=32'b00100000000000000000000000000000 CRYPTOAES128SERVICE=32'b00000000000000000000000000000000 CRYPTOAES128DATAPTR=32'b00100000000000000000000000000000 CRYPTOAES256SERVICE=32'b00000000000000000000000000000000 CRYPTOAES256DATAPTR=32'b00100000000000000000000000000000 CRYPTOSHA256SERVICE=32'b00000000000000000000000000000000 CRYPTOSHA256DATAPTR=32'b00100000000000000000000000000000 CRYPTORSLTPTR=32'b00100000000000000000000000000000 CRYPTODATAINPPTR=32'b00100000000000000000000000000000 CRYPTOHMACSERVICE=32'b00000000000000000000000000000000 CRYPTOHMACDATAPTR=32'b00100000000000000000000000000000 CRYPTOSRCADPTR=32'b00100000000000000000000000000000 CRYPTODSTADPTR=32'b00100000000000000000000000000000 FFSERVICE=32'b00000000000000000000000000000000 KEYTREESERVICE=32'b00000000000000000000000000000000 KEYTREEDATAPTR=32'b00100000000000000000000000000000 CHRESPSERVICE=32'b00000000000000000000000000000000 CHRESPPTR=32'b00100000000000000000000000000000 CHRESPKEYADDR=32'b00100000000000000000000000000000 NRBGSERVICE=32'b00000000000000000000000000000000 NRBGINSTPTR=32'b00100000000000000000000000000000 NRBGPERSTRINGPTR=32'b00100000000000000000000000000000 NRBGGENPTR=32'b00100000000000000000000000000000 NRBGREQDATAPTR=32'b00100000000000000000000000000000 NRBGRESEEDPTR=32'b00100000000000000000000000000000 NRBGADDINPPTR=32'b00100000000000000000000000000000 ZERSERVICE=32'b00000000000000000000000000000000 PROGIAPSERVICE=32'b00000000000000000000000000000000 PROGNVMDISERVICE=32'b00000000000000000000000000000000 PORDSERVICE=32'b00000000000000000000000000000000 ECCPOINTMULTSERVICE=32'b00000000000000000000000000000000 ECCPMULTDESC=32'b00100000000000000000000000000000 ECCPMULTPPTR=32'b00100000000000000000000000000000 ECCPMULTDPTR=32'b00100000000000000000000000000000 ECCPMULTQPTR=32'b00100000000000000000000000000000 ECCPOINTADDSERVICE=32'b00000000000000000000000000000000 ECCPADDDESC=32'b00100000000000000000000000000000 ECCPADDPPTR=32'b00100000000000000000000000000000 ECCPADDQPTR=32'b00100000000000000000000000000000 ECCPADDRPTR=32'b00100000000000000000000000000000 TAMPERDETECTSERVICE=32'b00000000000000000000000000000000 TAMPERCONTROLSERVICE=32'b00000000000000000000000000000000 PUFSERVICE=32'b00000000000000000000000000000000 PUFUSERACPTR=32'b00100000000000000000000000000000 PUFUSERKCPTR=32'b00100000000000000000000000000000 PUFUSERKEYPTR=32'b00100000000000000000000000000000 PUFPUBLICKEYPTR=32'b00100000000000000000000000000000 PUFPUBLICKEYADDR=32'b00100000000000000000000000000000 PUFSEEDPTR=32'b00100000000000000000000000000000 PUFSEEDADDR=32'b00100000000000000000000000000000 AHB_AWIDTH=32'b00000000000000000000000000100000 AHB_DWIDTH=32'b00000000000000000000000000100000 Generated name = CoreSysServices_UserIF_Z9 @W:CL169 : CoreSysServices_UserIF.v(789) | Pruning unused register cuhprior_flushdone_d3. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_UserIF.v(738) | Pruning unused register pord_d1. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_UserIF.v(738) | Pruning unused register pord_d2. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_UserIF.v(592) | Pruning unused register custatus_out_en_r. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_UserIF.v(522) | Pruning unused register pord_comb_d1. Make sure that there are no unused intermediate registers. @W:CL207 : CoreSysServices_UserIF.v(719) | All reachable assignments to pord assign 0, register removed by optimization. @W:CL190 : CoreSysServices_UserIF.v(505) | Optimizing register bit hprior_kp_busy_high to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_UserIF.v(653) | Optimizing register bit uclatchoptions_hold[0] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_UserIF.v(653) | Optimizing register bit uclatchoptions_hold[2] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_UserIF.v(653) | Optimizing register bit uclatchoptions_hold[3] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_UserIF.v(653) | Optimizing register bit uclatchoptions_hold[4] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_UserIF.v(653) | Optimizing register bit uclatchoptions_hold[5] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_UserIF.v(653) | Optimizing register bit ucmdbyte_req_hold[0] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_UserIF.v(653) | Optimizing register bit ucmdbyte_req_hold[1] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_UserIF.v(653) | Optimizing register bit ucmdbyte_req_hold[3] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_UserIF.v(653) | Optimizing register bit ucmdbyte_req_hold[5] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_UserIF.v(653) | Optimizing register bit ucmdbyte_req_hold[6] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_UserIF.v(653) | Optimizing register bit ucmdbyte_req_hold[7] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL279 : CoreSysServices_UserIF.v(653) | Pruning register bits 5 to 2 of uclatchoptions_hold[5:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : CoreSysServices_UserIF.v(653) | Pruning register bit 0 of uclatchoptions_hold[5:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : CoreSysServices_UserIF.v(653) | Pruning register bits 7 to 5 of ucmdbyte_req_hold[7:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : CoreSysServices_UserIF.v(653) | Pruning register bit 3 of ucmdbyte_req_hold[7:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : CoreSysServices_UserIF.v(653) | Pruning register bits 1 to 0 of ucmdbyte_req_hold[7:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL169 : CoreSysServices_UserIF.v(505) | Pruning unused register hprior_kp_busy_high. Make sure that there are no unused intermediate registers. @N:CG364 : igloo2.v(835) | Synthesizing module FLASH_FREEZE in library work. @N:CG364 : CoreSysServices_CmdDec.v(30) | Synthesizing module CoreSysServices_CmdDec in library CORESYSSERVICES_LIB. SNSERVICE=32'b00000000000000000000000000000001 DSNPTR=32'b00100000000000000000000000000000 UCSERVICE=32'b00000000000000000000000000000000 USERCODEPTR=32'b00100000000000000000000000000000 DCSERVICE=32'b00000000000000000000000000000000 DEVICECERTPTR=32'b00100000000000000000000000000000 SECDCSERVICE=32'b00000000000000000000000000000000 SECONDECCCERTPTR=32'b00100000000000000000000000000000 UDVSERVICE=32'b00000000000000000000000000000000 DESIGNVERPTR=32'b00100000000000000000000000000000 CRYPTOAES128SERVICE=32'b00000000000000000000000000000000 CRYPTOAES128DATAPTR=32'b00100000000000000000000000000000 CRYPTOAES256SERVICE=32'b00000000000000000000000000000000 CRYPTOAES256DATAPTR=32'b00100000000000000000000000000000 CRYPTOSHA256SERVICE=32'b00000000000000000000000000000000 CRYPTOSHA256DATAPTR=32'b00100000000000000000000000000000 CRYPTORSLTPTR=32'b00100000000000000000000000000000 CRYPTODATAINPPTR=32'b00100000000000000000000000000000 CRYPTOHMACSERVICE=32'b00000000000000000000000000000000 CRYPTOHMACDATAPTR=32'b00100000000000000000000000000000 CRYPTOSRCADPTR=32'b00100000000000000000000000000000 CRYPTODSTADPTR=32'b00100000000000000000000000000000 FFSERVICE=32'b00000000000000000000000000000000 KEYTREESERVICE=32'b00000000000000000000000000000000 KEYTREEDATAPTR=32'b00100000000000000000000000000000 CHRESPSERVICE=32'b00000000000000000000000000000000 CHRESPPTR=32'b00100000000000000000000000000000 CHRESPKEYADDR=32'b00100000000000000000000000000000 NRBGSERVICE=32'b00000000000000000000000000000000 NRBGINSTPTR=32'b00100000000000000000000000000000 NRBGPERSTRINGPTR=32'b00100000000000000000000000000000 NRBGGENPTR=32'b00100000000000000000000000000000 NRBGREQDATAPTR=32'b00100000000000000000000000000000 NRBGRESEEDPTR=32'b00100000000000000000000000000000 NRBGADDINPPTR=32'b00100000000000000000000000000000 ZERSERVICE=32'b00000000000000000000000000000000 PROGIAPSERVICE=32'b00000000000000000000000000000000 PROGNVMDISERVICE=32'b00000000000000000000000000000000 PORDSERVICE=32'b00000000000000000000000000000000 ECCPOINTMULTSERVICE=32'b00000000000000000000000000000000 ECCPMULTDESC=32'b00100000000000000000000000000000 ECCPMULTPPTR=32'b00100000000000000000000000000000 ECCPMULTDPTR=32'b00100000000000000000000000000000 ECCPMULTQPTR=32'b00100000000000000000000000000000 ECCPOINTADDSERVICE=32'b00000000000000000000000000000000 ECCPADDDESC=32'b00100000000000000000000000000000 ECCPADDPPTR=32'b00100000000000000000000000000000 ECCPADDQPTR=32'b00100000000000000000000000000000 ECCPADDRPTR=32'b00100000000000000000000000000000 TAMPERDETECTSERVICE=32'b00000000000000000000000000000000 TAMPERCONTROLSERVICE=32'b00000000000000000000000000000000 PUFSERVICE=32'b00000000000000000000000000000000 PUFUSERACPTR=32'b00100000000000000000000000000000 PUFUSERKCPTR=32'b00100000000000000000000000000000 PUFUSERKEYPTR=32'b00100000000000000000000000000000 PUFPUBLICKEYPTR=32'b00100000000000000000000000000000 PUFPUBLICKEYADDR=32'b00100000000000000000000000000000 PUFSEEDPTR=32'b00100000000000000000000000000000 PUFSEEDADDR=32'b00100000000000000000000000000000 AHB_AWIDTH=32'b00000000000000000000000000100000 AHB_DWIDTH=32'b00000000000000000000000000100000 C_IDLE=2'b00 C_REQ_PHASE=2'b01 C_RESP_PHASE=2'b10 REQ_IDLE=6'b000000 REQ_WAIT_MEMWR1=6'b000001 REQ_MEMWR_DESC=6'b000010 REQ_WAIT_MEMWR2=6'b000011 REQ_MEMWR_DATA=6'b000100 REQ_PHASE=6'b000101 REQ_FIIC_INT=6'b000111 REQ_POLL_CINT1=6'b001000 REQ_RDCOMM_STATUS1=6'b001001 REQ_WRCOMM_CTRL=6'b001010 REQ_WRCOMM_INT=6'b001011 REQ_WRCOMM_FRM=6'b001100 REQ_WRCOMM_DATA=6'b001101 REQ_POLL_CINT2=6'b001110 REQ_RDCOMM_STATUS2=6'b001111 REQ_WAIT_REG1=6'b010000 REQ_WAIT_REG2=6'b010001 REQ_WAIT_REG3=6'b010010 REQ_WAIT_REG4=6'b010011 REQ_WAIT_REG5=6'b010100 REQ_WAIT_REG6=6'b010101 REQ_WAIT_REG7=6'b010110 REQ_WAIT_REG8=6'b010111 REQ_WAIT_REG9=6'b011000 REQ_RD_INT=6'b011011 REQ_RDCOMM_INT=6'b011100 REQ_WAIT_REG10=6'b100001 REQ_WAIT_REG11=6'b100010 REQ_WAIT_REG12=6'b100011 REQ_WAIT_REG13=6'b100100 REQ_WRCOMM_CTRL2=6'b100101 REQ_WRCOMM_CTRL3=6'b100110 REQ_WRCOMM_CTRL4=6'b100111 REQ_WRCOMM_INT2=6'b101000 REQ_WAIT_MEMWR22=6'b101001 REQ_MEMWR_DATA1=6'b101010 REQ_WAIT_ASYNCRD1=6'b101011 REQ_RDCOMM_ASYNCFRM1=6'b101100 REQ_WAIT_ASYNCRD2=6'b101101 REQ_RDCOMM_ASYNCFRM2=6'b101110 REQ_ASYNC_OUT1=6'b110000 REQ_ASYNC_OUT2=6'b110001 REQ_WAIT_REG14=6'b110010 REQ_WRCOMM_DESC2=6'b110011 REQ_WAIT_REG15=6'b110100 RESP_IDLE=6'b000000 RESP_PHASE=6'b000001 RESP_RDCOMM_STATUS=6'b000011 RESP_RDCOMM_FRM=6'b000100 RESP_RDCOMM_DESC=6'b000101 RESP_RDCOMM_DATA=6'b000110 RESP_WAIT_MEMRD=6'b000111 RESP_MEMRD=6'b001000 RESP_POLL_CINT1=6'b001001 RESP_POLL_CINT4=6'b001100 RESP_REG1=6'b001101 RESP_REG4=6'b010000 RESP_REG5=6'b010001 RESP_REG6=6'b010010 RESP_REG7=6'b010011 RESP_REG8=6'b010100 RESP_REG9=6'b010101 RESP_WRCOMM_CTRL1=6'b010110 RESP_WAIT_REG11=6'b010111 RESP_WRCOMM_CTRL2=6'b011000 RESP_WAIT_REG12=6'b011001 RESP_RDCOMM_STATUS3=6'b011011 RESP_WRCOMM_INT3=6'b100100 RESP_WAIT_REG13=6'b100101 RESP_FIIC_INT=6'b100110 RESP_WAIT_REG14=6'b100111 RESP_WAIT_ASYNCRD1=6'b101000 RESP_RDCOMM_ASYNCFRM1=6'b101001 RESP_ASYNC_OUT1=6'b101100 RESP_WAIT_ASYNCRD3=6'b101110 RESP_RDCOMM_ASYNCFRM3=6'b101111 RESP_ASYNC_OUT3=6'b110000 ASYNCEVENT_POLL_IDLE=4'b0000 ASYNCEVENT_POLL_WAIT=4'b0001 ASYNCEVENT_POLL_CINT=4'b0010 ASYNCEVENT_REG1=4'b0011 ASYNCEVENT_RDCOMM_STATUS=4'b0100 ASYNCEVENT_WAIT_RD1=4'b0101 ASYNCEVENT_RDCOMM_FRM1=4'b0110 ASYNCEVENT_RDCOMM_OUT1=4'b0111 ASYNCEVENT_WAIT=4'b1000 ASYNCEVENT_PHASE=4'b1001 ASYNCEVENT_WAIT_REG11=4'b1010 ASYNCEVENT_WRCOMM_CTRL1=4'b1011 ASYNCEVENT_WAIT_REG13=4'b1100 ASYNCEVENT_FIIC_INT=4'b1101 ASYNCEVENT_WAIT_REG14=4'b1110 ASYNCEVENT_WRCOMM_INT3=4'b1111 COMM_CTRL_REG=32'b01000000000000010110000000000000 COMM_STATUS_REG=32'b01000000000000010110000000000100 COMM_INTEN_REG=32'b01000000000000010110000000001000 COMM_DATA8_REG=32'b01000000000000010110000000010000 COMM_DATA32_REG=32'b01000000000000010110000000010100 COMM_FRM8_REG=32'b01000000000000010110000000011000 COMM_FRM32_REG=32'b01000000000000010110000000011100 Generated name = CoreSysServices_CmdDec_Z10 @N:CG179 : CoreSysServices_CmdDec.v(1912) | Removing redundant assignment. @W:CG133 : CoreSysServices_CmdDec.v(418) | Object cfwr_req_d1 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : CoreSysServices_CmdDec.v(436) | Object cfsrc_addr_int is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : CoreSysServices_CmdDec.v(437) | Object cfdst_addr_int is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : CoreSysServices_CmdDec.v(447) | Object memwr_data is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : CoreSysServices_CmdDec.v(470) | Object req_srcreg_addr is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : CoreSysServices_CmdDec.v(472) | Object req_srcreg_data is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : CoreSysServices_CmdDec.v(512) | Object cuhprior_flushdone_d1 is declared but not assigned. Either assign a value or remove the declaration. @W:CG360 : CoreSysServices_CmdDec.v(555) | Removing wire cfwr_req_int, as there is no assignment to it. @W:CG360 : CoreSysServices_CmdDec.v(557) | Removing wire cfwr_req_c, as there is no assignment to it. @W:CG360 : CoreSysServices_CmdDec.v(563) | Removing wire cfdata_w_o, as there is no assignment to it. @W:CL168 : CoreSysServices_CmdDec.v(2927) | Removing instance FLASH_FREEZE_0 because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive. @W:CL169 : CoreSysServices_CmdDec.v(2980) | Pruning unused register FF_exit. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(2962) | Pruning unused register FF_exit_led. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(2949) | Pruning unused register FF_entry_led. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(2939) | Pruning unused register FF_entry. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(2889) | Pruning unused register cunvm_bfr_iapverify_done_d1. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(2770) | Pruning unused register latchen_hrdata_r. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(2461) | Pruning unused register fiicreg_done_d1. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(2461) | Pruning unused register commctrlreg_done_d1. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(2461) | Pruning unused register commpoll_done_d1. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1924) | Pruning unused register set_puf_getkcnum_r. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1906) | Pruning unused register wait_count[2:0]. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1731) | Pruning unused register fctrans_done_d2. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1611) | Pruning unused register pord_d1. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1611) | Pruning unused register pord_d2. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1582) | Pruning unused register req_phase_active_pulse. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1532) | Pruning unused register resp_data_done_d1. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1532) | Pruning unused register req_phase_active_d1. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1033) | Pruning unused register resp_desc_done. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1033) | Pruning unused register resp_frm_done. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1015) | Pruning unused register req_desc_done. Make sure that there are no unused intermediate registers. @W:CL271 : CoreSysServices_CmdDec.v(1924) | Pruning unused bits 31 to 8 of fcdataout_d1[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL113 : CoreSysServices_CmdDec.v(2811) | Feedback mux created for signal cutamper_msg[7:0]. To avoid the feedback mux, assign values explicitly under all conditions of conditional assignment statements. @W:CL207 : CoreSysServices_CmdDec.v(2786) | All reachable assignments to cutamper_msg_valid assign 0, register removed by optimization. @W:CL177 : CoreSysServices_CmdDec.v(2461) | Sharing sequential element fcpop_d1. Add a syn_preserve attribute to the element to prevent sharing. @W:CL177 : CoreSysServices_CmdDec.v(1924) | Sharing sequential element tamper_fail_valid_r. Add a syn_preserve attribute to the element to prevent sharing. @W:CL177 : CoreSysServices_CmdDec.v(1924) | Sharing sequential element tamper_detect_valid_r. Add a syn_preserve attribute to the element to prevent sharing. @W:CL207 : CoreSysServices_CmdDec.v(1594) | All reachable assignments to pord assign 0, register removed by optimization. @W:CL250 : CoreSysServices_CmdDec.v(2811) | All reachable assignments to cutamper_msg[7:0] assign 0, register removed by optimization @W:CL190 : CoreSysServices_CmdDec.v(1944) | Optimizing register bit cutamper_detect_valid to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1944) | Optimizing register bit cutamper_fail_valid to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[0] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[1] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[5] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[6] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[7] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[8] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[9] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[10] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[11] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[12] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[15] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[17] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[19] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[20] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[21] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[22] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[23] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[24] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[25] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[26] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[27] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[28] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[29] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_addr_d1[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[0] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[2] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[5] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[6] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[8] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[9] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[10] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[11] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[12] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[13] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[14] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[15] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[16] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[17] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[19] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[20] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[21] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[22] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[23] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[24] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[25] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[26] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[27] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[28] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[30] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(2889) | Optimizing register bit resp_srcreg_data_d1[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL260 : CoreSysServices_CmdDec.v(2889) | Pruning register bit 31 of resp_srcreg_addr_d1[31:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : CoreSysServices_CmdDec.v(2889) | Pruning register bits 29 to 17 of resp_srcreg_addr_d1[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : CoreSysServices_CmdDec.v(2889) | Pruning register bit 15 of resp_srcreg_addr_d1[31:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : CoreSysServices_CmdDec.v(2889) | Pruning register bits 12 to 5 of resp_srcreg_addr_d1[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL279 : CoreSysServices_CmdDec.v(2889) | Pruning register bits 1 to 0 of resp_srcreg_addr_d1[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL279 : CoreSysServices_CmdDec.v(2889) | Pruning register bits 31 to 30 of resp_srcreg_data_d1[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL279 : CoreSysServices_CmdDec.v(2889) | Pruning register bits 28 to 8 of resp_srcreg_data_d1[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL279 : CoreSysServices_CmdDec.v(2889) | Pruning register bits 6 to 5 of resp_srcreg_data_d1[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : CoreSysServices_CmdDec.v(2889) | Pruning register bit 2 of resp_srcreg_data_d1[31:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : CoreSysServices_CmdDec.v(2889) | Pruning register bit 0 of resp_srcreg_data_d1[31:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL169 : CoreSysServices_CmdDec.v(1944) | Pruning unused register cutamper_detect_valid. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1944) | Pruning unused register cutamper_fail_valid. Make sure that there are no unused intermediate registers. @N:CG364 : CoreSysServices_FSMCtrl.v(30) | Synthesizing module CoreSysServices_FSMCtrl in library CORESYSSERVICES_LIB. @W:CG133 : CoreSysServices_FSMCtrl.v(236) | Object rvalid_out_en_d1 is declared but not assigned. Either assign a value or remove the declaration. @W:CG133 : CoreSysServices_FSMCtrl.v(237) | Object rvalid_out_en_d2 is declared but not assigned. Either assign a value or remove the declaration. @W:CG360 : CoreSysServices_FSMCtrl.v(245) | Removing wire fmhaddr_lat, as there is no assignment to it. @W:CL169 : CoreSysServices_FSMCtrl.v(952) | Pruning unused register busreq_prev. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_FSMCtrl.v(934) | Pruning unused register pop_d1. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_FSMCtrl.v(868) | Pruning unused register fmhtrans_int2[1:0]. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_FSMCtrl.v(732) | Pruning unused register haddr_prev[29:0]. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_FSMCtrl.v(709) | Pruning unused register latch_addr_d2. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_FSMCtrl.v(709) | Pruning unused register latch_addr_d3. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_FSMCtrl.v(639) | Pruning unused register latch_addr_d1. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_FSMCtrl.v(627) | Pruning unused register state_prev_clk[3:0]. Make sure that there are no unused intermediate registers. @W:CL190 : CoreSysServices_FSMCtrl.v(293) | Optimizing register bit fmhburst_d1[1] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_FSMCtrl.v(293) | Optimizing register bit fmhburst_d1[2] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_FSMCtrl.v(853) | Optimizing register bit fmhtrans_int[0] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL260 : CoreSysServices_FSMCtrl.v(853) | Pruning register bit 0 of fmhtrans_int[1:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : CoreSysServices_FSMCtrl.v(293) | Pruning register bits 2 to 1 of fmhburst_d1[2:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @N:CG364 : CoreSysServices_AHBLMasterIF.v(30) | Synthesizing module CoreSysServices_AHBLMasterIF in library CORESYSSERVICES_LIB. @N:CG364 : CoreSysServices.v(30) | Synthesizing module PCIe_Demo_CORESYSSERVICES_0_CORESYSSERVICES in library CORESYSSERVICES_LIB. SNSERVICE=32'b00000000000000000000000000000001 DSNPTR=32'b00100000000000000000000000000000 UCSERVICE=32'b00000000000000000000000000000000 USERCODEPTR=32'b00100000000000000000000000000000 DCSERVICE=32'b00000000000000000000000000000000 DEVICECERTPTR=32'b00100000000000000000000000000000 SECDCSERVICE=32'b00000000000000000000000000000000 SECONDECCCERTPTR=32'b00100000000000000000000000000000 UDVSERVICE=32'b00000000000000000000000000000000 DESIGNVERPTR=32'b00100000000000000000000000000000 CRYPTOAES128SERVICE=32'b00000000000000000000000000000000 CRYPTOAES128DATAPTR=32'b00100000000000000000000000000000 CRYPTOAES256SERVICE=32'b00000000000000000000000000000000 CRYPTOAES256DATAPTR=32'b00100000000000000000000000000000 CRYPTOSRCADPTR=32'b00100000000000000000000000000000 CRYPTODSTADPTR=32'b00100000000000000000000000000000 CRYPTOSHA256SERVICE=32'b00000000000000000000000000000000 CRYPTOSHA256DATAPTR=32'b00100000000000000000000000000000 CRYPTORSLTPTR=32'b00100000000000000000000000000000 CRYPTODATAINPPTR=32'b00100000000000000000000000000000 CRYPTOHMACSERVICE=32'b00000000000000000000000000000000 CRYPTOHMACDATAPTR=32'b00100000000000000000000000000000 FFSERVICE=32'b00000000000000000000000000000000 KEYTREESERVICE=32'b00000000000000000000000000000000 KEYTREEDATAPTR=32'b00100000000000000000000000000000 CHRESPSERVICE=32'b00000000000000000000000000000000 CHRESPPTR=32'b00100000000000000000000000000000 CHRESPKEYADDR=32'b00100000000000000000000000000000 NRBGSERVICE=32'b00000000000000000000000000000000 NRBGINSTPTR=32'b00100000000000000000000000000000 NRBGPERSTRINGPTR=32'b00100000000000000000000000000000 NRBGGENPTR=32'b00100000000000000000000000000000 NRBGREQDATAPTR=32'b00100000000000000000000000000000 NRBGRESEEDPTR=32'b00100000000000000000000000000000 NRBGADDINPPTR=32'b00100000000000000000000000000000 ZERSERVICE=32'b00000000000000000000000000000000 PROGIAPSERVICE=32'b00000000000000000000000000000000 PROGNVMDISERVICE=32'b00000000000000000000000000000000 PORDSERVICE=32'b00000000000000000000000000000000 ECCPOINTMULTSERVICE=32'b00000000000000000000000000000000 ECCPMULTDESC=32'b00100000000000000000000000000000 ECCPMULTPPTR=32'b00100000000000000000000000000000 ECCPMULTDPTR=32'b00100000000000000000000000000000 ECCPMULTQPTR=32'b00100000000000000000000000000000 ECCPOINTADDSERVICE=32'b00000000000000000000000000000000 ECCPADDDESC=32'b00100000000000000000000000000000 ECCPADDPPTR=32'b00100000000000000000000000000000 ECCPADDQPTR=32'b00100000000000000000000000000000 ECCPADDRPTR=32'b00100000000000000000000000000000 TAMPERDETECTSERVICE=32'b00000000000000000000000000000000 TAMPERCONTROLSERVICE=32'b00000000000000000000000000000000 PUFSERVICE=32'b00000000000000000000000000000000 PUFUSERACPTR=32'b00100000000000000000000000000000 PUFUSERKCPTR=32'b00100000000000000000000000000000 PUFUSERKEYPTR=32'b00100000000000000000000000000000 PUFPUBLICKEYPTR=32'b00100000000000000000000000000000 PUFPUBLICKEYADDR=32'b00100000000000000000000000000000 PUFSEEDPTR=32'b00100000000000000000000000000000 PUFSEEDADDR=32'b00100000000000000000000000000000 AHB_AWIDTH=32'b00000000000000000000000000100000 AHB_DWIDTH=32'b00000000000000000000000000100000 Generated name = PCIe_Demo_CORESYSSERVICES_0_CORESYSSERVICES_Z11 @W:CG360 : CoreSysServices.v(259) | Removing wire cfburst_len_o, as there is no assignment to it. @W:CG360 : CoreSysServices.v(265) | Removing wire ustatus_resp_o, as there is no assignment to it. @W:CG360 : CoreSysServices.v(266) | Removing wire ubusy_o, as there is no assignment to it. @W:CG360 : CoreSysServices.v(267) | Removing wire udata_en_o, as there is no assignment to it. @W:CG360 : CoreSysServices.v(268) | Removing wire udata_valid_o, as there is no assignment to it. @W:CG360 : CoreSysServices.v(269) | Removing wire udata_r_o, as there is no assignment to it. @W:CG360 : CoreSysServices.v(275) | Removing wire uclatchpord_o, as there is no assignment to it. @W:CG360 : CoreSysServices.v(281) | Removing wire uccrypto_opmode_o, as there is no assignment to it. @W:CG360 : CoreSysServices.v(304) | Removing wire cudata_wen_o, as there is no assignment to it. @N:CG364 : Debounce.v(20) | Synthesizing module DEBOUNCE in library work. @N:CG179 : Debounce.v(81) | Removing redundant assignment. @N:CG364 : igloo2.v(362) | Synthesizing module CLKINT in library work. @N:CG364 : igloo2.v(376) | Synthesizing module VCC in library work. @N:CG364 : igloo2.v(372) | Synthesizing module GND in library work. @N:CG364 : igloo2.v(727) | Synthesizing module CCC in library work. @N:CG364 : PCIe_Demo_sb_CCC_0_FCCC.v(5) | Synthesizing module PCIe_Demo_sb_CCC_0_FCCC in library work. @N:CG364 : coreconfigmaster.v(24) | Synthesizing module CoreConfigMaster in library work. DATA_LOCATION=32'b00000000000000111110100000000000 ADDR_SYSREG_SOFT_RESET=32'b01000000000000111000000001001000 ADDR_SYSREG_ENVM_BUSY=32'b01000000000000111000000101011000 S0=32'b00000000000000000000000000000000 S1=32'b00000000000000000000000000000001 S2=32'b00000000000000000000000000000010 S3=32'b00000000000000000000000000000011 S4=32'b00000000000000000000000000000100 S5=32'b00000000000000000000000000000101 S6=32'b00000000000000000000000000000110 S7=32'b00000000000000000000000000000111 S8=32'b00000000000000000000000000001000 S9=32'b00000000000000000000000000001001 S10=32'b00000000000000000000000000001010 S11=32'b00000000000000000000000000001011 S12=32'b00000000000000000000000000001100 S13=32'b00000000000000000000000000001101 S14=32'b00000000000000000000000000001110 S15=32'b00000000000000000000000000001111 S16=32'b00000000000000000000000000010000 S17=32'b00000000000000000000000000010001 S18=32'b00000000000000000000000000010010 S19=32'b00000000000000000000000000010011 S20=32'b00000000000000000000000000010100 S21=32'b00000000000000000000000000010101 S22=32'b00000000000000000000000000010110 P0=32'b00000000000000000000000000100000 P1=32'b00000000000000000000000000100001 P2=32'b00000000000000000000000000100010 P3=32'b00000000000000000000000000100011 P4=32'b00000000000000000000000000100100 P5=32'b00000000000000000000000000100101 P6=32'b00000000000000000000000000100110 OP_COPY=7'b0000000 OP_POLL=7'b0000010 OP_LOAD=7'b0000011 OP_STORE=7'b0000100 OP_AND=7'b0000101 OP_OR=7'b0000110 Generated name = CoreConfigMaster_Z12 @N:CG364 : coreahblite_addrdec.v(20) | Synthesizing module COREAHBLITE_ADDRDEC in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000001010101 M_AHBSLOTENABLE=17'b10000000000000000 MSB_ADDR=32'b00000000000000000000000000011111 SLAVE_0=16'b0000000000000001 SLAVE_1=16'b0000000000000010 SLAVE_2=16'b0000000000000100 SLAVE_3=16'b0000000000001000 SLAVE_4=16'b0000000000010000 SLAVE_5=16'b0000000000100000 SLAVE_6=16'b0000000001000000 SLAVE_7=16'b0000000010000000 SLAVE_8=16'b0000000100000000 SLAVE_9=16'b0000001000000000 SLAVE_10=16'b0000010000000000 SLAVE_11=16'b0000100000000000 SLAVE_12=16'b0001000000000000 SLAVE_13=16'b0010000000000000 SLAVE_14=16'b0100000000000000 SLAVE_15=16'b1000000000000000 NONE=16'b0000000000000000 Generated name = COREAHBLITE_ADDRDEC_Z13 @N:CG364 : coreahblite_masterstage.v(22) | Synthesizing module COREAHBLITE_MASTERSTAGE in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000001010101 M_AHBSLOTENABLE=17'b10000000000000000 SYNC_RESET=32'b00000000000000000000000000000000 IDLE=1'b0 REGISTERED=1'b1 SLAVE_NONE=17'b00000000000000000 Generated name = COREAHBLITE_MASTERSTAGE_1_1_85_65536_0s_0_1_0 @W:CL177 : coreahblite_masterstage.v(625) | Sharing sequential element addrRegSMCurrentState. Add a syn_preserve attribute to the element to prevent sharing. @N:CG364 : coreahblite_addrdec.v(20) | Synthesizing module COREAHBLITE_ADDRDEC in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000001010101 M_AHBSLOTENABLE=17'b00000000000000000 MSB_ADDR=32'b00000000000000000000000000011111 SLAVE_0=16'b0000000000000001 SLAVE_1=16'b0000000000000010 SLAVE_2=16'b0000000000000100 SLAVE_3=16'b0000000000001000 SLAVE_4=16'b0000000000010000 SLAVE_5=16'b0000000000100000 SLAVE_6=16'b0000000001000000 SLAVE_7=16'b0000000010000000 SLAVE_8=16'b0000000100000000 SLAVE_9=16'b0000001000000000 SLAVE_10=16'b0000010000000000 SLAVE_11=16'b0000100000000000 SLAVE_12=16'b0001000000000000 SLAVE_13=16'b0010000000000000 SLAVE_14=16'b0100000000000000 SLAVE_15=16'b1000000000000000 NONE=16'b0000000000000000 Generated name = COREAHBLITE_ADDRDEC_Z14 @N:CG364 : coreahblite_masterstage.v(22) | Synthesizing module COREAHBLITE_MASTERSTAGE in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000001010101 M_AHBSLOTENABLE=17'b00000000000000000 SYNC_RESET=32'b00000000000000000000000000000000 IDLE=1'b0 REGISTERED=1'b1 SLAVE_NONE=17'b00000000000000000 Generated name = COREAHBLITE_MASTERSTAGE_1_1_85_0_0s_0_1_0 @W:CL177 : coreahblite_masterstage.v(625) | Sharing sequential element addrRegSMCurrentState. Add a syn_preserve attribute to the element to prevent sharing. @N:CG364 : coreahblite_matrix4x16.v(23) | Synthesizing module COREAHBLITE_MATRIX4X16 in library COREAHBLITE_LIB. MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC=16'b0000000001010101 M0_AHBSLOTENABLE=17'b10000000000000000 M1_AHBSLOTENABLE=17'b10000000000000000 M2_AHBSLOTENABLE=17'b00000000000000000 M3_AHBSLOTENABLE=17'b00000000000000000 SYNC_RESET=32'b00000000000000000000000000000000 Generated name = COREAHBLITE_MATRIX4X16_1_1_85_65536_65536_0_0_0s @N:CG364 : coreahblite.v(23) | Synthesizing module CoreAHBLite in library COREAHBLITE_LIB. FAMILY=6'b011000 MEMSPACE=3'b001 HADDR_SHG_CFG=1'b1 SC_0=1'b1 SC_1=1'b0 SC_2=1'b1 SC_3=1'b0 SC_4=1'b1 SC_5=1'b0 SC_6=1'b1 SC_7=1'b0 SC_8=1'b0 SC_9=1'b0 SC_10=1'b0 SC_11=1'b0 SC_12=1'b0 SC_13=1'b0 SC_14=1'b0 SC_15=1'b0 M0_AHBSLOT0ENABLE=1'b0 M0_AHBSLOT1ENABLE=1'b0 M0_AHBSLOT2ENABLE=1'b0 M0_AHBSLOT3ENABLE=1'b0 M0_AHBSLOT4ENABLE=1'b0 M0_AHBSLOT5ENABLE=1'b0 M0_AHBSLOT6ENABLE=1'b0 M0_AHBSLOT7ENABLE=1'b0 M0_AHBSLOT8ENABLE=1'b0 M0_AHBSLOT9ENABLE=1'b0 M0_AHBSLOT10ENABLE=1'b0 M0_AHBSLOT11ENABLE=1'b0 M0_AHBSLOT12ENABLE=1'b0 M0_AHBSLOT13ENABLE=1'b0 M0_AHBSLOT14ENABLE=1'b0 M0_AHBSLOT15ENABLE=1'b0 M0_AHBSLOT16ENABLE=1'b1 M1_AHBSLOT0ENABLE=1'b0 M1_AHBSLOT1ENABLE=1'b0 M1_AHBSLOT2ENABLE=1'b0 M1_AHBSLOT3ENABLE=1'b0 M1_AHBSLOT4ENABLE=1'b0 M1_AHBSLOT5ENABLE=1'b0 M1_AHBSLOT6ENABLE=1'b0 M1_AHBSLOT7ENABLE=1'b0 M1_AHBSLOT8ENABLE=1'b0 M1_AHBSLOT9ENABLE=1'b0 M1_AHBSLOT10ENABLE=1'b0 M1_AHBSLOT11ENABLE=1'b0 M1_AHBSLOT12ENABLE=1'b0 M1_AHBSLOT13ENABLE=1'b0 M1_AHBSLOT14ENABLE=1'b0 M1_AHBSLOT15ENABLE=1'b0 M1_AHBSLOT16ENABLE=1'b1 M2_AHBSLOT0ENABLE=1'b0 M2_AHBSLOT1ENABLE=1'b0 M2_AHBSLOT2ENABLE=1'b0 M2_AHBSLOT3ENABLE=1'b0 M2_AHBSLOT4ENABLE=1'b0 M2_AHBSLOT5ENABLE=1'b0 M2_AHBSLOT6ENABLE=1'b0 M2_AHBSLOT7ENABLE=1'b0 M2_AHBSLOT8ENABLE=1'b0 M2_AHBSLOT9ENABLE=1'b0 M2_AHBSLOT10ENABLE=1'b0 M2_AHBSLOT11ENABLE=1'b0 M2_AHBSLOT12ENABLE=1'b0 M2_AHBSLOT13ENABLE=1'b0 M2_AHBSLOT14ENABLE=1'b0 M2_AHBSLOT15ENABLE=1'b0 M2_AHBSLOT16ENABLE=1'b0 M3_AHBSLOT0ENABLE=1'b0 M3_AHBSLOT1ENABLE=1'b0 M3_AHBSLOT2ENABLE=1'b0 M3_AHBSLOT3ENABLE=1'b0 M3_AHBSLOT4ENABLE=1'b0 M3_AHBSLOT5ENABLE=1'b0 M3_AHBSLOT6ENABLE=1'b0 M3_AHBSLOT7ENABLE=1'b0 M3_AHBSLOT8ENABLE=1'b0 M3_AHBSLOT9ENABLE=1'b0 M3_AHBSLOT10ENABLE=1'b0 M3_AHBSLOT11ENABLE=1'b0 M3_AHBSLOT12ENABLE=1'b0 M3_AHBSLOT13ENABLE=1'b0 M3_AHBSLOT14ENABLE=1'b0 M3_AHBSLOT15ENABLE=1'b0 M3_AHBSLOT16ENABLE=1'b0 SYNC_RESET=32'b00000000000000000000000000000000 M0_AHBSLOTENABLE=17'b10000000000000000 M1_AHBSLOTENABLE=17'b10000000000000000 M2_AHBSLOTENABLE=17'b00000000000000000 M3_AHBSLOTENABLE=17'b00000000000000000 SC=16'b0000000001010101 Generated name = CoreAHBLite_Z15 @N:CG364 : coreconfigp.v(22) | Synthesizing module CoreConfigP in library work. FAMILY=32'b00000000000000000000000000010011 MDDR_IN_USE=32'b00000000000000000000000000000000 FDDR_IN_USE=32'b00000000000000000000000000000000 SDIF0_IN_USE=32'b00000000000000000000000000000001 SDIF1_IN_USE=32'b00000000000000000000000000000000 SDIF2_IN_USE=32'b00000000000000000000000000000000 SDIF3_IN_USE=32'b00000000000000000000000000000000 SDIF0_PCIE=32'b00000000000000000000000000000001 SDIF1_PCIE=32'b00000000000000000000000000000000 SDIF2_PCIE=32'b00000000000000000000000000000000 SDIF3_PCIE=32'b00000000000000000000000000000000 ENABLE_SOFT_RESETS=32'b00000000000000000000000000000001 DEVICE_090=32'b00000000000000000000000000000000 VERSION_MAJOR=32'b00000000000000000000000000000111 VERSION_MINOR=32'b00000000000000000000000000000000 VERSION_MAJOR_VECTOR=16'b0000000000000111 VERSION_MINOR_VECTOR=16'b0000000000000000 S0=2'b00 S1=2'b01 S2=2'b10 Generated name = CoreConfigP_Z16 @N:CG364 : coreresetp.v(23) | Synthesizing module CoreResetP in library work. FAMILY=32'b00000000000000000000000000010011 EXT_RESET_CFG=32'b00000000000000000000000000000000 DEVICE_VOLTAGE=32'b00000000000000000000000000000010 MDDR_IN_USE=32'b00000000000000000000000000000000 FDDR_IN_USE=32'b00000000000000000000000000000000 SDIF0_IN_USE=32'b00000000000000000000000000000001 SDIF1_IN_USE=32'b00000000000000000000000000000000 SDIF2_IN_USE=32'b00000000000000000000000000000000 SDIF3_IN_USE=32'b00000000000000000000000000000000 SDIF0_PCIE=32'b00000000000000000000000000000001 SDIF1_PCIE=32'b00000000000000000000000000000000 SDIF2_PCIE=32'b00000000000000000000000000000000 SDIF3_PCIE=32'b00000000000000000000000000000000 SDIF0_PCIE_HOTRESET=32'b00000000000000000000000000000001 SDIF1_PCIE_HOTRESET=32'b00000000000000000000000000000001 SDIF2_PCIE_HOTRESET=32'b00000000000000000000000000000001 SDIF3_PCIE_HOTRESET=32'b00000000000000000000000000000001 SDIF0_PCIE_L2P2=32'b00000000000000000000000000000001 SDIF1_PCIE_L2P2=32'b00000000000000000000000000000001 SDIF2_PCIE_L2P2=32'b00000000000000000000000000000001 SDIF3_PCIE_L2P2=32'b00000000000000000000000000000001 ENABLE_SOFT_RESETS=32'b00000000000000000000000000000001 DEVICE_090=32'b00000000000000000000000000000000 DDR_WAIT=32'b00000000000000000000000011001000 RCOSC_MEGAHERTZ=32'b00000000000000000000000000110010 SDIF_INTERVAL=32'b00000000000000000001100101100100 DDR_INTERVAL=32'b00000000000000000010011100010000 COUNT_WIDTH_SDIF=32'b00000000000000000000000000001101 COUNT_WIDTH_DDR=32'b00000000000000000000000000001110 S0=32'b00000000000000000000000000000000 S1=32'b00000000000000000000000000000001 S2=32'b00000000000000000000000000000010 S3=32'b00000000000000000000000000000011 S4=32'b00000000000000000000000000000100 S5=32'b00000000000000000000000000000101 S6=32'b00000000000000000000000000000110 Generated name = CoreResetP_Z17 @N:CG364 : coreresetp_pcie_hotreset.v(31) | Synthesizing module coreresetp_pcie_hotreset in library work. @W:CL169 : coreresetp.v(1613) | Pruning unused register count_ddr[13:0]. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1581) | Pruning unused register count_sdif3[12:0]. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1549) | Pruning unused register count_sdif2[12:0]. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1517) | Pruning unused register count_sdif1[12:0]. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1455) | Pruning unused register count_sdif1_enable_q1. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1455) | Pruning unused register count_sdif2_enable_q1. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1455) | Pruning unused register count_sdif3_enable_q1. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1455) | Pruning unused register count_sdif1_enable_rcosc. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1455) | Pruning unused register count_sdif2_enable_rcosc. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1455) | Pruning unused register count_sdif3_enable_rcosc. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1455) | Pruning unused register count_ddr_enable_q1. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1455) | Pruning unused register count_ddr_enable_rcosc. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1365) | Pruning unused register count_sdif3_enable. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1300) | Pruning unused register count_sdif2_enable. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1235) | Pruning unused register count_sdif1_enable. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1089) | Pruning unused register count_ddr_enable. Make sure that there are no unused intermediate registers. @W:CL177 : coreresetp.v(1388) | Sharing sequential element M3_RESET_N_int. Add a syn_preserve attribute to the element to prevent sharing. @W:CL177 : coreresetp.v(963) | Sharing sequential element sdif2_spll_lock_q1. Add a syn_preserve attribute to the element to prevent sharing. @W:CL177 : coreresetp.v(963) | Sharing sequential element sdif1_spll_lock_q1. Add a syn_preserve attribute to the element to prevent sharing. @W:CL177 : coreresetp.v(963) | Sharing sequential element fpll_lock_q1. Add a syn_preserve attribute to the element to prevent sharing. @W:CL190 : coreresetp.v(1433) | Optimizing register bit EXT_RESET_OUT_int to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL169 : coreresetp.v(1089) | Pruning unused register release_ext_reset. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1433) | Pruning unused register EXT_RESET_OUT_int. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(1433) | Pruning unused register sm2_state[2:0]. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(783) | Pruning unused register sm2_areset_n_q1. Make sure that there are no unused intermediate registers. @W:CL169 : coreresetp.v(783) | Pruning unused register sm2_areset_n_clk_base. Make sure that there are no unused intermediate registers. @N:CG364 : osc_comps.v(51) | Synthesizing module RCOSC_25_50MHZ_FAB in library work. @N:CG364 : osc_comps.v(11) | Synthesizing module RCOSC_25_50MHZ in library work. @N:CG364 : PCIe_Demo_sb_FABOSC_0_OSC.v(5) | Synthesizing module PCIe_Demo_sb_FABOSC_0_OSC in library work. @N:CG364 : PCIe_Demo_sb_HPMS_syn.v(5) | Synthesizing module MSS_010 in library work. @N:CG364 : PCIe_Demo_sb_HPMS.v(9) | Synthesizing module PCIe_Demo_sb_HPMS in library work. @N:CG364 : igloo2.v(718) | Synthesizing module SYSRESET in library work. @N:CG364 : PCIe_Demo_sb.v(9) | Synthesizing module PCIe_Demo_sb in library work. @N:CG364 : igloo2.v(320) | Synthesizing module INBUF_DIFF in library work. @N:CG364 : PCIe_Demo_SERDES_IF_0_SERDES_IF_syn.v(5) | Synthesizing module SERDESIF_0 in library work. @N:CG364 : PCIe_Demo_SERDES_IF_0_SERDES_IF.v(5) | Synthesizing module PCIe_Demo_SERDES_IF_0_SERDES_IF in library work. @N:CG364 : Serial_Num.v(21) | Synthesizing module Serial_Num in library work. idle=3'b000 ser_num=3'b001 rd_ser_num=3'b010 wr_ser_num_0=3'b011 wr_ser_num_1=3'b100 valid_gen=3'b101 Generated name = Serial_Num_0s_1s_2s_3s_4294967292s_4294967293s @N:CL134 : Serial_Num.v(66) | Found RAM serial_number, depth=4, width=32 @W:CL190 : Serial_Num.v(66) | Optimizing register bit HTRANS[0] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : Serial_Num.v(66) | Optimizing register bit SERV_CMDBYTE_REQ[1] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : Serial_Num.v(66) | Optimizing register bit SERV_CMDBYTE_REQ[2] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : Serial_Num.v(66) | Optimizing register bit SERV_CMDBYTE_REQ[3] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : Serial_Num.v(66) | Optimizing register bit SERV_CMDBYTE_REQ[4] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : Serial_Num.v(66) | Optimizing register bit SERV_CMDBYTE_REQ[5] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : Serial_Num.v(66) | Optimizing register bit SERV_CMDBYTE_REQ[6] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : Serial_Num.v(66) | Optimizing register bit SERV_CMDBYTE_REQ[7] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL260 : Serial_Num.v(66) | Pruning register bit 0 of HTRANS[1:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : Serial_Num.v(66) | Pruning register bits 7 to 1 of SERV_CMDBYTE_REQ[7:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @N:CG364 : PCIe_Demo.v(9) | Synthesizing module PCIe_Demo in library work. @N:CL201 : Serial_Num.v(66) | Trying to extract state machine for register ahb_state. Extracted state machine for register ahb_state State machine has 6 reachable states with original encodings of: 000 001 010 011 100 101 @N:CL159 : Serial_Num.v(44) | Input HRDATA is unused. @N:CL159 : Serial_Num.v(46) | Input HRESP is unused. @W:CL247 : PCIe_Demo_sb_HPMS.v(51) | Input port bit 0 of FIC_0_AHB_S_HTRANS[1:0] is unused @W:CL157 : PCIe_Demo_sb_FABOSC_0_OSC.v(15) | *Output RCOSC_25_50MHZ_CCC has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the output. @W:CL157 : PCIe_Demo_sb_FABOSC_0_OSC.v(17) | *Output RCOSC_1MHZ_CCC has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the output. @W:CL157 : PCIe_Demo_sb_FABOSC_0_OSC.v(18) | *Output RCOSC_1MHZ_O2F has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the output. @W:CL157 : PCIe_Demo_sb_FABOSC_0_OSC.v(19) | *Output XTLOSC_CCC has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the output. @W:CL157 : PCIe_Demo_sb_FABOSC_0_OSC.v(20) | *Output XTLOSC_O2F has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the output. @N:CL159 : PCIe_Demo_sb_FABOSC_0_OSC.v(14) | Input XTL is unused. @N:CL201 : coreresetp_pcie_hotreset.v(179) | Trying to extract state machine for register state. Extracted state machine for register state State machine has 4 reachable states with original encodings of: 00 01 10 11 @W:CL247 : coreresetp_pcie_hotreset.v(36) | Input port bit 31 of prdata[31:0] is unused @W:CL246 : coreresetp_pcie_hotreset.v(36) | Input port bits 25 to 0 of prdata[31:0] are unused. Assign logic for all port bits or change the input port size. @W:CL177 : coreresetp.v(963) | Sharing sequential element sdif1_spll_lock_q2. Add a syn_preserve attribute to the element to prevent sharing. @W:CL177 : coreresetp.v(963) | Sharing sequential element sdif2_spll_lock_q2. Add a syn_preserve attribute to the element to prevent sharing. @W:CL177 : coreresetp.v(963) | Sharing sequential element fpll_lock_q2. Add a syn_preserve attribute to the element to prevent sharing. @N:CL201 : coreresetp.v(1365) | Trying to extract state machine for register sdif3_state. Extracted state machine for register sdif3_state State machine has 4 reachable states with original encodings of: 000 001 010 011 @N:CL201 : coreresetp.v(1300) | Trying to extract state machine for register sdif2_state. Extracted state machine for register sdif2_state State machine has 4 reachable states with original encodings of: 000 001 010 011 @N:CL201 : coreresetp.v(1235) | Trying to extract state machine for register sdif1_state. Extracted state machine for register sdif1_state State machine has 4 reachable states with original encodings of: 000 001 010 011 @N:CL201 : coreresetp.v(1170) | Trying to extract state machine for register sdif0_state. Extracted state machine for register sdif0_state State machine has 4 reachable states with original encodings of: 000 001 010 011 @N:CL201 : coreresetp.v(1089) | Trying to extract state machine for register sm0_state. Extracted state machine for register sm0_state State machine has 7 reachable states with original encodings of: 000 001 010 011 100 101 110 @N:CL159 : coreresetp.v(56) | Input FPLL_LOCK is unused. @N:CL159 : coreresetp.v(68) | Input SDIF1_SPLL_LOCK is unused. @N:CL159 : coreresetp.v(72) | Input SDIF2_SPLL_LOCK is unused. @N:CL159 : coreresetp.v(76) | Input SDIF3_SPLL_LOCK is unused. @N:CL159 : coreresetp.v(93) | Input SDIF1_PSEL is unused. @N:CL159 : coreresetp.v(94) | Input SDIF1_PWRITE is unused. @N:CL159 : coreresetp.v(95) | Input SDIF1_PRDATA is unused. @N:CL159 : coreresetp.v(96) | Input SDIF2_PSEL is unused. @N:CL159 : coreresetp.v(97) | Input SDIF2_PWRITE is unused. @N:CL159 : coreresetp.v(98) | Input SDIF2_PRDATA is unused. @N:CL159 : coreresetp.v(99) | Input SDIF3_PSEL is unused. @N:CL159 : coreresetp.v(100) | Input SDIF3_PWRITE is unused. @N:CL159 : coreresetp.v(101) | Input SDIF3_PRDATA is unused. @N:CL201 : coreconfigp.v(447) | Trying to extract state machine for register state. Extracted state machine for register state State machine has 3 reachable states with original encodings of: 00 01 10 @W:CL247 : coreahblite.v(120) | Input port bit 0 of HTRANS_M0[1:0] is unused @W:CL247 : coreahblite.v(131) | Input port bit 0 of HTRANS_M1[1:0] is unused @W:CL247 : coreahblite.v(142) | Input port bit 0 of HTRANS_M2[1:0] is unused @W:CL247 : coreahblite.v(153) | Input port bit 0 of HTRANS_M3[1:0] is unused @W:CL247 : coreahblite.v(163) | Input port bit 1 of HRESP_S0[1:0] is unused @W:CL247 : coreahblite.v(176) | Input port bit 1 of HRESP_S1[1:0] is unused @W:CL247 : coreahblite.v(189) | Input port bit 1 of HRESP_S2[1:0] is unused @W:CL247 : coreahblite.v(202) | Input port bit 1 of HRESP_S3[1:0] is unused @W:CL247 : coreahblite.v(215) | Input port bit 1 of HRESP_S4[1:0] is unused @W:CL247 : coreahblite.v(228) | Input port bit 1 of HRESP_S5[1:0] is unused @W:CL247 : coreahblite.v(241) | Input port bit 1 of HRESP_S6[1:0] is unused @W:CL247 : coreahblite.v(254) | Input port bit 1 of HRESP_S7[1:0] is unused @W:CL247 : coreahblite.v(267) | Input port bit 1 of HRESP_S8[1:0] is unused @W:CL247 : coreahblite.v(280) | Input port bit 1 of HRESP_S9[1:0] is unused @W:CL247 : coreahblite.v(293) | Input port bit 1 of HRESP_S10[1:0] is unused @W:CL247 : coreahblite.v(306) | Input port bit 1 of HRESP_S11[1:0] is unused @W:CL247 : coreahblite.v(319) | Input port bit 1 of HRESP_S12[1:0] is unused @W:CL247 : coreahblite.v(332) | Input port bit 1 of HRESP_S13[1:0] is unused @W:CL247 : coreahblite.v(345) | Input port bit 1 of HRESP_S14[1:0] is unused @W:CL247 : coreahblite.v(358) | Input port bit 1 of HRESP_S15[1:0] is unused @W:CL247 : coreahblite.v(371) | Input port bit 1 of HRESP_S16[1:0] is unused @N:CL159 : coreahblite.v(123) | Input HBURST_M0 is unused. @N:CL159 : coreahblite.v(124) | Input HPROT_M0 is unused. @N:CL159 : coreahblite.v(134) | Input HBURST_M1 is unused. @N:CL159 : coreahblite.v(135) | Input HPROT_M1 is unused. @N:CL159 : coreahblite.v(145) | Input HBURST_M2 is unused. @N:CL159 : coreahblite.v(146) | Input HPROT_M2 is unused. @N:CL159 : coreahblite.v(156) | Input HBURST_M3 is unused. @N:CL159 : coreahblite.v(157) | Input HPROT_M3 is unused. @N:CL159 : coreahblite_matrix4x16.v(60) | Input HWDATA_M2 is unused. @N:CL159 : coreahblite_matrix4x16.v(69) | Input HWDATA_M3 is unused. @N:CL159 : coreahblite_matrix4x16.v(73) | Input HRDATA_S0 is unused. @N:CL159 : coreahblite_matrix4x16.v(74) | Input HREADYOUT_S0 is unused. @N:CL159 : coreahblite_matrix4x16.v(75) | Input HRESP_S0 is unused. @N:CL159 : coreahblite_matrix4x16.v(84) | Input HRDATA_S1 is unused. @N:CL159 : coreahblite_matrix4x16.v(85) | Input HREADYOUT_S1 is unused. @N:CL159 : coreahblite_matrix4x16.v(86) | Input HRESP_S1 is unused. @N:CL159 : coreahblite_matrix4x16.v(95) | Input HRDATA_S2 is unused. @N:CL159 : coreahblite_matrix4x16.v(96) | Input HREADYOUT_S2 is unused. @N:CL159 : coreahblite_matrix4x16.v(97) | Input HRESP_S2 is unused. @N:CL159 : coreahblite_matrix4x16.v(106) | Input HRDATA_S3 is unused. @N:CL159 : coreahblite_matrix4x16.v(107) | Input HREADYOUT_S3 is unused. @N:CL159 : coreahblite_matrix4x16.v(108) | Input HRESP_S3 is unused. @N:CL159 : coreahblite_matrix4x16.v(117) | Input HRDATA_S4 is unused. @N:CL159 : coreahblite_matrix4x16.v(118) | Input HREADYOUT_S4 is unused. @N:CL159 : coreahblite_matrix4x16.v(119) | Input HRESP_S4 is unused. @N:CL159 : coreahblite_matrix4x16.v(128) | Input HRDATA_S5 is unused. @N:CL159 : coreahblite_matrix4x16.v(129) | Input HREADYOUT_S5 is unused. @N:CL159 : coreahblite_matrix4x16.v(130) | Input HRESP_S5 is unused. @N:CL159 : coreahblite_matrix4x16.v(139) | Input HRDATA_S6 is unused. @N:CL159 : coreahblite_matrix4x16.v(140) | Input HREADYOUT_S6 is unused. @N:CL159 : coreahblite_matrix4x16.v(141) | Input HRESP_S6 is unused. @N:CL159 : coreahblite_matrix4x16.v(150) | Input HRDATA_S7 is unused. @N:CL159 : coreahblite_matrix4x16.v(151) | Input HREADYOUT_S7 is unused. @N:CL159 : coreahblite_matrix4x16.v(152) | Input HRESP_S7 is unused. @N:CL159 : coreahblite_matrix4x16.v(161) | Input HRDATA_S8 is unused. @N:CL159 : coreahblite_matrix4x16.v(162) | Input HREADYOUT_S8 is unused. @N:CL159 : coreahblite_matrix4x16.v(163) | Input HRESP_S8 is unused. @N:CL159 : coreahblite_matrix4x16.v(172) | Input HRDATA_S9 is unused. @N:CL159 : coreahblite_matrix4x16.v(173) | Input HREADYOUT_S9 is unused. @N:CL159 : coreahblite_matrix4x16.v(174) | Input HRESP_S9 is unused. @N:CL159 : coreahblite_matrix4x16.v(183) | Input HRDATA_S10 is unused. @N:CL159 : coreahblite_matrix4x16.v(184) | Input HREADYOUT_S10 is unused. @N:CL159 : coreahblite_matrix4x16.v(185) | Input HRESP_S10 is unused. @N:CL159 : coreahblite_matrix4x16.v(194) | Input HRDATA_S11 is unused. @N:CL159 : coreahblite_matrix4x16.v(195) | Input HREADYOUT_S11 is unused. @N:CL159 : coreahblite_matrix4x16.v(196) | Input HRESP_S11 is unused. @N:CL159 : coreahblite_matrix4x16.v(205) | Input HRDATA_S12 is unused. @N:CL159 : coreahblite_matrix4x16.v(206) | Input HREADYOUT_S12 is unused. @N:CL159 : coreahblite_matrix4x16.v(207) | Input HRESP_S12 is unused. @N:CL159 : coreahblite_matrix4x16.v(216) | Input HRDATA_S13 is unused. @N:CL159 : coreahblite_matrix4x16.v(217) | Input HREADYOUT_S13 is unused. @N:CL159 : coreahblite_matrix4x16.v(218) | Input HRESP_S13 is unused. @N:CL159 : coreahblite_matrix4x16.v(227) | Input HRDATA_S14 is unused. @N:CL159 : coreahblite_matrix4x16.v(228) | Input HREADYOUT_S14 is unused. @N:CL159 : coreahblite_matrix4x16.v(229) | Input HRESP_S14 is unused. @N:CL159 : coreahblite_matrix4x16.v(238) | Input HRDATA_S15 is unused. @N:CL159 : coreahblite_matrix4x16.v(239) | Input HREADYOUT_S15 is unused. @N:CL159 : coreahblite_matrix4x16.v(240) | Input HRESP_S15 is unused. @N:CL159 : coreahblite_masterstage.v(42) | Input SDATAREADY is unused. @N:CL159 : coreahblite_masterstage.v(43) | Input SHRESP is unused. @N:CL159 : coreahblite_masterstage.v(52) | Input HRDATA_S0 is unused. @N:CL159 : coreahblite_masterstage.v(53) | Input HREADYOUT_S0 is unused. @N:CL159 : coreahblite_masterstage.v(54) | Input HRDATA_S1 is unused. @N:CL159 : coreahblite_masterstage.v(55) | Input HREADYOUT_S1 is unused. @N:CL159 : coreahblite_masterstage.v(56) | Input HRDATA_S2 is unused. @N:CL159 : coreahblite_masterstage.v(57) | Input HREADYOUT_S2 is unused. @N:CL159 : coreahblite_masterstage.v(58) | Input HRDATA_S3 is unused. @N:CL159 : coreahblite_masterstage.v(59) | Input HREADYOUT_S3 is unused. @N:CL159 : coreahblite_masterstage.v(60) | Input HRDATA_S4 is unused. @N:CL159 : coreahblite_masterstage.v(61) | Input HREADYOUT_S4 is unused. @N:CL159 : coreahblite_masterstage.v(62) | Input HRDATA_S5 is unused. @N:CL159 : coreahblite_masterstage.v(63) | Input HREADYOUT_S5 is unused. @N:CL159 : coreahblite_masterstage.v(64) | Input HRDATA_S6 is unused. @N:CL159 : coreahblite_masterstage.v(65) | Input HREADYOUT_S6 is unused. @N:CL159 : coreahblite_masterstage.v(66) | Input HRDATA_S7 is unused. @N:CL159 : coreahblite_masterstage.v(67) | Input HREADYOUT_S7 is unused. @N:CL159 : coreahblite_masterstage.v(68) | Input HRDATA_S8 is unused. @N:CL159 : coreahblite_masterstage.v(69) | Input HREADYOUT_S8 is unused. @N:CL159 : coreahblite_masterstage.v(70) | Input HRDATA_S9 is unused. @N:CL159 : coreahblite_masterstage.v(71) | Input HREADYOUT_S9 is unused. @N:CL159 : coreahblite_masterstage.v(72) | Input HRDATA_S10 is unused. @N:CL159 : coreahblite_masterstage.v(73) | Input HREADYOUT_S10 is unused. @N:CL159 : coreahblite_masterstage.v(74) | Input HRDATA_S11 is unused. @N:CL159 : coreahblite_masterstage.v(75) | Input HREADYOUT_S11 is unused. @N:CL159 : coreahblite_masterstage.v(76) | Input HRDATA_S12 is unused. @N:CL159 : coreahblite_masterstage.v(77) | Input HREADYOUT_S12 is unused. @N:CL159 : coreahblite_masterstage.v(78) | Input HRDATA_S13 is unused. @N:CL159 : coreahblite_masterstage.v(79) | Input HREADYOUT_S13 is unused. @N:CL159 : coreahblite_masterstage.v(80) | Input HRDATA_S14 is unused. @N:CL159 : coreahblite_masterstage.v(81) | Input HREADYOUT_S14 is unused. @N:CL159 : coreahblite_masterstage.v(82) | Input HRDATA_S15 is unused. @N:CL159 : coreahblite_masterstage.v(83) | Input HREADYOUT_S15 is unused. @N:CL159 : coreahblite_masterstage.v(84) | Input HRDATA_S16 is unused. @N:CL159 : coreahblite_masterstage.v(85) | Input HREADYOUT_S16 is unused. @W:CL246 : coreahblite_masterstage.v(42) | Input port bits 15 to 0 of SDATAREADY[16:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : coreahblite_masterstage.v(43) | Input port bits 15 to 0 of SHRESP[16:0] are unused. Assign logic for all port bits or change the input port size. @N:CL159 : coreahblite_masterstage.v(52) | Input HRDATA_S0 is unused. @N:CL159 : coreahblite_masterstage.v(53) | Input HREADYOUT_S0 is unused. @N:CL159 : coreahblite_masterstage.v(54) | Input HRDATA_S1 is unused. @N:CL159 : coreahblite_masterstage.v(55) | Input HREADYOUT_S1 is unused. @N:CL159 : coreahblite_masterstage.v(56) | Input HRDATA_S2 is unused. @N:CL159 : coreahblite_masterstage.v(57) | Input HREADYOUT_S2 is unused. @N:CL159 : coreahblite_masterstage.v(58) | Input HRDATA_S3 is unused. @N:CL159 : coreahblite_masterstage.v(59) | Input HREADYOUT_S3 is unused. @N:CL159 : coreahblite_masterstage.v(60) | Input HRDATA_S4 is unused. @N:CL159 : coreahblite_masterstage.v(61) | Input HREADYOUT_S4 is unused. @N:CL159 : coreahblite_masterstage.v(62) | Input HRDATA_S5 is unused. @N:CL159 : coreahblite_masterstage.v(63) | Input HREADYOUT_S5 is unused. @N:CL159 : coreahblite_masterstage.v(64) | Input HRDATA_S6 is unused. @N:CL159 : coreahblite_masterstage.v(65) | Input HREADYOUT_S6 is unused. @N:CL159 : coreahblite_masterstage.v(66) | Input HRDATA_S7 is unused. @N:CL159 : coreahblite_masterstage.v(67) | Input HREADYOUT_S7 is unused. @N:CL159 : coreahblite_masterstage.v(68) | Input HRDATA_S8 is unused. @N:CL159 : coreahblite_masterstage.v(69) | Input HREADYOUT_S8 is unused. @N:CL159 : coreahblite_masterstage.v(70) | Input HRDATA_S9 is unused. @N:CL159 : coreahblite_masterstage.v(71) | Input HREADYOUT_S9 is unused. @N:CL159 : coreahblite_masterstage.v(72) | Input HRDATA_S10 is unused. @N:CL159 : coreahblite_masterstage.v(73) | Input HREADYOUT_S10 is unused. @N:CL159 : coreahblite_masterstage.v(74) | Input HRDATA_S11 is unused. @N:CL159 : coreahblite_masterstage.v(75) | Input HREADYOUT_S11 is unused. @N:CL159 : coreahblite_masterstage.v(76) | Input HRDATA_S12 is unused. @N:CL159 : coreahblite_masterstage.v(77) | Input HREADYOUT_S12 is unused. @N:CL159 : coreahblite_masterstage.v(78) | Input HRDATA_S13 is unused. @N:CL159 : coreahblite_masterstage.v(79) | Input HREADYOUT_S13 is unused. @N:CL159 : coreahblite_masterstage.v(80) | Input HRDATA_S14 is unused. @N:CL159 : coreahblite_masterstage.v(81) | Input HREADYOUT_S14 is unused. @N:CL159 : coreahblite_masterstage.v(82) | Input HRDATA_S15 is unused. @N:CL159 : coreahblite_masterstage.v(83) | Input HREADYOUT_S15 is unused. @W:CL190 : coreconfigmaster.v(723) | Optimizing register bit HTRANS[0] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL260 : coreconfigmaster.v(723) | Pruning register bit 0 of HTRANS[1:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @N:CL201 : coreconfigmaster.v(723) | Trying to extract state machine for register state. Extracted state machine for register state State machine has 29 reachable states with original encodings of: 000000 000001 000010 000011 000100 000101 000110 000111 001001 001010 001011 001100 001101 001110 001111 010000 010001 010010 010011 010100 010101 010110 100000 100001 100010 100011 100100 100101 100110 @N:CL159 : CoreSysServices_AHBLMasterIF.v(72) | Input HCLK is unused. @N:CL159 : CoreSysServices_AHBLMasterIF.v(73) | Input HRESETN is unused. @W:CL190 : CoreSysServices_FSMCtrl.v(293) | Optimizing register bit fmhburst_d1[0] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL169 : CoreSysServices_FSMCtrl.v(293) | Pruning unused register fmhburst_d1[0]. Make sure that there are no unused intermediate registers. @N:CL201 : CoreSysServices_FSMCtrl.v(326) | Trying to extract state machine for register curr_state. Extracted state machine for register curr_state State machine has 7 reachable states with original encodings of: 0000 0001 0010 0101 1000 1001 1011 @N:CL159 : CoreSysServices_FSMCtrl.v(162) | Input cfwr_req_d is unused. @N:CL159 : CoreSysServices_FSMCtrl.v(163) | Input cfrd_req_d is unused. @W:CL190 : CoreSysServices_CmdDec.v(997) | Optimizing register bit burstlen_memwr_data_r[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[16] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[17] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[18] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[19] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[20] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[21] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[22] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[23] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[24] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[25] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[26] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[27] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[28] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[29] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[30] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_rd_d1[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL279 : CoreSysServices_CmdDec.v(1096) | Pruning register bits 31 to 16 of cfburst_len_rd_d1[31:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : CoreSysServices_CmdDec.v(997) | Pruning register bit 31 of burstlen_memwr_data_r[31:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL177 : CoreSysServices_CmdDec.v(1924) | Sharing sequential element fcdataout_d1. Add a syn_preserve attribute to the element to prevent sharing. @W:CL190 : CoreSysServices_CmdDec.v(1096) | Optimizing register bit cfburst_len_wr_d1[31] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL260 : CoreSysServices_CmdDec.v(1096) | Pruning register bit 31 of cfburst_len_wr_d1[31:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @N:CL201 : CoreSysServices_CmdDec.v(3426) | Trying to extract state machine for register asynchevent_curr_state. Extracted state machine for register asynchevent_curr_state State machine has 2 reachable states with original encodings of: 0000 1001 @N:CL201 : CoreSysServices_CmdDec.v(3004) | Trying to extract state machine for register resp_curr_state. Extracted state machine for register resp_curr_state State machine has 31 reachable states with original encodings of: 000000 000001 000011 000101 000110 000111 001000 001001 001100 001101 010000 010001 010010 010011 010100 010101 010110 010111 011000 011001 011011 100100 100101 100110 100111 101000 101001 101100 101110 101111 110000 @N:CL201 : CoreSysServices_CmdDec.v(1970) | Trying to extract state machine for register req_curr_state. Extracted state machine for register req_curr_state State machine has 37 reachable states with original encodings of: 000000 000001 000010 000011 000100 000101 000111 001000 001001 001010 001011 001100 001101 001110 001111 010000 010001 010010 010011 010100 010101 100001 100010 100101 100110 101000 101001 101010 101011 101100 101101 101110 110000 110001 110010 110011 110100 @N:CL201 : CoreSysServices_CmdDec.v(1640) | Trying to extract state machine for register main_curr_state. Extracted state machine for register main_curr_state State machine has 3 reachable states with original encodings of: 00 01 10 @W:CL190 : CoreSysServices_CmdDec.v(1895) | Optimizing register bit cfrd_asyncevent_o to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL169 : CoreSysServices_CmdDec.v(2889) | Pruning unused register resp_srcreg_addr_d1[30]. Make sure that there are no unused intermediate registers. @W:CL169 : CoreSysServices_CmdDec.v(1895) | Pruning unused register cfrd_asyncevent_o. Make sure that there are no unused intermediate registers. @W:CL157 : CoreSysServices_CmdDec.v(372) | *Output cutrans_done_o has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the output. @N:CL159 : CoreSysServices_CmdDec.v(345) | Input ucdata_wvalid_i is unused. @N:CL159 : CoreSysServices_CmdDec.v(356) | Input fcpush_i is unused. @N:CL159 : CoreSysServices_CmdDec.v(360) | Input clr_req is unused. @N:CL135 : CoreSysServices_UserIF.v(772) | Found sequential shift zer_new_serv_d1 with address depth of 3 words and data bit width of 1. @N:CL159 : CoreSysServices_UserIF.v(257) | Input cutrans_done_i is unused. @N:CL159 : CoreSysServices_UserIF.v(262) | Input cutamper_detect_valid is unused. @N:CL159 : CoreSysServices_UserIF.v(263) | Input cutamper_fail_valid is unused. @N:CL135 : coregpio.v(317) | Found sequential shift xhdl1.GEN_BITS[0].gpin3 with address depth of 3 words and data bit width of 1. @N:CL135 : coregpio.v(317) | Found sequential shift xhdl1.GEN_BITS[1].gpin3 with address depth of 3 words and data bit width of 1. @N:CL135 : coregpio.v(317) | Found sequential shift xhdl1.GEN_BITS[2].gpin3 with address depth of 3 words and data bit width of 1. @N:CL135 : coregpio.v(317) | Found sequential shift xhdl1.GEN_BITS[3].gpin3 with address depth of 3 words and data bit width of 1. @N:CL135 : coregpio.v(317) | Found sequential shift xhdl1.GEN_BITS[4].gpin3 with address depth of 3 words and data bit width of 1. @N:CL135 : coregpio.v(317) | Found sequential shift xhdl1.GEN_BITS[5].gpin3 with address depth of 3 words and data bit width of 1. @N:CL135 : coregpio.v(317) | Found sequential shift xhdl1.GEN_BITS[6].gpin3 with address depth of 3 words and data bit width of 1. @N:CL135 : coregpio.v(317) | Found sequential shift xhdl1.GEN_BITS[7].gpin3 with address depth of 3 words and data bit width of 1. @N:CL135 : coregpio.v(317) | Found sequential shift xhdl1.GEN_BITS[8].gpin3 with address depth of 3 words and data bit width of 1. @W:CL246 : coregpio.v(182) | Input port bits 31 to 9 of PWDATA[31:0] are unused. Assign logic for all port bits or change the input port size. @N:CL159 : coreapb3.v(396) | Input IADDR is unused. @N:CL159 : coreapb3.v(398) | Input PRESETN is unused. @N:CL159 : coreapb3.v(400) | Input PCLK is unused. @N:CL159 : coreapb3.v(521) | Input PRDATAS1 is unused. @N:CL159 : coreapb3.v(528) | Input PRDATAS2 is unused. @N:CL159 : coreapb3.v(535) | Input PRDATAS3 is unused. @N:CL159 : coreapb3.v(542) | Input PRDATAS4 is unused. @N:CL159 : coreapb3.v(549) | Input PRDATAS5 is unused. @N:CL159 : coreapb3.v(556) | Input PRDATAS6 is unused. @N:CL159 : coreapb3.v(563) | Input PRDATAS7 is unused. @N:CL159 : coreapb3.v(570) | Input PRDATAS8 is unused. @N:CL159 : coreapb3.v(577) | Input PRDATAS9 is unused. @N:CL159 : coreapb3.v(584) | Input PRDATAS10 is unused. @N:CL159 : coreapb3.v(591) | Input PRDATAS11 is unused. @N:CL159 : coreapb3.v(598) | Input PRDATAS12 is unused. @N:CL159 : coreapb3.v(605) | Input PRDATAS13 is unused. @N:CL159 : coreapb3.v(612) | Input PRDATAS14 is unused. @N:CL159 : coreapb3.v(619) | Input PRDATAS15 is unused. @N:CL159 : coreapb3.v(630) | Input PREADYS1 is unused. @N:CL159 : coreapb3.v(632) | Input PREADYS2 is unused. @N:CL159 : coreapb3.v(634) | Input PREADYS3 is unused. @N:CL159 : coreapb3.v(636) | Input PREADYS4 is unused. @N:CL159 : coreapb3.v(638) | Input PREADYS5 is unused. @N:CL159 : coreapb3.v(640) | Input PREADYS6 is unused. @N:CL159 : coreapb3.v(642) | Input PREADYS7 is unused. @N:CL159 : coreapb3.v(644) | Input PREADYS8 is unused. @N:CL159 : coreapb3.v(646) | Input PREADYS9 is unused. @N:CL159 : coreapb3.v(648) | Input PREADYS10 is unused. @N:CL159 : coreapb3.v(650) | Input PREADYS11 is unused. @N:CL159 : coreapb3.v(652) | Input PREADYS12 is unused. @N:CL159 : coreapb3.v(654) | Input PREADYS13 is unused. @N:CL159 : coreapb3.v(656) | Input PREADYS14 is unused. @N:CL159 : coreapb3.v(658) | Input PREADYS15 is unused. @N:CL159 : coreapb3.v(664) | Input PSLVERRS1 is unused. @N:CL159 : coreapb3.v(666) | Input PSLVERRS2 is unused. @N:CL159 : coreapb3.v(668) | Input PSLVERRS3 is unused. @N:CL159 : coreapb3.v(670) | Input PSLVERRS4 is unused. @N:CL159 : coreapb3.v(672) | Input PSLVERRS5 is unused. @N:CL159 : coreapb3.v(674) | Input PSLVERRS6 is unused. @N:CL159 : coreapb3.v(676) | Input PSLVERRS7 is unused. @N:CL159 : coreapb3.v(678) | Input PSLVERRS8 is unused. @N:CL159 : coreapb3.v(680) | Input PSLVERRS9 is unused. @N:CL159 : coreapb3.v(682) | Input PSLVERRS10 is unused. @N:CL159 : coreapb3.v(684) | Input PSLVERRS11 is unused. @N:CL159 : coreapb3.v(686) | Input PSLVERRS12 is unused. @N:CL159 : coreapb3.v(688) | Input PSLVERRS13 is unused. @N:CL159 : coreapb3.v(690) | Input PSLVERRS14 is unused. @N:CL159 : coreapb3.v(692) | Input PSLVERRS15 is unused. @W:CL247 : coreahbtoapb3.v(40) | Input port bit 0 of HTRANS[1:0] is unused @N:CL201 : coreahbtoapb3_penablescheduler.v(196) | Trying to extract state machine for register CAHBtoAPB3lIl. Extracted state machine for register CAHBtoAPB3lIl State machine has 3 reachable states with original encodings of: 00 01 10 @N:CL201 : coreahbtoapb3_ahbtoapbsm.v(690) | Trying to extract state machine for register CAHBtoAPB3IOI. Extracted state machine for register CAHBtoAPB3IOI State machine has 5 reachable states with original encodings of: 000 001 010 011 100 @W:CL246 : CoreAHBLSRAM.v(69) | Input port bits 31 to 20 of HADDR[31:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : lsram_2048to139264x8.v(64) | Input port bits 15 to 14 of writeAddr[15:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : lsram_2048to139264x8.v(65) | Input port bits 15 to 14 of readAddr[15:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : lsram_2048to139264x8.v(65) | Input port bits 8 to 0 of readAddr[15:0] are unused. Assign logic for all port bits or change the input port size. @N:CL201 : SramCtrlIf.v(138) | Trying to extract state machine for register sramcurr_state. Extracted state machine for register sramcurr_state State machine has 3 reachable states with original encodings of: 00 01 10 @W:CL246 : SramCtrlIf.v(78) | Input port bits 19 to 18 of ahbsram_addr[19:0] are unused. Assign logic for all port bits or change the input port size. @W:CL156 : SramCtrlIf.v(118) | *Input l_BUSY_all_3 to expression [or] has undriven bits; assigning undriven bits to 0. Simulation mismatch possible. Assign all bits of the input. @N:CL159 : SramCtrlIf.v(80) | Input ahbsram_wdata_usram is unused. @N:CL201 : AHBLSramIf.v(209) | Trying to extract state machine for register ahbcurr_state. Extracted state machine for register ahbcurr_state State machine has 3 reachable states with original encodings of: 00 01 10 @N:CL159 : AHBLSramIf.v(108) | Input BUSY is unused. @W:CL247 : coreahblite.v(120) | Input port bit 0 of HTRANS_M0[1:0] is unused @W:CL247 : coreahblite.v(131) | Input port bit 0 of HTRANS_M1[1:0] is unused @W:CL247 : coreahblite.v(142) | Input port bit 0 of HTRANS_M2[1:0] is unused @W:CL247 : coreahblite.v(153) | Input port bit 0 of HTRANS_M3[1:0] is unused @W:CL247 : coreahblite.v(163) | Input port bit 1 of HRESP_S0[1:0] is unused @W:CL247 : coreahblite.v(176) | Input port bit 1 of HRESP_S1[1:0] is unused @W:CL247 : coreahblite.v(189) | Input port bit 1 of HRESP_S2[1:0] is unused @W:CL247 : coreahblite.v(202) | Input port bit 1 of HRESP_S3[1:0] is unused @W:CL247 : coreahblite.v(215) | Input port bit 1 of HRESP_S4[1:0] is unused @W:CL247 : coreahblite.v(228) | Input port bit 1 of HRESP_S5[1:0] is unused @W:CL247 : coreahblite.v(241) | Input port bit 1 of HRESP_S6[1:0] is unused @W:CL247 : coreahblite.v(254) | Input port bit 1 of HRESP_S7[1:0] is unused @W:CL247 : coreahblite.v(267) | Input port bit 1 of HRESP_S8[1:0] is unused @W:CL247 : coreahblite.v(280) | Input port bit 1 of HRESP_S9[1:0] is unused @W:CL247 : coreahblite.v(293) | Input port bit 1 of HRESP_S10[1:0] is unused @W:CL247 : coreahblite.v(306) | Input port bit 1 of HRESP_S11[1:0] is unused @W:CL247 : coreahblite.v(319) | Input port bit 1 of HRESP_S12[1:0] is unused @W:CL247 : coreahblite.v(332) | Input port bit 1 of HRESP_S13[1:0] is unused @W:CL247 : coreahblite.v(345) | Input port bit 1 of HRESP_S14[1:0] is unused @W:CL247 : coreahblite.v(358) | Input port bit 1 of HRESP_S15[1:0] is unused @W:CL247 : coreahblite.v(371) | Input port bit 1 of HRESP_S16[1:0] is unused @N:CL159 : coreahblite.v(123) | Input HBURST_M0 is unused. @N:CL159 : coreahblite.v(124) | Input HPROT_M0 is unused. @N:CL159 : coreahblite.v(134) | Input HBURST_M1 is unused. @N:CL159 : coreahblite.v(135) | Input HPROT_M1 is unused. @N:CL159 : coreahblite.v(145) | Input HBURST_M2 is unused. @N:CL159 : coreahblite.v(146) | Input HPROT_M2 is unused. @N:CL159 : coreahblite.v(156) | Input HBURST_M3 is unused. @N:CL159 : coreahblite.v(157) | Input HPROT_M3 is unused. @N:CL159 : coreahblite_matrix4x16.v(60) | Input HWDATA_M2 is unused. @N:CL159 : coreahblite_matrix4x16.v(69) | Input HWDATA_M3 is unused. @N:CL159 : coreahblite_matrix4x16.v(73) | Input HRDATA_S0 is unused. @N:CL159 : coreahblite_matrix4x16.v(74) | Input HREADYOUT_S0 is unused. @N:CL159 : coreahblite_matrix4x16.v(75) | Input HRESP_S0 is unused. @N:CL159 : coreahblite_matrix4x16.v(84) | Input HRDATA_S1 is unused. @N:CL159 : coreahblite_matrix4x16.v(85) | Input HREADYOUT_S1 is unused. @N:CL159 : coreahblite_matrix4x16.v(86) | Input HRESP_S1 is unused. @N:CL159 : coreahblite_matrix4x16.v(106) | Input HRDATA_S3 is unused. @N:CL159 : coreahblite_matrix4x16.v(107) | Input HREADYOUT_S3 is unused. @N:CL159 : coreahblite_matrix4x16.v(108) | Input HRESP_S3 is unused. @N:CL159 : coreahblite_matrix4x16.v(128) | Input HRDATA_S5 is unused. @N:CL159 : coreahblite_matrix4x16.v(129) | Input HREADYOUT_S5 is unused. @N:CL159 : coreahblite_matrix4x16.v(130) | Input HRESP_S5 is unused. @N:CL159 : coreahblite_matrix4x16.v(139) | Input HRDATA_S6 is unused. @N:CL159 : coreahblite_matrix4x16.v(140) | Input HREADYOUT_S6 is unused. @N:CL159 : coreahblite_matrix4x16.v(141) | Input HRESP_S6 is unused. @N:CL159 : coreahblite_matrix4x16.v(150) | Input HRDATA_S7 is unused. @N:CL159 : coreahblite_matrix4x16.v(151) | Input HREADYOUT_S7 is unused. @N:CL159 : coreahblite_matrix4x16.v(152) | Input HRESP_S7 is unused. @N:CL159 : coreahblite_matrix4x16.v(161) | Input HRDATA_S8 is unused. @N:CL159 : coreahblite_matrix4x16.v(162) | Input HREADYOUT_S8 is unused. @N:CL159 : coreahblite_matrix4x16.v(163) | Input HRESP_S8 is unused. @N:CL159 : coreahblite_matrix4x16.v(172) | Input HRDATA_S9 is unused. @N:CL159 : coreahblite_matrix4x16.v(173) | Input HREADYOUT_S9 is unused. @N:CL159 : coreahblite_matrix4x16.v(174) | Input HRESP_S9 is unused. @N:CL159 : coreahblite_matrix4x16.v(183) | Input HRDATA_S10 is unused. @N:CL159 : coreahblite_matrix4x16.v(184) | Input HREADYOUT_S10 is unused. @N:CL159 : coreahblite_matrix4x16.v(185) | Input HRESP_S10 is unused. @N:CL159 : coreahblite_matrix4x16.v(194) | Input HRDATA_S11 is unused. @N:CL159 : coreahblite_matrix4x16.v(195) | Input HREADYOUT_S11 is unused. @N:CL159 : coreahblite_matrix4x16.v(196) | Input HRESP_S11 is unused. @N:CL159 : coreahblite_matrix4x16.v(205) | Input HRDATA_S12 is unused. @N:CL159 : coreahblite_matrix4x16.v(206) | Input HREADYOUT_S12 is unused. @N:CL159 : coreahblite_matrix4x16.v(207) | Input HRESP_S12 is unused. @N:CL159 : coreahblite_matrix4x16.v(216) | Input HRDATA_S13 is unused. @N:CL159 : coreahblite_matrix4x16.v(217) | Input HREADYOUT_S13 is unused. @N:CL159 : coreahblite_matrix4x16.v(218) | Input HRESP_S13 is unused. @N:CL159 : coreahblite_matrix4x16.v(227) | Input HRDATA_S14 is unused. @N:CL159 : coreahblite_matrix4x16.v(228) | Input HREADYOUT_S14 is unused. @N:CL159 : coreahblite_matrix4x16.v(229) | Input HRESP_S14 is unused. @N:CL159 : coreahblite_matrix4x16.v(238) | Input HRDATA_S15 is unused. @N:CL159 : coreahblite_matrix4x16.v(239) | Input HREADYOUT_S15 is unused. @N:CL159 : coreahblite_matrix4x16.v(240) | Input HRESP_S15 is unused. @N:CL159 : coreahblite_matrix4x16.v(249) | Input HRDATA_S16 is unused. @N:CL159 : coreahblite_matrix4x16.v(250) | Input HREADYOUT_S16 is unused. @N:CL159 : coreahblite_matrix4x16.v(251) | Input HRESP_S16 is unused. @N:CL201 : coreahblite_slavearbiter.v(449) | Trying to extract state machine for register arbRegSMCurrentState. Extracted state machine for register arbRegSMCurrentState State machine has 16 reachable states with original encodings of: 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 @N:CL159 : coreahblite_masterstage.v(42) | Input SDATAREADY is unused. @N:CL159 : coreahblite_masterstage.v(43) | Input SHRESP is unused. @N:CL159 : coreahblite_masterstage.v(52) | Input HRDATA_S0 is unused. @N:CL159 : coreahblite_masterstage.v(53) | Input HREADYOUT_S0 is unused. @N:CL159 : coreahblite_masterstage.v(54) | Input HRDATA_S1 is unused. @N:CL159 : coreahblite_masterstage.v(55) | Input HREADYOUT_S1 is unused. @N:CL159 : coreahblite_masterstage.v(56) | Input HRDATA_S2 is unused. @N:CL159 : coreahblite_masterstage.v(57) | Input HREADYOUT_S2 is unused. @N:CL159 : coreahblite_masterstage.v(58) | Input HRDATA_S3 is unused. @N:CL159 : coreahblite_masterstage.v(59) | Input HREADYOUT_S3 is unused. @N:CL159 : coreahblite_masterstage.v(60) | Input HRDATA_S4 is unused. @N:CL159 : coreahblite_masterstage.v(61) | Input HREADYOUT_S4 is unused. @N:CL159 : coreahblite_masterstage.v(62) | Input HRDATA_S5 is unused. @N:CL159 : coreahblite_masterstage.v(63) | Input HREADYOUT_S5 is unused. @N:CL159 : coreahblite_masterstage.v(64) | Input HRDATA_S6 is unused. @N:CL159 : coreahblite_masterstage.v(65) | Input HREADYOUT_S6 is unused. @N:CL159 : coreahblite_masterstage.v(66) | Input HRDATA_S7 is unused. @N:CL159 : coreahblite_masterstage.v(67) | Input HREADYOUT_S7 is unused. @N:CL159 : coreahblite_masterstage.v(68) | Input HRDATA_S8 is unused. @N:CL159 : coreahblite_masterstage.v(69) | Input HREADYOUT_S8 is unused. @N:CL159 : coreahblite_masterstage.v(70) | Input HRDATA_S9 is unused. @N:CL159 : coreahblite_masterstage.v(71) | Input HREADYOUT_S9 is unused. @N:CL159 : coreahblite_masterstage.v(72) | Input HRDATA_S10 is unused. @N:CL159 : coreahblite_masterstage.v(73) | Input HREADYOUT_S10 is unused. @N:CL159 : coreahblite_masterstage.v(74) | Input HRDATA_S11 is unused. @N:CL159 : coreahblite_masterstage.v(75) | Input HREADYOUT_S11 is unused. @N:CL159 : coreahblite_masterstage.v(76) | Input HRDATA_S12 is unused. @N:CL159 : coreahblite_masterstage.v(77) | Input HREADYOUT_S12 is unused. @N:CL159 : coreahblite_masterstage.v(78) | Input HRDATA_S13 is unused. @N:CL159 : coreahblite_masterstage.v(79) | Input HREADYOUT_S13 is unused. @N:CL159 : coreahblite_masterstage.v(80) | Input HRDATA_S14 is unused. @N:CL159 : coreahblite_masterstage.v(81) | Input HREADYOUT_S14 is unused. @N:CL159 : coreahblite_masterstage.v(82) | Input HRDATA_S15 is unused. @N:CL159 : coreahblite_masterstage.v(83) | Input HREADYOUT_S15 is unused. @N:CL159 : coreahblite_masterstage.v(84) | Input HRDATA_S16 is unused. @N:CL159 : coreahblite_masterstage.v(85) | Input HREADYOUT_S16 is unused. @W:CL246 : coreahblite_masterstage.v(42) | Input port bits 16 to 3 of SDATAREADY[16:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : coreahblite_masterstage.v(42) | Input port bits 1 to 0 of SDATAREADY[16:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : coreahblite_masterstage.v(43) | Input port bits 16 to 3 of SHRESP[16:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : coreahblite_masterstage.v(43) | Input port bits 1 to 0 of SHRESP[16:0] are unused. Assign logic for all port bits or change the input port size. @N:CL159 : coreahblite_masterstage.v(52) | Input HRDATA_S0 is unused. @N:CL159 : coreahblite_masterstage.v(53) | Input HREADYOUT_S0 is unused. @N:CL159 : coreahblite_masterstage.v(54) | Input HRDATA_S1 is unused. @N:CL159 : coreahblite_masterstage.v(55) | Input HREADYOUT_S1 is unused. @N:CL159 : coreahblite_masterstage.v(58) | Input HRDATA_S3 is unused. @N:CL159 : coreahblite_masterstage.v(59) | Input HREADYOUT_S3 is unused. @N:CL159 : coreahblite_masterstage.v(60) | Input HRDATA_S4 is unused. @N:CL159 : coreahblite_masterstage.v(61) | Input HREADYOUT_S4 is unused. @N:CL159 : coreahblite_masterstage.v(62) | Input HRDATA_S5 is unused. @N:CL159 : coreahblite_masterstage.v(63) | Input HREADYOUT_S5 is unused. @N:CL159 : coreahblite_masterstage.v(64) | Input HRDATA_S6 is unused. @N:CL159 : coreahblite_masterstage.v(65) | Input HREADYOUT_S6 is unused. @N:CL159 : coreahblite_masterstage.v(66) | Input HRDATA_S7 is unused. @N:CL159 : coreahblite_masterstage.v(67) | Input HREADYOUT_S7 is unused. @N:CL159 : coreahblite_masterstage.v(68) | Input HRDATA_S8 is unused. @N:CL159 : coreahblite_masterstage.v(69) | Input HREADYOUT_S8 is unused. @N:CL159 : coreahblite_masterstage.v(70) | Input HRDATA_S9 is unused. @N:CL159 : coreahblite_masterstage.v(71) | Input HREADYOUT_S9 is unused. @N:CL159 : coreahblite_masterstage.v(72) | Input HRDATA_S10 is unused. @N:CL159 : coreahblite_masterstage.v(73) | Input HREADYOUT_S10 is unused. @N:CL159 : coreahblite_masterstage.v(74) | Input HRDATA_S11 is unused. @N:CL159 : coreahblite_masterstage.v(75) | Input HREADYOUT_S11 is unused. @N:CL159 : coreahblite_masterstage.v(76) | Input HRDATA_S12 is unused. @N:CL159 : coreahblite_masterstage.v(77) | Input HREADYOUT_S12 is unused. @N:CL159 : coreahblite_masterstage.v(78) | Input HRDATA_S13 is unused. @N:CL159 : coreahblite_masterstage.v(79) | Input HREADYOUT_S13 is unused. @N:CL159 : coreahblite_masterstage.v(80) | Input HRDATA_S14 is unused. @N:CL159 : coreahblite_masterstage.v(81) | Input HREADYOUT_S14 is unused. @N:CL159 : coreahblite_masterstage.v(82) | Input HRDATA_S15 is unused. @N:CL159 : coreahblite_masterstage.v(83) | Input HREADYOUT_S15 is unused. @N:CL159 : coreahblite_masterstage.v(84) | Input HRDATA_S16 is unused. @N:CL159 : coreahblite_masterstage.v(85) | Input HREADYOUT_S16 is unused. @W:CL246 : coreahblite_masterstage.v(42) | Input port bits 16 to 5 of SDATAREADY[16:0] are unused. Assign logic for all port bits or change the input port size. @W:CL247 : coreahblite_masterstage.v(42) | Input port bit 3 of SDATAREADY[16:0] is unused @W:CL246 : coreahblite_masterstage.v(42) | Input port bits 1 to 0 of SDATAREADY[16:0] are unused. Assign logic for all port bits or change the input port size. @W:CL246 : coreahblite_masterstage.v(43) | Input port bits 16 to 5 of SHRESP[16:0] are unused. Assign logic for all port bits or change the input port size. @W:CL247 : coreahblite_masterstage.v(43) | Input port bit 3 of SHRESP[16:0] is unused @W:CL246 : coreahblite_masterstage.v(43) | Input port bits 1 to 0 of SHRESP[16:0] are unused. Assign logic for all port bits or change the input port size. @N:CL159 : coreahblite_masterstage.v(52) | Input HRDATA_S0 is unused. @N:CL159 : coreahblite_masterstage.v(53) | Input HREADYOUT_S0 is unused. @N:CL159 : coreahblite_masterstage.v(54) | Input HRDATA_S1 is unused. @N:CL159 : coreahblite_masterstage.v(55) | Input HREADYOUT_S1 is unused. @N:CL159 : coreahblite_masterstage.v(58) | Input HRDATA_S3 is unused. @N:CL159 : coreahblite_masterstage.v(59) | Input HREADYOUT_S3 is unused. @N:CL159 : coreahblite_masterstage.v(62) | Input HRDATA_S5 is unused. @N:CL159 : coreahblite_masterstage.v(63) | Input HREADYOUT_S5 is unused. @N:CL159 : coreahblite_masterstage.v(64) | Input HRDATA_S6 is unused. @N:CL159 : coreahblite_masterstage.v(65) | Input HREADYOUT_S6 is unused. @N:CL159 : coreahblite_masterstage.v(66) | Input HRDATA_S7 is unused. @N:CL159 : coreahblite_masterstage.v(67) | Input HREADYOUT_S7 is unused. @N:CL159 : coreahblite_masterstage.v(68) | Input HRDATA_S8 is unused. @N:CL159 : coreahblite_masterstage.v(69) | Input HREADYOUT_S8 is unused. @N:CL159 : coreahblite_masterstage.v(70) | Input HRDATA_S9 is unused. @N:CL159 : coreahblite_masterstage.v(71) | Input HREADYOUT_S9 is unused. @N:CL159 : coreahblite_masterstage.v(72) | Input HRDATA_S10 is unused. @N:CL159 : coreahblite_masterstage.v(73) | Input HREADYOUT_S10 is unused. @N:CL159 : coreahblite_masterstage.v(74) | Input HRDATA_S11 is unused. @N:CL159 : coreahblite_masterstage.v(75) | Input HREADYOUT_S11 is unused. @N:CL159 : coreahblite_masterstage.v(76) | Input HRDATA_S12 is unused. @N:CL159 : coreahblite_masterstage.v(77) | Input HREADYOUT_S12 is unused. @N:CL159 : coreahblite_masterstage.v(78) | Input HRDATA_S13 is unused. @N:CL159 : coreahblite_masterstage.v(79) | Input HREADYOUT_S13 is unused. @N:CL159 : coreahblite_masterstage.v(80) | Input HRDATA_S14 is unused. @N:CL159 : coreahblite_masterstage.v(81) | Input HREADYOUT_S14 is unused. @N:CL159 : coreahblite_masterstage.v(82) | Input HRDATA_S15 is unused. @N:CL159 : coreahblite_masterstage.v(83) | Input HREADYOUT_S15 is unused. @N:CL159 : coreahblite_masterstage.v(84) | Input HRDATA_S16 is unused. @N:CL159 : coreahblite_masterstage.v(85) | Input HREADYOUT_S16 is unused. At c_ver Exit (Real Time elapsed 0h:00m:05s; CPU Time elapsed 0h:00m:05s; Memory used current: 128MB peak: 150MB) Process took 0h:00m:05s realtime, 0h:00m:05s cputime Process completed successfully. # Tue Aug 29 15:41:56 2017 ###########################################################] Synopsys Netlist Linker, version comp2016q3p1, Build 117R, built Nov 17 2016 @N: : | Running in 64-bit mode At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 92MB peak: 93MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Tue Aug 29 15:41:57 2017 ###########################################################] @END At c_hdl Exit (Real Time elapsed 0h:00m:06s; CPU Time elapsed 0h:00m:05s; Memory used current: 3MB peak: 4MB) Process took 0h:00m:06s realtime, 0h:00m:05s cputime Process completed successfully. # Tue Aug 29 15:41:57 2017 ###########################################################] Synopsys Netlist Linker, version comp2016q3p1, Build 117R, built Nov 17 2016 @N: : | Running in 64-bit mode At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 108MB peak: 109MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Tue Aug 29 15:41:59 2017 ###########################################################] Pre-mapping Report # Tue Aug 29 15:41:59 2017 Synopsys Generic Technology Pre-mapping, Version map201609actrcp1, Build 005R, Built Jan 25 2017 01:01:33 Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Product Version L-2016.09M-2 Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB) Reading constraint file: C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\designer\PCIe_Demo\synthesis.fdc Linked File: PCIe_Demo_scck.rpt Printing clock summary report in "C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\synthesis\PCIe_Demo_scck.rpt" file @N:MF248 : | Running in 64-bit mode. @N:MF667 : | Clock conversion disabled. (Command "set_option -fix_gated_and_generated_clocks 0" in the project file.) Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 144MB peak: 165MB) Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 144MB peak: 165MB) Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 144MB peak: 165MB) Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 145MB peak: 165MB) @W:BN132 : coreahblite_matrix4x16.v(3626) | Removing user instance CoreAHBLite_0.matrix4x16.slavestage_16 because it is equivalent to instance CoreAHBLite_0.matrix4x16.slavestage_15. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreahblite_matrix4x16.v(3580) | Removing user instance CoreAHBLite_0.matrix4x16.slavestage_15 because it is equivalent to instance CoreAHBLite_0.matrix4x16.slavestage_14. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreahblite_matrix4x16.v(3534) | Removing user instance CoreAHBLite_0.matrix4x16.slavestage_14 because it is equivalent to instance CoreAHBLite_0.matrix4x16.slavestage_13. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreahblite_matrix4x16.v(3488) | Removing user instance CoreAHBLite_0.matrix4x16.slavestage_13 because it is equivalent to instance CoreAHBLite_0.matrix4x16.slavestage_12. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreahblite_matrix4x16.v(3442) | Removing user instance CoreAHBLite_0.matrix4x16.slavestage_12 because it is equivalent to instance CoreAHBLite_0.matrix4x16.slavestage_11. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreahblite_matrix4x16.v(3396) | Removing user instance CoreAHBLite_0.matrix4x16.slavestage_11 because it is equivalent to instance CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreahblite_matrix4x16.v(3304) | Removing user instance CoreAHBLite_0.matrix4x16.slavestage_9 because it is equivalent to instance CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreahblite_matrix4x16.v(3258) | Removing user instance CoreAHBLite_0.matrix4x16.slavestage_8 because it is equivalent to instance CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreahblite_matrix4x16.v(3212) | Removing user instance CoreAHBLite_0.matrix4x16.slavestage_7 because it is equivalent to instance CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreahblite_matrix4x16.v(3166) | Removing user instance CoreAHBLite_0.matrix4x16.slavestage_6 because it is equivalent to instance CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance. @N:MO111 : coresysservices_cmddec.v(372) | Tristate driver cutrans_done_o (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) on net cutrans_done_o (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) has its enable tied to GND. @N:MO111 : pcie_demo_sb_fabosc_0_osc.v(17) | Tristate driver RCOSC_1MHZ_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) on net RCOSC_1MHZ_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) has its enable tied to GND. @N:MO111 : pcie_demo_sb_fabosc_0_osc.v(18) | Tristate driver RCOSC_1MHZ_O2F (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) on net RCOSC_1MHZ_O2F (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) has its enable tied to GND. @N:MO111 : pcie_demo_sb_fabosc_0_osc.v(15) | Tristate driver RCOSC_25_50MHZ_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) on net RCOSC_25_50MHZ_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) has its enable tied to GND. @N:MO111 : pcie_demo_sb_fabosc_0_osc.v(19) | Tristate driver XTLOSC_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) on net XTLOSC_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) has its enable tied to GND. @N:MO111 : pcie_demo_sb_fabosc_0_osc.v(20) | Tristate driver XTLOSC_O2F (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) on net XTLOSC_O2F (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) has its enable tied to GND. @W:MO129 : coreresetp.v(695) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.SDIF1_PERST_N_q1 is reduced to a combinational gate by constant propagation. @W:MO129 : coreresetp.v(714) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.SDIF2_PERST_N_q1 is reduced to a combinational gate by constant propagation. @W:MO129 : coreresetp.v(733) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.SDIF3_PERST_N_q1 is reduced to a combinational gate by constant propagation. @W:MO129 : coreresetp.v(769) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.sm1_areset_n_q1 is reduced to a combinational gate by constant propagation. @W:MO129 : coreresetp.v(695) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.SDIF1_PERST_N_q2 is reduced to a combinational gate by constant propagation. @W:MO129 : coreresetp.v(714) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.SDIF2_PERST_N_q2 is reduced to a combinational gate by constant propagation. @W:MO129 : coreresetp.v(733) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.SDIF3_PERST_N_q2 is reduced to a combinational gate by constant propagation. @W:MO129 : coreresetp.v(769) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.sm1_areset_n_clk_base is reduced to a combinational gate by constant propagation. @W:MO129 : coreresetp.v(695) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.SDIF1_PERST_N_q3 is reduced to a combinational gate by constant propagation. @W:MO129 : coreresetp.v(714) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.SDIF2_PERST_N_q3 is reduced to a combinational gate by constant propagation. @W:MO129 : coreresetp.v(733) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.SDIF3_PERST_N_q3 is reduced to a combinational gate by constant propagation. @W:MO129 : coreresetp.v(1388) | Sequential instance PCIe_Demo_sb_0.CORERESETP_0.RESET_N_F2M_int is reduced to a combinational gate by constant propagation. @N:BN115 : coreahblite_masterstage.v(209) | Removing instance address_decode (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_0_0s_0_1_0_1(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_ADDRDEC_Z3_0(verilog) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance regHTRANS (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_0_0s_0_1_0_1(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN115 : coreahblite_masterstage.v(639) | Removing instance default_slave_sm (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_0_0s_0_1_0_1(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_DEFAULTSLAVESM_0s_0_1_2(verilog) because it does not drive other instances. @N:BN115 : coreahblite_masterstage.v(209) | Removing instance address_decode (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_0_0s_0_1_0_0(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_ADDRDEC_Z3_1(verilog) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance regHTRANS (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_0_0s_0_1_0_0(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN115 : coreahblite_masterstage.v(639) | Removing instance default_slave_sm (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_0_0s_0_1_0_0(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_DEFAULTSLAVESM_0s_0_1_4_0(verilog) because it does not drive other instances. @N:BN115 : coreahblite_matrix4x16.v(2767) | Removing instance masterstage_2 (in view: COREAHBLITE_LIB.COREAHBLITE_MATRIX4X16_1_1_0_20_4_0_0_0s(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_0_0s_0_1_0_1(verilog) because it does not drive other instances. @N:BN115 : coreahblite_matrix4x16.v(2831) | Removing instance masterstage_3 (in view: COREAHBLITE_LIB.COREAHBLITE_MATRIX4X16_1_1_0_20_4_0_0_0s(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_0_0s_0_1_0_0(verilog) because it does not drive other instances. @N:BN115 : coreahblite_masterstage.v(209) | Removing instance address_decode (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_85_0s_0_1_0_1(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_ADDRDEC_Z14_0(verilog) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance regHTRANS (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_85_0s_0_1_0_1(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN115 : coreahblite_masterstage.v(639) | Removing instance default_slave_sm (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_85_0s_0_1_0_1(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_DEFAULTSLAVESM_0s_0_1_4_2(verilog) because it does not drive other instances. @N:BN115 : coreahblite_masterstage.v(209) | Removing instance address_decode (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_85_0s_0_1_0_0(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_ADDRDEC_Z14_1(verilog) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance regHTRANS (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_85_0s_0_1_0_0(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN115 : coreahblite_masterstage.v(639) | Removing instance default_slave_sm (in view: COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_85_0s_0_1_0_0(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_DEFAULTSLAVESM_0s_0_1_4_3(verilog) because it does not drive other instances. @N:BN115 : coreahblite_matrix4x16.v(2767) | Removing instance masterstage_2 (in view: COREAHBLITE_LIB.COREAHBLITE_MATRIX4X16_1_1_85_65536_65536_0_0_0s(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_85_0s_0_1_0_1(verilog) because it does not drive other instances. @N:BN115 : coreahblite_matrix4x16.v(2831) | Removing instance masterstage_3 (in view: COREAHBLITE_LIB.COREAHBLITE_MATRIX4X16_1_1_85_65536_65536_0_0_0s(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_MASTERSTAGE_1_1_85_0s_0_1_0_0(verilog) because it does not drive other instances. @N:BN362 : coresysservices_fsmctrl.v(305) | Removing sequential instance clr_req (in view: CORESYSSERVICES_LIB.CoreSysServices_FSMCtrl(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreconfigp.v(461) | Removing sequential instance MDDR_PENABLE (in view: work.CoreConfigP_Z16(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreconfigp.v(461) | Removing sequential instance FDDR_PENABLE (in view: work.CoreConfigP_Z16(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreconfigp.v(461) | Removing sequential instance SDIF1_PENABLE (in view: work.CoreConfigP_Z16(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreconfigp.v(461) | Removing sequential instance SDIF2_PENABLE (in view: work.CoreConfigP_Z16(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreconfigp.v(461) | Removing sequential instance SDIF3_PENABLE (in view: work.CoreConfigP_Z16(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(1089) | Removing sequential instance DDR_READY_int (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(1089) | Removing sequential instance FDDR_CORE_RESET_N_int (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(1235) | Removing sequential instance SDIF1_PHY_RESET_N_int (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(1235) | Removing sequential instance SDIF1_CORE_RESET_N_0 (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(1300) | Removing sequential instance SDIF2_PHY_RESET_N_int (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(1300) | Removing sequential instance SDIF2_CORE_RESET_N_0 (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(1365) | Removing sequential instance SDIF3_PHY_RESET_N_int (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(1365) | Removing sequential instance SDIF3_CORE_RESET_N_0 (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN115 : coreahblite_matrix4x16.v(2890) | Removing instance slavestage_0 (in view: COREAHBLITE_LIB.COREAHBLITE_MATRIX4X16_1_1_85_65536_65536_0_0_0s(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_SLAVESTAGE_0s_0_0_4(verilog) because it does not drive other instances. @N:BN115 : coreahblite_matrix4x16.v(2890) | Removing instance slavestage_0 (in view: COREAHBLITE_LIB.COREAHBLITE_MATRIX4X16_1_1_0_20_4_0_0_0s(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_SLAVESTAGE_0s_0_0_2(verilog) because it does not drive other instances. @N:BN362 : coresysservices_userif.v(416) | Removing sequential instance ucmd_error (in view: CORESYSSERVICES_LIB.CoreSysServices_UserIF_Z9(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_slavestage.v(79) | Removing sequential instance masterDataInProg[3:0] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVESTAGE_0s_0_0_2(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahblite_slavestage.v(79) | Removing sequential instance masterDataInProg[3:0] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVESTAGE_0s_0_0_4(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(1235) | Removing sequential instance sdif1_state[3:0] (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.statemachine(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(1300) | Removing sequential instance sdif2_state[3:0] (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.statemachine(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(1365) | Removing sequential instance sdif3_state[3:0] (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.statemachine(prim) because it does not drive other instances. @N:BN362 : coresysservices_fsmctrl.v(838) | Removing sequential instance fmhsel_o (in view: CORESYSSERVICES_LIB.CoreSysServices_FSMCtrl(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coresysservices_userif.v(439) | Removing sequential instance udata_wrdy_d2 (in view: CORESYSSERVICES_LIB.CoreSysServices_UserIF_Z9(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(811) | Removing sequential instance sdif1_areset_n_clk_base (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(825) | Removing sequential instance sdif2_areset_n_clk_base (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(839) | Removing sequential instance sdif3_areset_n_clk_base (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN115 : coreahblite_slavestage.v(87) | Removing instance slave_arbiter (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVESTAGE_0s_0_0_4(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_3(verilog) because it does not drive other instances. @N:BN362 : coreresetp.v(811) | Removing sequential instance sdif1_areset_n_q1 (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(825) | Removing sequential instance sdif2_areset_n_q1 (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreresetp.v(839) | Removing sequential instance sdif3_areset_n_q1 (in view: work.CoreResetP_Z17(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN115 : coreahblite_slavestage.v(87) | Removing instance slave_arbiter (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVESTAGE_0s_0_0_2(verilog)) of type view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_0(verilog) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2461) | Removing sequential instance cudata_wrdy_o (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_slavearbiter.v(449) | Removing sequential instance arbRegSMCurrentState[15:0] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_3(verilog)) of type view:PrimLib.statemachine(prim) because it does not drive other instances. @N:BN362 : coreahblite_slavearbiter.v(449) | Removing sequential instance arbRegSMCurrentState[15:0] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_0(verilog)) of type view:PrimLib.statemachine(prim) because it does not drive other instances. syn_allowed_resources : blockrams=21 set on top level netlist PCIe_Demo Finished netlist restructuring (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:00s; Memory used current: 176MB peak: 178MB) Clock Summary ***************** Start Requested Requested Clock Clock Clock Clock Frequency Period Type Group Load -------------------------------------------------------------------------------------------------------------------------------------- CLK0 100.0 MHz 10.000 declared default_clkgroup 0 PCIe_Demo_sb_0/CCC_0/GL0 50.0 MHz 20.000 generated (from CLK0) default_clkgroup 1734 PCIe_Demo_sb_0/CCC_0/GL3 125.0 MHz 8.000 generated (from CLK0) default_clkgroup 37 PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT 50.0 MHz 20.000 declared default_clkgroup 30 PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB 25.0 MHz 40.000 declared default_clkgroup 111 ====================================================================================================================================== Finished Pre Mapping Phase. @N:BN225 : | Writing default property annotation file C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\synthesis\PCIe_Demo.sap. Starting constraint checker (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:01s; Memory used current: 171MB peak: 178MB) Encoding state machine arbRegSMCurrentState[15:0] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_1(verilog)) original code -> new code 0000 -> 0000000000000001 0001 -> 0000000000000010 0010 -> 0000000000000100 0011 -> 0000000000001000 0100 -> 0000000000010000 0101 -> 0000000000100000 0110 -> 0000000001000000 0111 -> 0000000010000000 1000 -> 0000000100000000 1001 -> 0000001000000000 1010 -> 0000010000000000 1011 -> 0000100000000000 1100 -> 0001000000000000 1101 -> 0010000000000000 1110 -> 0100000000000000 1111 -> 1000000000000000 Encoding state machine arbRegSMCurrentState[15:0] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_2(verilog)) original code -> new code 0000 -> 0000000000000001 0001 -> 0000000000000010 0010 -> 0000000000000100 0011 -> 0000000000001000 0100 -> 0000000000010000 0101 -> 0000000000100000 0110 -> 0000000001000000 0111 -> 0000000010000000 1000 -> 0000000100000000 1001 -> 0000001000000000 1010 -> 0000010000000000 1011 -> 0000100000000000 1100 -> 0001000000000000 1101 -> 0010000000000000 1110 -> 0100000000000000 1111 -> 1000000000000000 Encoding state machine ahbcurr_state[2:0] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 Encoding state machine sramcurr_state[2:0] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_SramCtrlIf_0s_34816s_34816s_512s_128s_32s_0s_0_1_2(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 Encoding state machine CAHBtoAPB3IOI[4:0] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3O_0s_0_1_0_1_2_3_4(verilog)) original code -> new code 000 -> 00001 001 -> 00010 010 -> 00100 011 -> 01000 100 -> 10000 Encoding state machine CAHBtoAPB3lIl[2:0] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3OIl_0s_0_1_2(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 Encoding state machine resp_curr_state[30:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) original code -> new code 000000 -> 0000000000000000000000000000001 000001 -> 0000000000000000000000000000010 000011 -> 0000000000000000000000000000100 000101 -> 0000000000000000000000000001000 000110 -> 0000000000000000000000000010000 000111 -> 0000000000000000000000000100000 001000 -> 0000000000000000000000001000000 001001 -> 0000000000000000000000010000000 001100 -> 0000000000000000000000100000000 001101 -> 0000000000000000000001000000000 010000 -> 0000000000000000000010000000000 010001 -> 0000000000000000000100000000000 010010 -> 0000000000000000001000000000000 010011 -> 0000000000000000010000000000000 010100 -> 0000000000000000100000000000000 010101 -> 0000000000000001000000000000000 010110 -> 0000000000000010000000000000000 010111 -> 0000000000000100000000000000000 011000 -> 0000000000001000000000000000000 011001 -> 0000000000010000000000000000000 011011 -> 0000000000100000000000000000000 100100 -> 0000000001000000000000000000000 100101 -> 0000000010000000000000000000000 100110 -> 0000000100000000000000000000000 100111 -> 0000001000000000000000000000000 101000 -> 0000010000000000000000000000000 101001 -> 0000100000000000000000000000000 101100 -> 0001000000000000000000000000000 101110 -> 0010000000000000000000000000000 101111 -> 0100000000000000000000000000000 110000 -> 1000000000000000000000000000000 Encoding state machine asynchevent_curr_state[1:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) original code -> new code 0000 -> 0 1001 -> 1 @N:MO225 : coresysservices_cmddec.v(3426) | There are no possible illegal states for state machine asynchevent_curr_state[1:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)); safe FSM implementation is not required. Encoding state machine req_curr_state[36:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) original code -> new code 000000 -> 0000000000000000000000000000000000001 000001 -> 0000000000000000000000000000000000010 000010 -> 0000000000000000000000000000000000100 000011 -> 0000000000000000000000000000000001000 000100 -> 0000000000000000000000000000000010000 000101 -> 0000000000000000000000000000000100000 000111 -> 0000000000000000000000000000001000000 001000 -> 0000000000000000000000000000010000000 001001 -> 0000000000000000000000000000100000000 001010 -> 0000000000000000000000000001000000000 001011 -> 0000000000000000000000000010000000000 001100 -> 0000000000000000000000000100000000000 001101 -> 0000000000000000000000001000000000000 001110 -> 0000000000000000000000010000000000000 001111 -> 0000000000000000000000100000000000000 010000 -> 0000000000000000000001000000000000000 010001 -> 0000000000000000000010000000000000000 010010 -> 0000000000000000000100000000000000000 010011 -> 0000000000000000001000000000000000000 010100 -> 0000000000000000010000000000000000000 010101 -> 0000000000000000100000000000000000000 100001 -> 0000000000000001000000000000000000000 100010 -> 0000000000000010000000000000000000000 100101 -> 0000000000000100000000000000000000000 100110 -> 0000000000001000000000000000000000000 101000 -> 0000000000010000000000000000000000000 101001 -> 0000000000100000000000000000000000000 101010 -> 0000000001000000000000000000000000000 101011 -> 0000000010000000000000000000000000000 101100 -> 0000000100000000000000000000000000000 101101 -> 0000001000000000000000000000000000000 101110 -> 0000010000000000000000000000000000000 110000 -> 0000100000000000000000000000000000000 110001 -> 0001000000000000000000000000000000000 110010 -> 0010000000000000000000000000000000000 110011 -> 0100000000000000000000000000000000000 110100 -> 1000000000000000000000000000000000000 Encoding state machine main_curr_state[2:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 Encoding state machine curr_state[6:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_FSMCtrl(verilog)) original code -> new code 0000 -> 0000001 0001 -> 0000010 0010 -> 0000100 0101 -> 0001000 1000 -> 0010000 1001 -> 0100000 1011 -> 1000000 @N:BN362 : coresysservices_fsmctrl.v(612) | Removing sequential instance burstwrflag_last_n (in view: CORESYSSERVICES_LIB.CoreSysServices_FSMCtrl(verilog)) of type view:PrimLib.dffse(prim) because it does not drive other instances. Encoding state machine state[28:0] (in view: work.CoreConfigMaster_Z12(verilog)) original code -> new code 000000 -> 00000000000000000000000000001 000001 -> 00000000000000000000000000010 000010 -> 00000000000000000000000000100 000011 -> 00000000000000000000000001000 000100 -> 00000000000000000000000010000 000101 -> 00000000000000000000000100000 000110 -> 00000000000000000000001000000 000111 -> 00000000000000000000010000000 001001 -> 00000000000000000000100000000 001010 -> 00000000000000000001000000000 001011 -> 00000000000000000010000000000 001100 -> 00000000000000000100000000000 001101 -> 00000000000000001000000000000 001110 -> 00000000000000010000000000000 001111 -> 00000000000000100000000000000 010000 -> 00000000000001000000000000000 010001 -> 00000000000010000000000000000 010010 -> 00000000000100000000000000000 010011 -> 00000000001000000000000000000 010100 -> 00000000010000000000000000000 010101 -> 00000000100000000000000000000 010110 -> 00000001000000000000000000000 100000 -> 00000010000000000000000000000 100001 -> 00000100000000000000000000000 100010 -> 00001000000000000000000000000 100011 -> 00010000000000000000000000000 100100 -> 00100000000000000000000000000 100101 -> 01000000000000000000000000000 100110 -> 10000000000000000000000000000 Encoding state machine arbRegSMCurrentState[15:0] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_4(verilog)) original code -> new code 0000 -> 0000000000000001 0001 -> 0000000000000010 0010 -> 0000000000000100 0011 -> 0000000000001000 0100 -> 0000000000010000 0101 -> 0000000000100000 0110 -> 0000000001000000 0111 -> 0000000010000000 1000 -> 0000000100000000 1001 -> 0000001000000000 1010 -> 0000010000000000 1011 -> 0000100000000000 1100 -> 0001000000000000 1101 -> 0010000000000000 1110 -> 0100000000000000 1111 -> 1000000000000000 Encoding state machine state[2:0] (in view: work.CoreConfigP_Z16(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 Encoding state machine state[3:0] (in view: work.coreresetp_pcie_hotreset(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 11 -> 11 @N:MO225 : coreresetp_pcie_hotreset.v(179) | There are no possible illegal states for state machine state[3:0] (in view: work.coreresetp_pcie_hotreset(verilog)); safe FSM implementation is not required. Encoding state machine sm0_state[6:0] (in view: work.CoreResetP_Z17(verilog)) original code -> new code 000 -> 0000001 001 -> 0000010 010 -> 0000100 011 -> 0001000 100 -> 0010000 101 -> 0100000 110 -> 1000000 Encoding state machine sdif0_state[3:0] (in view: work.CoreResetP_Z17(verilog)) original code -> new code 000 -> 00 001 -> 01 010 -> 10 011 -> 11 @N:MO225 : coreresetp.v(1170) | There are no possible illegal states for state machine sdif0_state[3:0] (in view: work.CoreResetP_Z17(verilog)); safe FSM implementation is not required. Encoding state machine ahb_state[5:0] (in view: work.Serial_Num_0s_1s_2s_3s_4294967292s_4294967293s(verilog)) original code -> new code 000 -> 000001 001 -> 000010 010 -> 000100 011 -> 001000 100 -> 010000 101 -> 100000 @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[8] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[9] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[10] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[11] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[12] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[13] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[14] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[15] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[16] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[17] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[18] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[19] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[20] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[21] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[22] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[23] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[28] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[29] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[30] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3OOl[31] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[9] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[10] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[11] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[12] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[13] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[14] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[15] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[16] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[17] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[18] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[19] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[20] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[21] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[22] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[23] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[24] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[25] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[26] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[27] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[28] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[29] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[30] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3lOl[31] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3l1I_0s(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : ahblsramif.v(184) | Removing sequential instance HADDR_d[16] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : ahblsramif.v(184) | Removing sequential instance HADDR_d[17] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : ahblsramif.v(184) | Removing sequential instance HADDR_d[18] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @N:BN362 : ahblsramif.v(184) | Removing sequential instance HADDR_d[19] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @W:MF511 : | Found issues with constraints. Please check constraint checker report "C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\synthesis\PCIe_Demo_cck.rpt" . Finished constraint checker (Real Time elapsed 0h:00m:05s; CPU Time elapsed 0h:00m:04s; Memory used current: 204MB peak: 206MB) Pre-mapping successful! At Mapper Exit (Real Time elapsed 0h:00m:05s; CPU Time elapsed 0h:00m:04s; Memory used current: 78MB peak: 206MB) Process took 0h:00m:05s realtime, 0h:00m:04s cputime # Tue Aug 29 15:42:05 2017 ###########################################################] Map & Optimize Report # Tue Aug 29 15:42:05 2017 Synopsys Generic Technology Mapper, Version map201609actrcp1, Build 005R, Built Jan 25 2017 01:01:33 Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Product Version L-2016.09M-2 Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB) @N:MF248 : | Running in 64-bit mode. @N:MF667 : | Clock conversion disabled. (Command "set_option -fix_gated_and_generated_clocks 0" in the project file.) Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 101MB) Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 100MB peak: 101MB) Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 101MB peak: 102MB) Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 101MB peak: 104MB) Starting Optimization and Mapping (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 152MB peak: 154MB) @N:MO111 : coresysservices_cmddec.v(372) | Tristate driver cutrans_done_o (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) on net cutrans_done_o (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) has its enable tied to GND. @N:MO111 : | Tristate driver cutrans_done_o_t (in view: CORESYSSERVICES_LIB.PCIe_Demo_CORESYSSERVICES_0_CORESYSSERVICES_Z11(verilog)) on net cutrans_done_o (in view: CORESYSSERVICES_LIB.PCIe_Demo_CORESYSSERVICES_0_CORESYSSERVICES_Z11(verilog)) has its enable tied to GND. @N:MO111 : pcie_demo_sb_fabosc_0_osc.v(20) | Tristate driver XTLOSC_O2F (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) on net XTLOSC_O2F (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) has its enable tied to GND. @N:MO111 : pcie_demo_sb_fabosc_0_osc.v(19) | Tristate driver XTLOSC_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) on net XTLOSC_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) has its enable tied to GND. @N:MO111 : pcie_demo_sb_fabosc_0_osc.v(18) | Tristate driver RCOSC_1MHZ_O2F (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) on net RCOSC_1MHZ_O2F (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) has its enable tied to GND. @N:MO111 : pcie_demo_sb_fabosc_0_osc.v(17) | Tristate driver RCOSC_1MHZ_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) on net RCOSC_1MHZ_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) has its enable tied to GND. @N:MO111 : pcie_demo_sb_fabosc_0_osc.v(15) | Tristate driver RCOSC_25_50MHZ_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) on net RCOSC_25_50MHZ_CCC (in view: work.PCIe_Demo_sb_FABOSC_0_OSC(verilog)) has its enable tied to GND. @W:BN132 : coreresetp.v(898) | Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.sdif2_areset_n_rcosc_q1 because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.sdif1_areset_n_rcosc_q1. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreresetp.v(912) | Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.sdif3_areset_n_rcosc_q1 because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.sdif1_areset_n_rcosc_q1. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreresetp.v(912) | Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.sdif3_areset_n_rcosc because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.sdif2_areset_n_rcosc. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreresetp.v(898) | Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.sdif2_areset_n_rcosc because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.sdif1_areset_n_rcosc. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreresetp.v(1581) | Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.release_sdif3_core because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.release_sdif2_core. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coreresetp.v(1549) | Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.release_sdif2_core because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.release_sdif1_core. To keep the instance, apply constraint syn_preserve=1 on the instance. Available hyper_sources - for debug and ip models None Found @N:BN362 : ahblsramif.v(390) | Removing sequential instance ahbsram_wdata_usram_d[31:0] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) of type view:PrimLib.dffre(prim) because it does not drive other instances. @W:BN132 : coresysservices_cmddec.v(3030) | Removing user instance CORESYSSERVICES_0.U_CmdDec.resp_srcreg_data[7] because it is equivalent to instance CORESYSSERVICES_0.U_CmdDec.resp_srcreg_data[1]. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:BN132 : coresysservices_cmddec.v(2889) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.resp_srcreg_data_d1[7] because it is equivalent to instance CORESYSSERVICES_0.U_CmdDec.resp_srcreg_data_d1[1]. To keep the instance, apply constraint syn_preserve=1 on the instance. Finished RTL optimizations (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 150MB peak: 154MB) @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[20] (in view: work.PCIe_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[21] (in view: work.PCIe_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[22] (in view: work.PCIe_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[23] (in view: work.PCIe_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[24] (in view: work.PCIe_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[25] (in view: work.PCIe_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[26] (in view: work.PCIe_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[27] (in view: work.PCIe_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @W:MO160 : coresysservices_userif.v(696) | Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[7] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(696) | Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[6] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(696) | Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[5] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(696) | Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[4] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(696) | Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[3] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(696) | Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[2] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(696) | Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[1] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(163) | Register bit CoreAHBLite_0.matrix4x16.masterstage_1.regHSIZE[2] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(163) | Register bit CoreAHBLite_0.matrix4x16.masterstage_1.regHSIZE[0] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(229) | Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[16] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(163) | Register bit CoreAHBLite_0.matrix4x16.masterstage_0.regHSIZE[2] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(229) | Register bit CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[16] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(653) | Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[7] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(653) | Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[6] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(653) | Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[5] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(653) | Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[4] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(653) | Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[3] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(653) | Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[2] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_userif.v(653) | Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[1] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @N:BN362 : coreahblite_slavestage.v(79) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_4.masterDataInProg[3] (in view: work.PCIe_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_slavestage.v(79) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_4.masterDataInProg[2] (in view: work.PCIe_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_slavestage.v(79) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_4.masterDataInProg[1] (in view: work.PCIe_Demo(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @W:BN132 : coreahblite_masterstage.v(163) | Removing instance CoreAHBLite_0.matrix4x16.masterstage_1.regHSIZE[1] because it is equivalent to instance CoreAHBLite_0.matrix4x16.masterstage_1.regHTRANS. To keep the instance, apply constraint syn_preserve=1 on the instance. Encoding state machine arbRegSMCurrentState[15:0] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_1(verilog)) original code -> new code 0000 -> 0000000000000001 0001 -> 0000000000000010 0010 -> 0000000000000100 0011 -> 0000000000001000 0100 -> 0000000000010000 0101 -> 0000000000100000 0110 -> 0000000001000000 0111 -> 0000000010000000 1000 -> 0000000100000000 1001 -> 0000001000000000 1010 -> 0000010000000000 1011 -> 0000100000000000 1100 -> 0001000000000000 1101 -> 0010000000000000 1110 -> 0100000000000000 1111 -> 1000000000000000 @W:MO160 : coreahblite_slavearbiter.v(449) | Register bit arbRegSMCurrentState[12] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_1(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_slavearbiter.v(449) | Register bit arbRegSMCurrentState[8] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_1(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. Encoding state machine arbRegSMCurrentState[15:0] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_2(verilog)) original code -> new code 0000 -> 0000000000000001 0001 -> 0000000000000010 0010 -> 0000000000000100 0011 -> 0000000000001000 0100 -> 0000000000010000 0101 -> 0000000000100000 0110 -> 0000000001000000 0111 -> 0000000010000000 1000 -> 0000000100000000 1001 -> 0000001000000000 1010 -> 0000010000000000 1011 -> 0000100000000000 1100 -> 0001000000000000 1101 -> 0010000000000000 1110 -> 0100000000000000 1111 -> 1000000000000000 @W:MO160 : coreahblite_slavearbiter.v(449) | Register bit arbRegSMCurrentState[12] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_2(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_slavearbiter.v(449) | Register bit arbRegSMCurrentState[8] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_2(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_slavearbiter.v(449) | Register bit arbRegSMCurrentState[4] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_2(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. Encoding state machine ahbcurr_state[2:0] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 @N:MO231 : ahblsramif.v(319) | Found counter in view:COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog) instance count[4:0] @N:BN362 : ahblsramif.v(184) | Removing sequential instance HADDR_d[16] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : ahblsramif.v(184) | Removing sequential instance HADDR_d[17] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : ahblsramif.v(184) | Removing sequential instance HADDR_d[18] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : ahblsramif.v(184) | Removing sequential instance HADDR_d[19] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @W:MO160 : ahblsramif.v(310) | Register bit burst_count_reg[4] (in view view:COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : ahblsramif.v(310) | Register bit burst_count_reg[3] (in view view:COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : ahblsramif.v(310) | Register bit burst_count_reg[2] (in view view:COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : ahblsramif.v(310) | Register bit burst_count_reg[1] (in view view:COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. Encoding state machine sramcurr_state[2:0] (in view: COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_SramCtrlIf_0s_34816s_34816s_512s_128s_32s_0s_0_1_2(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[8] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[9] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[10] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[11] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[12] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[13] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[14] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[15] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[16] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[17] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[18] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[19] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[20] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[21] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[22] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[23] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[28] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[29] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[30] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(146) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3OOl[31] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[9] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[10] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[11] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[12] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[13] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[14] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[15] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[16] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[17] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[18] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[19] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[20] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[21] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[22] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[23] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[24] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[25] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[26] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[27] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[28] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[29] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[30] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(278) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3lOl[31] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[8] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[9] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[10] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[11] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[12] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[13] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[14] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[15] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[16] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[17] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[18] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[19] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[20] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[21] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[22] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[23] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[28] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[29] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[30] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahbtoapb3_apbaddrdata.v(229) | Removing sequential instance CAHBtoAPB3I0l.CAHBtoAPB3IOl[31] (in view: COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[31] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[30] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[29] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[28] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[27] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[26] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[25] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[24] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[23] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[22] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[21] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[20] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[19] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[18] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[17] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[16] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[15] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[14] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[13] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[12] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[11] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[10] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahbtoapb3_apbaddrdata.v(353) | Register bit CAHBtoAPB3I0l.HRDATA[9] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. Encoding state machine CAHBtoAPB3IOI[4:0] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3O_0s_0_1_0_1_2_3_4(verilog)) original code -> new code 000 -> 00001 001 -> 00010 010 -> 00100 011 -> 01000 100 -> 10000 @W:BN132 : coreahbtoapb3_ahbtoapbsm.v(690) | Removing sequential instance COREAHBTOAPB3_0.CAHBtoAPB3lll.PWRITE because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.CAHBtoAPB3IOI[2]. To keep the instance, apply constraint syn_preserve=1 on the instance. Encoding state machine CAHBtoAPB3lIl[2:0] (in view: COREAHBTOAPB3_LIB.CAHBtoAPB3OIl_0s_0_1_2(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 Encoding state machine resp_curr_state[30:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) original code -> new code 000000 -> 0000000000000000000000000000001 000001 -> 0000000000000000000000000000010 000011 -> 0000000000000000000000000000100 000101 -> 0000000000000000000000000001000 000110 -> 0000000000000000000000000010000 000111 -> 0000000000000000000000000100000 001000 -> 0000000000000000000000001000000 001001 -> 0000000000000000000000010000000 001100 -> 0000000000000000000000100000000 001101 -> 0000000000000000000001000000000 010000 -> 0000000000000000000010000000000 010001 -> 0000000000000000000100000000000 010010 -> 0000000000000000001000000000000 010011 -> 0000000000000000010000000000000 010100 -> 0000000000000000100000000000000 010101 -> 0000000000000001000000000000000 010110 -> 0000000000000010000000000000000 010111 -> 0000000000000100000000000000000 011000 -> 0000000000001000000000000000000 011001 -> 0000000000010000000000000000000 011011 -> 0000000000100000000000000000000 100100 -> 0000000001000000000000000000000 100101 -> 0000000010000000000000000000000 100110 -> 0000000100000000000000000000000 100111 -> 0000001000000000000000000000000 101000 -> 0000010000000000000000000000000 101001 -> 0000100000000000000000000000000 101100 -> 0001000000000000000000000000000 101110 -> 0010000000000000000000000000000 101111 -> 0100000000000000000000000000000 110000 -> 1000000000000000000000000000000 Encoding state machine asynchevent_curr_state[1:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) original code -> new code 0000 -> 0 1001 -> 1 @N:MO225 : coresysservices_cmddec.v(3426) | There are no possible illegal states for state machine asynchevent_curr_state[1:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)); safe FSM implementation is not required. Encoding state machine req_curr_state[36:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) original code -> new code 000000 -> 0000000000000000000000000000000000001 000001 -> 0000000000000000000000000000000000010 000010 -> 0000000000000000000000000000000000100 000011 -> 0000000000000000000000000000000001000 000100 -> 0000000000000000000000000000000010000 000101 -> 0000000000000000000000000000000100000 000111 -> 0000000000000000000000000000001000000 001000 -> 0000000000000000000000000000010000000 001001 -> 0000000000000000000000000000100000000 001010 -> 0000000000000000000000000001000000000 001011 -> 0000000000000000000000000010000000000 001100 -> 0000000000000000000000000100000000000 001101 -> 0000000000000000000000001000000000000 001110 -> 0000000000000000000000010000000000000 001111 -> 0000000000000000000000100000000000000 010000 -> 0000000000000000000001000000000000000 010001 -> 0000000000000000000010000000000000000 010010 -> 0000000000000000000100000000000000000 010011 -> 0000000000000000001000000000000000000 010100 -> 0000000000000000010000000000000000000 010101 -> 0000000000000000100000000000000000000 100001 -> 0000000000000001000000000000000000000 100010 -> 0000000000000010000000000000000000000 100101 -> 0000000000000100000000000000000000000 100110 -> 0000000000001000000000000000000000000 101000 -> 0000000000010000000000000000000000000 101001 -> 0000000000100000000000000000000000000 101010 -> 0000000001000000000000000000000000000 101011 -> 0000000010000000000000000000000000000 101100 -> 0000000100000000000000000000000000000 101101 -> 0000001000000000000000000000000000000 101110 -> 0000010000000000000000000000000000000 110000 -> 0000100000000000000000000000000000000 110001 -> 0001000000000000000000000000000000000 110010 -> 0010000000000000000000000000000000000 110011 -> 0100000000000000000000000000000000000 110100 -> 1000000000000000000000000000000000000 Encoding state machine main_curr_state[2:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 @N:MO231 : coresysservices_cmddec.v(2481) | Found counter in view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog) instance desc_datasel_cntr[31:0] @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[31] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[30] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[28] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[27] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[26] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[25] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[24] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[23] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[22] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[21] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[20] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[19] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[18] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[17] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[16] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[14] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[13] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[7] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[6] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[5] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[4] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[3] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[2] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[1] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1924) | Register bit memwr_data_addr_r[0] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[30] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[29] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[28] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[27] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[26] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[25] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[24] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[23] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[22] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[21] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[20] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[19] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[18] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[17] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[16] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[14] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[13] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[7] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[6] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[5] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memwr_data_r[1] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[31] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[30] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[28] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[27] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[26] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[25] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[24] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[23] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[22] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[21] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[20] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[19] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[18] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[17] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[16] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[14] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[13] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(2668) | Register bit cfdatain_d1[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[31] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[28] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[27] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[26] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[25] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[24] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[23] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[22] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[21] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[20] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[19] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[18] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[17] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[7] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[6] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[5] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[1] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1303) | Register bit cfsrc_addr_d1[0] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memrd_data_d1[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memrd_data_d1[14] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memrd_data_d1[13] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memrd_data_d1[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memrd_data_d1[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memrd_data_d1[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memrd_data_d1[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memrd_data_d1[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(997) | Register bit burstlen_memrd_data_d1[1] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[31] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[28] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[27] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[26] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[25] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[24] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[23] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[22] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[21] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[20] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[19] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[18] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[17] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[7] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[6] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[5] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[1] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coresysservices_cmddec.v(1255) | Register bit cfdst_addr_d1[0] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. Encoding state machine curr_state[6:0] (in view: CORESYSSERVICES_LIB.CoreSysServices_FSMCtrl(verilog)) original code -> new code 0000 -> 0000001 0001 -> 0000010 0010 -> 0000100 0101 -> 0001000 1000 -> 0010000 1001 -> 0100000 1011 -> 1000000 @N:BN362 : coresysservices_fsmctrl.v(612) | Removing sequential instance burstwrflag_last_n (in view: CORESYSSERVICES_LIB.CoreSysServices_FSMCtrl(verilog)) of type view:PrimLib.dffse(prim) because it does not drive other instances. @N:MO231 : coresysservices_fsmctrl.v(760) | Found counter in view:CORESYSSERVICES_LIB.CoreSysServices_FSMCtrl(verilog) instance word_count[31:0] @W:MO160 : coresysservices_fsmctrl.v(679) | Register bit cfrd_asyncevent_d1 (in view view:CORESYSSERVICES_LIB.CoreSysServices_FSMCtrl(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @N:MO231 : debounce.v(53) | Found counter in view:work.DEBOUNCE(verilog) instance q_reg[15:0] @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHSIZE[2] (in view: work.PCIe_Demo_sb(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_0.regHSIZE[2] (in view: work.PCIe_Demo_sb(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances. @W:MO160 : coreahblite_masterstage.v(163) | Register bit CoreAHBLite_0.matrix4x16.masterstage_1.regHSIZE[0] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(229) | Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[6] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(229) | Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[4] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(229) | Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[2] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(229) | Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[0] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(229) | Register bit CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[6] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(229) | Register bit CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[4] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(229) | Register bit CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[2] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_masterstage.v(229) | Register bit CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[0] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. Encoding state machine state[28:0] (in view: work.CoreConfigMaster_Z12(verilog)) original code -> new code 000000 -> 00000000000000000000000000001 000001 -> 00000000000000000000000000010 000010 -> 00000000000000000000000000100 000011 -> 00000000000000000000000001000 000100 -> 00000000000000000000000010000 000101 -> 00000000000000000000000100000 000110 -> 00000000000000000000001000000 000111 -> 00000000000000000000010000000 001001 -> 00000000000000000000100000000 001010 -> 00000000000000000001000000000 001011 -> 00000000000000000010000000000 001100 -> 00000000000000000100000000000 001101 -> 00000000000000001000000000000 001110 -> 00000000000000010000000000000 001111 -> 00000000000000100000000000000 010000 -> 00000000000001000000000000000 010001 -> 00000000000010000000000000000 010010 -> 00000000000100000000000000000 010011 -> 00000000001000000000000000000 010100 -> 00000000010000000000000000000 010101 -> 00000000100000000000000000000 010110 -> 00000001000000000000000000000 100000 -> 00000010000000000000000000000 100001 -> 00000100000000000000000000000 100010 -> 00001000000000000000000000000 100011 -> 00010000000000000000000000000 100100 -> 00100000000000000000000000000 100101 -> 01000000000000000000000000000 100110 -> 10000000000000000000000000000 @N:MO231 : coreconfigmaster.v(723) | Found counter in view:work.CoreConfigMaster_Z12(verilog) instance pause_count[4:0] @W:MO160 : coreconfigmaster.v(723) | Register bit HSIZE[2] (in view view:work.CoreConfigMaster_Z12(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @N:MF179 : coreconfigmaster.v(573) | Found 32 by 32 bit equality operator ('==') d_state152 (in view: work.CoreConfigMaster_Z12(verilog)) @N:BN362 : coreconfigmaster.v(723) | Removing sequential instance state[8] (in view: work.CoreConfigMaster_Z12(verilog)) because it does not drive other instances. Encoding state machine arbRegSMCurrentState[15:0] (in view: COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_4(verilog)) original code -> new code 0000 -> 0000000000000001 0001 -> 0000000000000010 0010 -> 0000000000000100 0011 -> 0000000000001000 0100 -> 0000000000010000 0101 -> 0000000000100000 0110 -> 0000000001000000 0111 -> 0000000010000000 1000 -> 0000000100000000 1001 -> 0000001000000000 1010 -> 0000010000000000 1011 -> 0000100000000000 1100 -> 0001000000000000 1101 -> 0010000000000000 1110 -> 0100000000000000 1111 -> 1000000000000000 @W:MO160 : coreahblite_slavearbiter.v(449) | Register bit arbRegSMCurrentState[12] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_4(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. @W:MO160 : coreahblite_slavearbiter.v(449) | Register bit arbRegSMCurrentState[8] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_4(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. Encoding state machine state[2:0] (in view: work.CoreConfigP_Z16(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 @W:MO160 : coreconfigp.v(255) | Register bit paddr[16] (in view view:work.CoreConfigP_Z16(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance. Encoding state machine sm0_state[6:0] (in view: work.CoreResetP_Z17(verilog)) original code -> new code 000 -> 0000001 001 -> 0000010 010 -> 0000100 011 -> 0001000 100 -> 0010000 101 -> 0100000 110 -> 1000000 Encoding state machine sdif0_state[3:0] (in view: work.CoreResetP_Z17(verilog)) original code -> new code 000 -> 00 001 -> 01 010 -> 10 011 -> 11 @N:MO225 : coreresetp.v(1170) | There are no possible illegal states for state machine sdif0_state[3:0] (in view: work.CoreResetP_Z17(verilog)); safe FSM implementation is not required. @N:MO231 : coreresetp.v(1485) | Found counter in view:work.CoreResetP_Z17(verilog) instance count_sdif0[12:0] Encoding state machine state[3:0] (in view: work.coreresetp_pcie_hotreset(verilog)) original code -> new code 00 -> 00 01 -> 01 10 -> 10 11 -> 11 @N:MO225 : coreresetp_pcie_hotreset.v(179) | There are no possible illegal states for state machine state[3:0] (in view: work.coreresetp_pcie_hotreset(verilog)); safe FSM implementation is not required. @N:MO231 : coreresetp_pcie_hotreset.v(227) | Found counter in view:work.coreresetp_pcie_hotreset(verilog) instance count[6:0] Encoding state machine ahb_state[5:0] (in view: work.Serial_Num_0s_1s_2s_3s_4294967292s_4294967293s(verilog)) original code -> new code 000 -> 000001 001 -> 000010 010 -> 000100 011 -> 001000 100 -> 010000 101 -> 100000 @W:FX107 : serial_num.v(66) | RAM serial_number[31:0] (in view: work.Serial_Num_0s_1s_2s_3s_4294967292s_4294967293s(verilog)) does not have a read/write conflict check. Possible simulation mismatch. To resolve a read/write conflict, either set syn_ramstyle = rw_check, or enable the "Read Write Check on RAM" Implementation Option. For more information, search for "read/write conflict check" in Online Help. Starting factoring (Real Time elapsed 0h:00m:05s; CPU Time elapsed 0h:00m:05s; Memory used current: 169MB peak: 202MB) @N:BN362 : coreahblite_slavestage.v(79) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_16.masterDataInProg[3] (in view: work.PCIe_Demo_sb(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_slavestage.v(79) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_16.masterDataInProg[2] (in view: work.PCIe_Demo_sb(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[20] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[21] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[22] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[23] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[24] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[25] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[26] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[27] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_slavestage.v(79) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_2.masterDataInProg[3] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_slavestage.v(79) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_2.masterDataInProg[2] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : ahblsramif.v(184) | Removing sequential instance COREAHBLSRAM_0.U_PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf.HSIZE_d[2] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_fsmctrl.v(780) | Removing sequential instance CORESYSSERVICES_0.U_fsm_ctrl.fmhaddr_o[0] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[23] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[22] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[21] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[20] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[18] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[17] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[18] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[17] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[16] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[16] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[19] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[19] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[18] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[17] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[16] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[19] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. Finished factoring (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:06s; Memory used current: 191MB peak: 202MB) @N:BN362 : coreahblite_slavearbiter.v(449) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_4.slave_arbiter.arbRegSMCurrentState[2] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_slavearbiter.v(449) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_4.slave_arbiter.arbRegSMCurrentState[3] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_slavearbiter.v(449) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_4.slave_arbiter.arbRegSMCurrentState[6] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_slavearbiter.v(449) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_4.slave_arbiter.arbRegSMCurrentState[7] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_slavearbiter.v(449) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_4.slave_arbiter.arbRegSMCurrentState[10] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_slavearbiter.v(449) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_4.slave_arbiter.arbRegSMCurrentState[11] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2668) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.cfdatain_d1[5] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2668) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.cfdatain_d1[6] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(997) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.burstlen_memrd_data_d1[5] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(3004) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.resp_curr_state[13] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(3004) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.resp_curr_state[14] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(3004) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.resp_curr_state[15] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_slavearbiter.v(449) | Removing sequential instance PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[6] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_slavearbiter.v(449) | Removing sequential instance PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[7] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[0] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. Finished gated-clock and generated-clock conversion (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:06s; Memory used current: 185MB peak: 202MB) Finished generic timing optimizations - Pass 1 (Real Time elapsed 0h:00m:08s; CPU Time elapsed 0h:00m:07s; Memory used current: 175MB peak: 202MB) @N:BN362 : coreahblite_slavearbiter.v(449) | Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_4.slave_arbiter.arbRegSMCurrentState[5] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(1096) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.cfburst_len_wr_d1[10] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. Starting Early Timing Optimization (Real Time elapsed 0h:00m:08s; CPU Time elapsed 0h:00m:08s; Memory used current: 176MB peak: 202MB) Finished Early Timing Optimization (Real Time elapsed 0h:00m:09s; CPU Time elapsed 0h:00m:08s; Memory used current: 176MB peak: 202MB) Finished generic timing optimizations - Pass 2 (Real Time elapsed 0h:00m:09s; CPU Time elapsed 0h:00m:08s; Memory used current: 175MB peak: 202MB) @W:FA239 : coresysservices_cmddec.v(1466) | ROM CORESYSSERVICES_0.U_CmdDec.memrd_data_addr_cnst[3:0] (in view: work.PCIe_Demo(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. @W:FA239 : coresysservices_cmddec.v(1466) | ROM CORESYSSERVICES_0.U_CmdDec.memrd_data_addr_cnst[3:0] (in view: work.PCIe_Demo(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance. @N:MO106 : coresysservices_cmddec.v(1466) | Found ROM .delname. (in view: work.PCIe_Demo(verilog)) with 10 words by 4 bits. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[0] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR[1] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR_int[0] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HADDR_int[1] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[0] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coreahblite_masterstage.v(163) | Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_1.regHADDR[1] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. Finished preparing to map (Real Time elapsed 0h:00m:10s; CPU Time elapsed 0h:00m:09s; Memory used current: 176MB peak: 202MB) Finished technology mapping (Real Time elapsed 0h:00m:11s; CPU Time elapsed 0h:00m:10s; Memory used current: 222MB peak: 226MB) Pass CPU time Worst Slack Luts / Registers ------------------------------------------------------------ 1 0h:00m:10s 3.74ns 2920 / 1421 @N:BN362 : coresysservices_cmddec.v(997) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.burstlen_memwr_data_r[0] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(997) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.burstlen_memwr_data_r[2] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(997) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.burstlen_memwr_data_r[3] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(997) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.burstlen_memwr_data_r[4] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(1924) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.memwr_data_addr_r[29] (in view: work.PCIe_Demo(verilog)) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[20] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[21] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[22] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[23] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[24] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[25] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[26] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[27] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[28] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[29] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[30] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[31] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[5] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[6] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[7] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[8] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[9] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[10] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[11] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[12] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[13] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[14] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[15] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[16] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[17] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[18] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[19] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[0] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[1] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[2] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[3] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : serial_num.v(66) | Removing sequential instance Serial_Num_0.HWDATA[4] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[0] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[1] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[2] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[3] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[4] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[5] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[6] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[7] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[8] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[9] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[10] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[11] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[12] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[13] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[14] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[15] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[16] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[17] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[18] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[19] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[20] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[21] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[22] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[23] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[24] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[25] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[26] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[27] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[28] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[29] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[30] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:BN362 : coresysservices_cmddec.v(2481) | Removing sequential instance CORESYSSERVICES_0.U_CmdDec.desc_datasel_cntr[31] (in view: work.PCIe_Demo(verilog)) of type view:ACG4.SLE(PRIM) because it does not drive other instances. @N:FP130 : | Promoting Net PCIe_Demo_sb_0_HPMS_READY on CLKINT I_892 @N:FP130 : | Promoting Net PCIe_Demo_sb_0_INIT_APB_S_PRESET_N on CLKINT I_893 @N:FP130 : | Promoting Net PCIe_Demo_sb_0_INIT_APB_S_PCLK on CLKINT I_894 @N:FP130 : | Promoting Net PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.reset_n_clk_ltssm on CLKINT I_895 @N:FP130 : | Promoting Net PCIe_Demo_sb_0.CORERESETP_0.sm0_areset_n_clk_base on CLKINT I_896 @N:FP130 : | Promoting Net PCIe_Demo_sb_0.CORERESETP_0.sdif0_areset_n_rcosc on CLKINT I_897 Added 0 Buffers Added 0 Cells via replication Added 0 Sequential Cells via replication Added 0 Combinational Cells via replication Finished technology timing optimizations and critical path resynthesis (Real Time elapsed 0h:00m:11s; CPU Time elapsed 0h:00m:11s; Memory used current: 223MB peak: 226MB) Finished restoring hierarchy (Real Time elapsed 0h:00m:12s; CPU Time elapsed 0h:00m:11s; Memory used current: 225MB peak: 226MB) @S |Clock Optimization Summary #### START OF CLOCK OPTIMIZATION REPORT #####[ Clock optimization not enabled 2 non-gated/non-generated clock tree(s) driving 133 clock pin(s) of sequential element(s) 2 gated/generated clock tree(s) driving 1260 clock pin(s) of sequential element(s) 0 instances converted, 1260 sequential instances remain driven by gated/generated clocks =================================================================== Non-Gated/Non-Generated Clocks ==================================================================== Clock Tree ID Driving Element Drive Element Type Fanout Sample Instance ----------------------------------------------------------------------------------------------------------------------------------------------------------------------- ClockId0003 PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST clock definition on MSS_010 109 PCIe_Demo_sb_0.CORECONFIGP_0.SDIF_RELEASED_q2 ClockId0004 PCIe_Demo_sb_0.FABOSC_0.I_RCOSC_25_50MHZ clock definition on RCOSC_25_50MHZ 24 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[12] ======================================================================================================================================================================= ========================================================================================== Gated/Generated Clocks ========================================================================================== Clock Tree ID Driving Element Drive Element Type Fanout Sample Instance Explanation ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ ClockId0001 PCIe_Demo_sb_0.CCC_0.CCC_INST CCC 1225 PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST No gated clock conversion method for cell cell:work.MSS_010 ClockId0002 PCIe_Demo_sb_0.CCC_0.CCC_INST CCC 35 PCIe_Demo_sb_0.CORERESETP_0.genblk2.sdif0_phr.count[6] No gated clock conversion method for cell cell:ACG4.SLE ============================================================================================================================================================================================================ ##### END OF CLOCK OPTIMIZATION REPORT ######] Start Writing Netlists (Real Time elapsed 0h:00m:12s; CPU Time elapsed 0h:00m:11s; Memory used current: 180MB peak: 226MB) Writing Analyst data base C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\synthesis\synwork\PCIe_Demo_m.srm Finished Writing Netlist Databases (Real Time elapsed 0h:00m:13s; CPU Time elapsed 0h:00m:12s; Memory used current: 214MB peak: 226MB) Writing EDIF Netlist and constraint files @N:FX1056 : | Writing EDF file: C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\synthesis\PCIe_Demo.edn @N:BW103 : | The default time unit for the Synopsys Constraint File (SDC or FDC) is 1ns. @N:BW107 : | Synopsys Constraint File capacitance units using default value of 1pF L-2016.09M-2 Finished Writing EDIF Netlist and constraint files (Real Time elapsed 0h:00m:13s; CPU Time elapsed 0h:00m:12s; Memory used current: 215MB peak: 226MB) Start final timing analysis (Real Time elapsed 0h:00m:14s; CPU Time elapsed 0h:00m:13s; Memory used current: 212MB peak: 226MB) @W:MT246 : pcie_demo_sb_ccc_0_fccc.v(23) | Blackbox CCC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) @N:MT615 : | Found clock CLK0 with period 10.00ns @N:MT615 : | Found clock PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB with period 40.00ns @N:MT615 : | Found clock PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT with period 20.00ns @N:MT615 : | Found clock PCIe_Demo_sb_0/CCC_0/GL0 with period 20.00ns @N:MT615 : | Found clock PCIe_Demo_sb_0/CCC_0/GL3 with period 8.00ns ##### START OF TIMING REPORT #####[ # Timing Report written on Tue Aug 29 15:42:19 2017 # Top view: PCIe_Demo Requested Frequency: 25.0 MHz Wire load mode: top Paths requested: 5 Constraint File(s): C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo\designer\PCIe_Demo\synthesis.fdc @N:MT320 : | This timing report is an estimate of place and route data. For final timing results, use the FPGA vendor place and route report. @N:MT322 : | Clock constraints include only register-to-register paths associated with each individual clock. Performance Summary ******************* Worst slack in design: 5.204 Requested Estimated Requested Estimated Clock Clock Starting Clock Frequency Frequency Period Period Slack Type Group ------------------------------------------------------------------------------------------------------------------------------------------------------------------- CLK0 100.0 MHz NA 10.000 NA NA declared default_clkgroup PCIe_Demo_sb_0/CCC_0/GL0 50.0 MHz 78.4 MHz 20.000 12.760 7.240 generated (from CLK0) default_clkgroup PCIe_Demo_sb_0/CCC_0/GL3 125.0 MHz 357.7 MHz 8.000 2.796 5.204 generated (from CLK0) default_clkgroup PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT 50.0 MHz 431.2 MHz 20.000 2.319 17.681 declared default_clkgroup PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB 25.0 MHz 100.3 MHz 40.000 9.969 15.015 declared default_clkgroup =================================================================================================================================================================== @N:MT582 : | Estimated period and frequency not reported for given clock unless the clock has at least one timing path which is not a false or a max delay path and that does not have excessive slack Clock Relationships ******************* Clocks | rise to rise | fall to fall | rise to fall | fall to rise ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Starting Ending | constraint slack | constraint slack | constraint slack | constraint slack ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT | 20.000 17.681 | No paths - | No paths - | No paths - PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT PCIe_Demo_sb_0/CCC_0/GL0 | 20.000 False | No paths - | No paths - | No paths - PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB | 40.000 32.655 | No paths - | 20.000 17.995 | 20.000 15.015 PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB PCIe_Demo_sb_0/CCC_0/GL0 | 20.000 False | No paths - | No paths - | No paths - PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB PCIe_Demo_sb_0/CCC_0/GL3 | 8.000 False | No paths - | No paths - | 4.000 False PCIe_Demo_sb_0/CCC_0/GL0 PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT | 20.000 False | No paths - | No paths - | No paths - PCIe_Demo_sb_0/CCC_0/GL0 PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB | 20.000 False | No paths - | No paths - | No paths - PCIe_Demo_sb_0/CCC_0/GL0 PCIe_Demo_sb_0/CCC_0/GL0 | 20.000 7.240 | No paths - | No paths - | No paths - PCIe_Demo_sb_0/CCC_0/GL3 PCIe_Demo_sb_0/CCC_0/GL3 | 8.000 5.204 | No paths - | No paths - | No paths - =============================================================================================================================================================================================== Note: 'No paths' indicates there are no paths in the design for that pair of clock edges. 'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups. Interface Information ********************* No IO constraint found ==================================== Detailed Report for Clock: PCIe_Demo_sb_0/CCC_0/GL0 ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST PCIe_Demo_sb_0/CCC_0/GL0 MSS_010 F_FM0_READYOUT CoreAHBLite_0_AHBmslave16_HREADY 3.086 7.240 SERDES_IF_0.SERDESIF_INST PCIe_Demo_sb_0/CCC_0/GL0 SERDESIF_0 M_AWADDR_HADDR[31] SERDES_IF_0_AHB_MASTER_HADDR[31] 3.260 7.702 SERDES_IF_0.SERDESIF_INST PCIe_Demo_sb_0/CCC_0/GL0 SERDESIF_0 M_AWBURST_HTRANS[1] SERDES_IF_0_AHB_MASTER_HTRANS[1] 3.748 7.840 SERDES_IF_0.SERDESIF_INST PCIe_Demo_sb_0/CCC_0/GL0 SERDESIF_0 M_AWADDR_HADDR[29] SERDES_IF_0_AHB_MASTER_HADDR[29] 3.411 8.095 SERDES_IF_0.SERDESIF_INST PCIe_Demo_sb_0/CCC_0/GL0 SERDESIF_0 M_AWADDR_HADDR[28] SERDES_IF_0_AHB_MASTER_HADDR[28] 3.538 8.133 PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST PCIe_Demo_sb_0/CCC_0/GL0 MSS_010 F_FM0_RESP CoreAHBLite_0_AHBmslave16_HRESP 3.189 8.134 SERDES_IF_0.SERDESIF_INST PCIe_Demo_sb_0/CCC_0/GL0 SERDESIF_0 M_AWADDR_HADDR[30] SERDES_IF_0_AHB_MASTER_HADDR[30] 3.245 8.319 PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[1] PCIe_Demo_sb_0/CCC_0/GL0 SLE Q SDATASELInt[1] 0.076 9.166 PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[3] PCIe_Demo_sb_0/CCC_0/GL0 SLE Q SDATASELInt[3] 0.076 9.206 PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[13] PCIe_Demo_sb_0/CCC_0/GL0 SLE Q SDATASELInt[13] 0.076 9.254 ==================================================================================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST PCIe_Demo_sb_0/CCC_0/GL0 MSS_010 F_FM0_WDATA[0] CoreAHBLite_0_AHBmslave16_HWDATA[0] 19.888 7.240 COREAHBLSRAM_0.U_PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf.ahbcurr_state[1] PCIe_Demo_sb_0/CCC_0/GL0 SLE D ahbcurr_state_ns[1] 19.778 7.702 PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST PCIe_Demo_sb_0/CCC_0/GL0 MSS_010 F_FM0_WDATA[29] CoreAHBLite_0_AHBmslave16_HWDATA[29] 19.902 7.969 PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST PCIe_Demo_sb_0/CCC_0/GL0 MSS_010 F_FM0_WDATA[7] CoreAHBLite_0_AHBmslave16_HWDATA[7] 19.893 7.998 PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST PCIe_Demo_sb_0/CCC_0/GL0 MSS_010 F_FM0_WDATA[1] CoreAHBLite_0_AHBmslave16_HWDATA[1] 19.926 8.107 PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST PCIe_Demo_sb_0/CCC_0/GL0 MSS_010 F_FM0_WDATA[3] CoreAHBLite_0_AHBmslave16_HWDATA[3] 19.918 8.111 PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST PCIe_Demo_sb_0/CCC_0/GL0 MSS_010 F_FM0_WDATA[4] CoreAHBLite_0_AHBmslave16_HWDATA[4] 19.953 8.134 CORESYSSERVICES_0.U_CmdDec.cfdatain_d1[0] PCIe_Demo_sb_0/CCC_0/GL0 SLE D CORESYSSERVICES_0_AHBL_MASTER_HWDATA[0] 19.778 8.244 COREAHBLSRAM_0.U_PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf.ahbcurr_state[0] PCIe_Demo_sb_0/CCC_0/GL0 SLE D N_63_i 19.778 8.362 COREAHBLSRAM_0.U_PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf.burst_count_reg[0] PCIe_Demo_sb_0/CCC_0/GL0 SLE EN N_1714_i 19.706 8.576 ======================================================================================================================================================================================================= Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 20.000 - Setup time: 0.112 + Clock delay at ending point: 0.000 (ideal) = Required time: 19.888 - Propagation time: 12.648 - Clock delay at starting point: 0.000 (ideal) = Slack (non-critical) : 7.240 Number of logic level(s): 10 Starting point: PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST / F_FM0_READYOUT Ending point: PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST / F_FM0_WDATA[0] The start point is clocked by PCIe_Demo_sb_0/CCC_0/GL0 [rising] on pin CLK_BASE The end point is clocked by PCIe_Demo_sb_0/CCC_0/GL0 [rising] on pin CLK_BASE Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ---------------------------------------------------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST MSS_010 F_FM0_READYOUT Out 3.086 3.086 - CoreAHBLite_0_AHBmslave16_HREADY Net - - 0.995 - 23 PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt_RNIUBLM[16] CFG3 C In - 4.081 - PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt_RNIUBLM[16] CFG3 Y Out 0.194 4.274 - HREADY_M_iv_i_i_o2_0_a2_0 Net - - 0.548 - 2 PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt_RNIBNPM1[16] CFG3 B In - 4.822 - PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt_RNIBNPM1[16] CFG3 Y Out 0.125 4.947 - N_1202_i Net - - 0.956 - 18 CORESYSSERVICES_0.U_fsm_ctrl.pop_0_o2_i_a2 CFG3 C In - 5.903 - CORESYSSERVICES_0.U_fsm_ctrl.pop_0_o2_i_a2 CFG3 Y Out 0.182 6.085 - pop_0_o2_i_a2 Net - - 0.713 - 6 CORESYSSERVICES_0.U_CmdDec.cfdatain_o28_0_a2 CFG4 D In - 6.798 - CORESYSSERVICES_0.U_CmdDec.cfdatain_o28_0_a2 CFG4 Y Out 0.250 7.048 - cfdatain_o28 Net - - 0.483 - 1 CORESYSSERVICES_0.U_CmdDec.un1_cfdatain_o26 CFG4 D In - 7.531 - CORESYSSERVICES_0.U_CmdDec.un1_cfdatain_o26 CFG4 Y Out 0.250 7.782 - N_2449 Net - - 0.670 - 6 CORESYSSERVICES_0.U_CmdDec.un1_cfdatain_o26_RNIU2VE2 CFG4 D In - 8.451 - CORESYSSERVICES_0.U_CmdDec.un1_cfdatain_o26_RNIU2VE2 CFG4 Y Out 0.276 8.727 - un2_cudata_wrdy_int_9_i_0 Net - - 0.648 - 5 CORESYSSERVICES_0.U_CmdDec.cfdatain_o_iv_0_a2_5[29] CFG2 A In - 9.375 - CORESYSSERVICES_0.U_CmdDec.cfdatain_o_iv_0_a2_5[29] CFG2 Y Out 0.067 9.442 - N_175 Net - - 0.648 - 5 CORESYSSERVICES_0.U_CmdDec.cfdatain_o_0_iv_0_1[0] CFG4 D In - 10.090 - CORESYSSERVICES_0.U_CmdDec.cfdatain_o_0_iv_0_1[0] CFG4 Y Out 0.284 10.374 - cfdatain_o_0_iv_0_1[0] Net - - 0.483 - 1 CORESYSSERVICES_0.U_CmdDec.cfdatain_o_0_iv_0[0] CFG4 B In - 10.857 - CORESYSSERVICES_0.U_CmdDec.cfdatain_o_0_iv_0[0] CFG4 Y Out 0.129 10.986 - CORESYSSERVICES_0_AHBL_MASTER_HWDATA[0] Net - - 0.548 - 2 PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.slavestage_16.HWDATA_0_0[0] CFG4 B In - 11.534 - PCIe_Demo_sb_0.CoreAHBLite_0.matrix4x16.slavestage_16.HWDATA_0_0[0] CFG4 Y Out 0.143 11.677 - CoreAHBLite_0_AHBmslave16_HWDATA[0] Net - - 0.971 - 1 PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST MSS_010 F_FM0_WDATA[0] In - 12.648 - ========================================================================================================================================================== Total path delay (propagation time + setup) of 12.760 is 5.098(40.0%) logic and 7.662(60.0%) route. Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value ==================================== Detailed Report for Clock: PCIe_Demo_sb_0/CCC_0/GL3 ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock -------------------------------------------------------------------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.state[0] PCIe_Demo_sb_0/CCC_0/GL3 SLE Q state[0] 0.094 5.204 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count[0] PCIe_Demo_sb_0/CCC_0/GL3 SLE Q count[0] 0.094 5.277 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count[5] PCIe_Demo_sb_0/CCC_0/GL3 SLE Q count[5] 0.094 5.344 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count[1] PCIe_Demo_sb_0/CCC_0/GL3 SLE Q count[1] 0.094 5.345 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.LTSSM_DetectQuiet_entry_p PCIe_Demo_sb_0/CCC_0/GL3 SLE Q LTSSM_DetectQuiet_entry_p 0.094 5.400 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count[6] PCIe_Demo_sb_0/CCC_0/GL3 SLE Q count[6] 0.094 5.412 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count[2] PCIe_Demo_sb_0/CCC_0/GL3 SLE Q count[2] 0.076 5.420 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.ltssm_q2[1] PCIe_Demo_sb_0/CCC_0/GL3 SLE Q ltssm_q2[1] 0.094 5.456 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count[3] PCIe_Demo_sb_0/CCC_0/GL3 SLE Q count[3] 0.076 5.458 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.ltssm_q2[0] PCIe_Demo_sb_0/CCC_0/GL3 SLE Q ltssm_q2[0] 0.094 5.498 ========================================================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.state[0] PCIe_Demo_sb_0/CCC_0/GL3 SLE D state_RNO[0] 7.778 5.204 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.state[1] PCIe_Demo_sb_0/CCC_0/GL3 SLE D state_RNO[1] 7.778 5.311 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.LTSSM_DetectQuiet PCIe_Demo_sb_0/CCC_0/GL3 SLE D LTSSM_DetectQuiet_3 7.778 5.456 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.LTSSM_Disabled PCIe_Demo_sb_0/CCC_0/GL3 SLE D LTSSM_Disabled_3 7.778 5.456 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.LTSSM_HotReset PCIe_Demo_sb_0/CCC_0/GL3 SLE D LTSSM_HotReset_3 7.778 5.456 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count[6] PCIe_Demo_sb_0/CCC_0/GL3 SLE D count_s[6] 7.778 5.533 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count[5] PCIe_Demo_sb_0/CCC_0/GL3 SLE D count_s[5] 7.778 5.547 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count[0] PCIe_Demo_sb_0/CCC_0/GL3 SLE D count_s[0] 7.778 5.558 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count[1] PCIe_Demo_sb_0/CCC_0/GL3 SLE D count_s[1] 7.778 5.558 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count[2] PCIe_Demo_sb_0/CCC_0/GL3 SLE D count_s[2] 7.778 5.558 ============================================================================================================================================================= Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 8.000 - Setup time: 0.222 + Clock delay at ending point: 0.000 (ideal) = Required time: 7.778 - Propagation time: 2.574 - Clock delay at starting point: 0.000 (ideal) = Slack (critical) : 5.204 Number of logic level(s): 3 Starting point: PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.state[0] / Q Ending point: PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.state[0] / D The start point is clocked by PCIe_Demo_sb_0/CCC_0/GL3 [rising] on pin CLK The end point is clocked by PCIe_Demo_sb_0/CCC_0/GL3 [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ------------------------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.state[0] SLE Q Out 0.094 0.094 - state[0] Net - - 0.833 - 11 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count_RNI7C4L1[4] CFG4 B In - 0.927 - PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count_RNI7C4L1[4] CFG4 Y Out 0.143 1.070 - m6_5 Net - - 0.548 - 2 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count_RNIDQTE3[0] CFG2 A In - 1.618 - PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.count_RNIDQTE3[0] CFG2 Y Out 0.076 1.694 - N_16_mux Net - - 0.548 - 2 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.state_RNO[0] CFG3 C In - 2.242 - PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.state_RNO[0] CFG3 Y Out 0.194 2.436 - state_RNO[0] Net - - 0.138 - 1 PCIe_Demo_sb_0.CORERESETP_0.genblk2\.sdif0_phr.state[0] SLE D In - 2.574 - =============================================================================================================================== Total path delay (propagation time + setup) of 2.796 is 0.729(26.1%) logic and 2.067(73.9%) route. Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value ==================================== Detailed Report for Clock: PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock --------------------------------------------------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[0] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE Q count_sdif0[0] 0.094 17.681 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[1] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE Q count_sdif0[1] 0.094 17.746 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[2] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE Q count_sdif0[2] 0.094 17.760 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[3] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE Q count_sdif0[3] 0.094 17.774 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[4] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE Q count_sdif0[4] 0.094 17.789 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[5] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE Q count_sdif0[5] 0.094 17.803 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[6] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE Q count_sdif0[6] 0.094 17.817 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[7] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE Q count_sdif0[7] 0.094 17.831 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[8] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE Q count_sdif0[8] 0.094 17.845 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[9] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE Q count_sdif0[9] 0.094 17.858 ========================================================================================================================================================= Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock -------------------------------------------------------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[12] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE D count_sdif0_s[12] 19.778 17.681 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[11] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE D count_sdif0_s[11] 19.778 17.695 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[10] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE D count_sdif0_s[10] 19.778 17.709 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[9] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE D count_sdif0_s[9] 19.778 17.724 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[8] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE D count_sdif0_s[8] 19.778 17.738 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[7] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE D count_sdif0_s[7] 19.778 17.752 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[6] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE D count_sdif0_s[6] 19.778 17.766 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[5] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE D count_sdif0_s[5] 19.778 17.780 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[4] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE D count_sdif0_s[4] 19.778 17.794 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[3] PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT SLE D count_sdif0_s[3] 19.778 17.809 ============================================================================================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 20.000 - Setup time: 0.222 + Clock delay at ending point: 0.000 (ideal) = Required time: 19.778 - Propagation time: 2.097 - Clock delay at starting point: 0.000 (ideal) = Slack (non-critical) : 17.681 Number of logic level(s): 13 Starting point: PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[0] / Q Ending point: PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[12] / D The start point is clocked by PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT [rising] on pin CLK The end point is clocked by PCIe_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) -------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[0] SLE Q Out 0.094 0.094 - count_sdif0[0] Net - - 0.637 - 3 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_s_887 ARI1 B In - 0.732 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_s_887 ARI1 FCO Out 0.174 0.906 - count_sdif0_s_887_FCO Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[1] ARI1 FCI In - 0.906 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[1] ARI1 FCO Out 0.014 0.920 - count_sdif0_cry[1] Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[2] ARI1 FCI In - 0.920 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[2] ARI1 FCO Out 0.014 0.935 - count_sdif0_cry[2] Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[3] ARI1 FCI In - 0.935 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[3] ARI1 FCO Out 0.014 0.949 - count_sdif0_cry[3] Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[4] ARI1 FCI In - 0.949 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[4] ARI1 FCO Out 0.014 0.963 - count_sdif0_cry[4] Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[5] ARI1 FCI In - 0.963 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[5] ARI1 FCO Out 0.014 0.977 - count_sdif0_cry[5] Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[6] ARI1 FCI In - 0.977 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[6] ARI1 FCO Out 0.014 0.991 - count_sdif0_cry[6] Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[7] ARI1 FCI In - 0.991 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[7] ARI1 FCO Out 0.014 1.006 - count_sdif0_cry[7] Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[8] ARI1 FCI In - 1.006 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[8] ARI1 FCO Out 0.014 1.020 - count_sdif0_cry[8] Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[9] ARI1 FCI In - 1.020 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[9] ARI1 FCO Out 0.014 1.034 - count_sdif0_cry[9] Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[10] ARI1 FCI In - 1.034 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[10] ARI1 FCO Out 0.014 1.048 - count_sdif0_cry[10] Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[11] ARI1 FCI In - 1.048 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_cry[11] ARI1 FCO Out 0.014 1.062 - count_sdif0_cry[11] Net - - 0.000 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_s[12] ARI1 FCI In - 1.062 - PCIe_Demo_sb_0.CORERESETP_0.count_sdif0_s[12] ARI1 S Out 0.063 1.126 - count_sdif0_s[12] Net - - 0.971 - 1 PCIe_Demo_sb_0.CORERESETP_0.count_sdif0[12] SLE D In - 2.097 - ============================================================================================================== Total path delay (propagation time + setup) of 2.319 is 0.710(30.6%) logic and 1.609(69.4%) route. Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value ==================================== Detailed Report for Clock: PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.CORECONFIGP_0.psel PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE Q psel 0.094 15.015 PCIe_Demo_sb_0.CORECONFIGP_0.state[1] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE Q state[1] 0.076 17.995 PCIe_Demo_sb_0.CORECONFIGP_0.SDIF0_PENABLE PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE Q PCIe_Demo_sb_0_SDIF0_INIT_APB_PENABLE 0.094 18.358 PCIe_Demo_sb_0.CORECONFIGP_0.paddr[14] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE Q PCIe_Demo_sb_0_SDIF0_INIT_APB_PADDR[14] 0.094 18.715 PCIe_Demo_sb_0.CORECONFIGP_0.paddr[15] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE Q PCIe_Demo_sb_0_SDIF0_INIT_APB_PADDR[15] 0.076 18.762 PCIe_Demo_sb_0.CORECONFIGP_0.state[0] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE Q state[0] 0.076 18.784 SERDES_IF_0.SERDESIF_INST PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SERDESIF_0 APB_PRDATA[0] PCIe_Demo_sb_0_SDIF0_INIT_APB_PRDATA[0] 5.118 32.655 SERDES_IF_0.SERDESIF_INST PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SERDESIF_0 APB_PRDATA[1] PCIe_Demo_sb_0_SDIF0_INIT_APB_PRDATA[1] 5.053 32.720 SERDES_IF_0.SERDESIF_INST PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SERDESIF_0 APB_PRDATA[7] PCIe_Demo_sb_0_SDIF0_INIT_APB_PRDATA[7] 5.613 32.820 SERDES_IF_0.SERDESIF_INST PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SERDESIF_0 APB_PRDATA[4] PCIe_Demo_sb_0_SDIF0_INIT_APB_PRDATA[4] 5.198 33.235 ==================================================================================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ----------------------------------------------------------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[0] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE D prdata[0] 19.778 15.015 PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[1] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE D prdata[1] 19.778 15.015 PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[16] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE D prdata[16] 19.778 15.015 PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[2] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE D prdata[2] 19.778 15.659 PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[3] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE D prdata[3] 19.778 15.659 PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[4] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE D prdata[4] 19.778 15.659 PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[5] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE D prdata[5] 19.778 15.659 PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[6] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE D prdata[6] 19.778 15.659 PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[7] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE D prdata[7] 19.778 15.659 PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[8] PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB SLE D prdata[8] 19.778 15.659 ================================================================================================================================================================= Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 20.000 - Setup time: 0.222 + Clock delay at ending point: 0.000 (ideal) = Required time: 19.778 - Propagation time: 4.763 - Clock delay at starting point: 0.000 (ideal) = Slack (non-critical) : 15.015 Number of logic level(s): 5 Starting point: PCIe_Demo_sb_0.CORECONFIGP_0.psel / Q Ending point: PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[0] / D The start point is clocked by PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB [falling] on pin CLK The end point is clocked by PCIe_Demo_sb_0/PCIe_Demo_sb_HPMS_0/CLK_CONFIG_APB [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ----------------------------------------------------------------------------------------------------------------- PCIe_Demo_sb_0.CORECONFIGP_0.psel SLE Q Out 0.094 0.094 - psel Net - - 0.708 - 5 PCIe_Demo_sb_0.CORECONFIGP_0.R_SDIF0_PSEL_1 CFG3 B In - 0.802 - PCIe_Demo_sb_0.CORECONFIGP_0.R_SDIF0_PSEL_1 CFG3 Y Out 0.143 0.945 - PCIe_Demo_sb_0_SDIF0_INIT_APB_PSELx Net - - 1.069 - 37 PCIe_Demo_sb_0.CORECONFIGP_0.un1_R_SDIF3_PSEL_1 CFG4 B In - 2.014 - PCIe_Demo_sb_0.CORECONFIGP_0.un1_R_SDIF3_PSEL_1 CFG4 Y Out 0.129 2.143 - un1_R_SDIF3_PSEL_1 Net - - 0.648 - 5 PCIe_Demo_sb_0.CORECONFIGP_0.int_prdata_4_sqmuxa CFG4 D In - 2.791 - PCIe_Demo_sb_0.CORECONFIGP_0.int_prdata_4_sqmuxa CFG4 Y Out 0.236 3.027 - int_prdata_4_sqmuxa Net - - 0.812 - 17 PCIe_Demo_sb_0.CORECONFIGP_0.prdata_0_iv_1[0] CFG3 A In - 3.838 - PCIe_Demo_sb_0.CORECONFIGP_0.prdata_0_iv_1[0] CFG3 Y Out 0.067 3.906 - prdata_0_iv_1[0] Net - - 0.483 - 1 PCIe_Demo_sb_0.CORECONFIGP_0.prdata_0_iv[0] CFG4 D In - 4.389 - PCIe_Demo_sb_0.CORECONFIGP_0.prdata_0_iv[0] CFG4 Y Out 0.236 4.625 - prdata[0] Net - - 0.138 - 1 PCIe_Demo_sb_0.CORECONFIGP_0.FIC_2_APB_M_PRDATA[0] SLE D In - 4.763 - ================================================================================================================= Total path delay (propagation time + setup) of 4.985 is 1.127(22.6%) logic and 3.857(77.4%) route. Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value ##### END OF TIMING REPORT #####] Timing exceptions that could not be applied @W:MT447 : synthesis.fdc(14) | Timing constraint (from [get_cells { PCIe_Demo_sb_0.CORERESETP_0.MSS_HPMS_READY_int }] to [get_cells { PCIe_Demo_sb_0.CORERESETP_0.sm0_areset_n_rcosc PCIe_Demo_sb_0.CORERESETP_0.sm0_areset_n_rcosc_q1 }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design @W:MT447 : synthesis.fdc(15) | Timing constraint (from [get_cells { PCIe_Demo_sb_0.CORERESETP_0.MSS_HPMS_READY_int PCIe_Demo_sb_0.CORERESETP_0.SDIF*_PERST_N_re }] to [get_cells { PCIe_Demo_sb_0.CORERESETP_0.sdif*_areset_n_rcosc* }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design @W:MT447 : synthesis.fdc(16) | Timing constraint (through [get_nets { PCIe_Demo_sb_0.CORERESETP_0.*sdif*_phr.hot_reset_n PCIe_Demo_sb_0.CORERESETP_0.*sdif*_phr.sdif_core_reset_n_0 }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design @W:MT447 : synthesis.fdc(19) | Timing constraint (through [get_pins { PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST.CONFIG_PRESET_N }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design @W:MT447 : synthesis.fdc(20) | Timing constraint (through [get_pins { PCIe_Demo_sb_0.SYSRESET_POR.POWER_ON_RESET_N }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design Finished final timing analysis (Real Time elapsed 0h:00m:14s; CPU Time elapsed 0h:00m:13s; Memory used current: 213MB peak: 226MB) Finished timing report (Real Time elapsed 0h:00m:14s; CPU Time elapsed 0h:00m:13s; Memory used current: 213MB peak: 226MB) --------------------------------------- Resource Usage Report for PCIe_Demo Mapping to part: m2gl010tfbga484-1 Cell usage: CCC 1 use CLKINT 9 uses MSS_010 1 use RCOSC_25_50MHZ 1 use RCOSC_25_50MHZ_FAB 1 use SERDESIF_0 1 use SYSRESET 1 use CFG1 8 uses CFG2 507 uses CFG3 621 uses CFG4 1281 uses Carry cells: ARI1 224 uses - used for arithmetic functions Sequential Cells: SLE 1352 uses DSP Blocks: 0 of 22 (0%) I/O ports: 34 I/O primitives: 16 INBUF 7 uses INBUF_DIFF 1 use OUTBUF 8 uses Global Clock Buffers: 9 of 8 (112%) RAM/ROM usage summary Total Block RAMs (RAM1K18) : 17 of 21 (80%) Total Block RAMs (RAM64x18) : 2 of 22 (9%) Total LUTs: 2641 Extra resources required for RAM and MACC interface logic during P&R: RAM64x18 Interface Logic : SLEs = 72; LUTs = 72; RAM1K18 Interface Logic : SLEs = 612; LUTs = 612; MACC Interface Logic : SLEs = 0; LUTs = 0; Total number of SLEs after P&R: 1352 + 72 + 612 + 0 = 2036; Total number of LUTs after P&R: 2641 + 72 + 612 + 0 = 3325; Mapper successful! At Mapper Exit (Real Time elapsed 0h:00m:14s; CPU Time elapsed 0h:00m:13s; Memory used current: 40MB peak: 226MB) Process took 0h:00m:14s realtime, 0h:00m:13s cputime # Tue Aug 29 15:42:19 2017 ###########################################################]