@W: BN132 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":898:4:898:9|Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.sdif2_areset_n_rcosc_q1 because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.sdif1_areset_n_rcosc_q1. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":912:4:912:9|Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.sdif3_areset_n_rcosc_q1 because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.sdif1_areset_n_rcosc_q1. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":912:4:912:9|Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.sdif3_areset_n_rcosc because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.sdif2_areset_n_rcosc. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":898:4:898:9|Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.sdif2_areset_n_rcosc because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.sdif1_areset_n_rcosc. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":1581:4:1581:9|Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.release_sdif3_core because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.release_sdif2_core. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":1549:4:1549:9|Removing sequential instance PCIe_Demo_sb_0.CORERESETP_0.release_sdif2_core because it is equivalent to instance PCIe_Demo_sb_0.CORERESETP_0.release_sdif1_core. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":3030:6:3030:9|Removing user instance CORESYSSERVICES_0.U_CmdDec.resp_srcreg_data[7] because it is equivalent to instance CORESYSSERVICES_0.U_CmdDec.resp_srcreg_data[1]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2889:3:2889:8|Removing sequential instance CORESYSSERVICES_0.U_CmdDec.resp_srcreg_data_d1[7] because it is equivalent to instance CORESYSSERVICES_0.U_CmdDec.resp_srcreg_data_d1[1]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":696:3:696:8|Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[7] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":696:3:696:8|Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[6] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":696:3:696:8|Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[5] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":696:3:696:8|Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[4] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":696:3:696:8|Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[3] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":696:3:696:8|Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[2] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":696:3:696:8|Register bit CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_d1[1] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":163:0:163:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_1.regHSIZE[2] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":163:0:163:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_1.regHSIZE[0] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[16] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":163:0:163:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_0.regHSIZE[2] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[16] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":653:3:653:8|Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[7] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":653:3:653:8|Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[6] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":653:3:653:8|Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[5] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":653:3:653:8|Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[4] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":653:3:653:8|Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[3] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":653:3:653:8|Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[2] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_userif.v":653:3:653:8|Register bit CORESYSSERVICES_0.U_UserIF.uclatchcmd_o[1] (in view view:work.PCIe_Demo(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: BN132 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":163:0:163:5|Removing instance CoreAHBLite_0.matrix4x16.masterstage_1.regHSIZE[1] because it is equivalent to instance CoreAHBLite_0.matrix4x16.masterstage_1.regHTRANS. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Register bit arbRegSMCurrentState[12] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_1(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Register bit arbRegSMCurrentState[8] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_1(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Register bit arbRegSMCurrentState[12] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_2(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Register bit arbRegSMCurrentState[8] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_2(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Register bit arbRegSMCurrentState[4] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_2(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\work\pcie_demo\coreahblsram_0\rtl\vlog\core\ahblsramif.v":310:0:310:5|Register bit burst_count_reg[4] (in view view:COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\work\pcie_demo\coreahblsram_0\rtl\vlog\core\ahblsramif.v":310:0:310:5|Register bit burst_count_reg[3] (in view view:COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\work\pcie_demo\coreahblsram_0\rtl\vlog\core\ahblsramif.v":310:0:310:5|Register bit burst_count_reg[2] (in view view:COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\work\pcie_demo\coreahblsram_0\rtl\vlog\core\ahblsramif.v":310:0:310:5|Register bit burst_count_reg[1] (in view view:COREAHBLSRAM_LIB.PCIe_Demo_COREAHBLSRAM_0_AHBLSramIf_Z6(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[31] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[30] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[29] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[28] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[27] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[26] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[25] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[24] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[23] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[22] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[21] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[20] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[19] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[18] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[17] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[16] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[15] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[14] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[13] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[12] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[11] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[10] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":353:0:353:5|Register bit CAHBtoAPB3I0l.HRDATA[9] (in view view:COREAHBTOAPB3_LIB.COREAHBTOAPB3_24s_0s(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: BN132 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_ahbtoapbsm.v":690:0:690:5|Removing sequential instance COREAHBTOAPB3_0.CAHBtoAPB3lll.PWRITE because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.CAHBtoAPB3IOI[2]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[31] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[30] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[28] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[27] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[26] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[25] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[24] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[23] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[22] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[21] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[20] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[19] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[18] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[17] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[16] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[14] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[13] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[7] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[6] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[5] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[4] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[3] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[2] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[1] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1924:3:1924:8|Register bit memwr_data_addr_r[0] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[30] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[29] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[28] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[27] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[26] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[25] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[24] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[23] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[22] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[21] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[20] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[19] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[18] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[17] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[16] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[14] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[13] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[7] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[6] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[5] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memwr_data_r[1] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[31] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[30] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[28] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[27] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[26] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[25] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[24] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[23] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[22] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[21] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[20] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[19] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[18] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[17] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[16] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[14] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[13] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":2668:3:2668:8|Register bit cfdatain_d1[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[31] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[28] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[27] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[26] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[25] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[24] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[23] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[22] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[21] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[20] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[19] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[18] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[17] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[7] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[6] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[5] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[1] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1303:3:1303:8|Register bit cfsrc_addr_d1[0] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memrd_data_d1[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memrd_data_d1[14] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memrd_data_d1[13] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memrd_data_d1[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memrd_data_d1[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memrd_data_d1[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memrd_data_d1[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memrd_data_d1[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":997:3:997:8|Register bit burstlen_memrd_data_d1[1] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[31] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[28] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[27] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[26] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[25] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[24] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[23] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[22] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[21] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[20] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[19] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[18] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[17] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[15] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[12] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[11] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[10] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[9] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[8] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[7] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[6] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[5] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[1] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1255:3:1255:8|Register bit cfdst_addr_d1[0] (in view view:CORESYSSERVICES_LIB.CoreSysServices_CmdDec_Z10(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_fsmctrl.v":679:2:679:7|Register bit cfrd_asyncevent_d1 (in view view:CORESYSSERVICES_LIB.CoreSysServices_FSMCtrl(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":163:0:163:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_1.regHSIZE[0] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[6] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[4] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[2] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_0.SDATASELInt[0] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[6] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[4] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[2] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":229:0:229:5|Register bit CoreAHBLite_0.matrix4x16.masterstage_1.SDATASELInt[0] (in view view:work.PCIe_Demo_sb(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreconfigmaster\2.1.102\rtl\vlog\core\coreconfigmaster.v":723:4:723:9|Register bit HSIZE[2] (in view view:work.CoreConfigMaster_Z12(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Register bit arbRegSMCurrentState[12] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_4(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Register bit arbRegSMCurrentState[8] (in view view:COREAHBLITE_LIB.COREAHBLITE_SLAVEARBITER_Z4_4(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: MO160 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Register bit paddr[16] (in view view:work.CoreConfigP_Z16(verilog)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.
@W: FX107 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\hdl\serial_num.v":66:0:66:5|RAM serial_number[31:0] (in view: work.Serial_Num_0s_1s_2s_3s_4294967292s_4294967293s(verilog)) does not have a read/write conflict check. Possible simulation mismatch. To resolve a read/write conflict, either set syn_ramstyle = rw_check, or enable the "Read Write Check on RAM" Implementation Option. For more information, search for "read/write conflict check" in Online Help.
@W: FA239 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1466:8:1466:11|ROM CORESYSSERVICES_0.U_CmdDec.memrd_data_addr_cnst[3:0] (in view: work.PCIe_Demo(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance.
@W: FA239 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\actel\directcore\coresysservices\3.1.101\rtl\vlog\core\coresysservices_cmddec.v":1466:8:1466:11|ROM CORESYSSERVICES_0.U_CmdDec.memrd_data_addr_cnst[3:0] (in view: work.PCIe_Demo(verilog)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance.
@W: MT246 :"c:\users\athuldeep.n\desktop\phase_1_wrk\dg0532\liberoproject\pcie_demo\component\work\pcie_demo_sb\ccc_0\pcie_demo_sb_ccc_0_fccc.v":23:36:23:43|Blackbox CCC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT447 :"c:/users/athuldeep.n/desktop/phase_1_wrk/dg0532/liberoproject/pcie_demo/designer/pcie_demo/synthesis.fdc":14:0:14:0|Timing constraint (from [get_cells { PCIe_Demo_sb_0.CORERESETP_0.MSS_HPMS_READY_int }] to [get_cells { PCIe_Demo_sb_0.CORERESETP_0.sm0_areset_n_rcosc PCIe_Demo_sb_0.CORERESETP_0.sm0_areset_n_rcosc_q1 }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design 
@W: MT447 :"c:/users/athuldeep.n/desktop/phase_1_wrk/dg0532/liberoproject/pcie_demo/designer/pcie_demo/synthesis.fdc":15:0:15:0|Timing constraint (from [get_cells { PCIe_Demo_sb_0.CORERESETP_0.MSS_HPMS_READY_int PCIe_Demo_sb_0.CORERESETP_0.SDIF*_PERST_N_re }] to [get_cells { PCIe_Demo_sb_0.CORERESETP_0.sdif*_areset_n_rcosc* }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design 
@W: MT447 :"c:/users/athuldeep.n/desktop/phase_1_wrk/dg0532/liberoproject/pcie_demo/designer/pcie_demo/synthesis.fdc":16:0:16:0|Timing constraint (through [get_nets { PCIe_Demo_sb_0.CORERESETP_0.*sdif*_phr.hot_reset_n PCIe_Demo_sb_0.CORERESETP_0.*sdif*_phr.sdif_core_reset_n_0 }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design 
@W: MT447 :"c:/users/athuldeep.n/desktop/phase_1_wrk/dg0532/liberoproject/pcie_demo/designer/pcie_demo/synthesis.fdc":19:0:19:0|Timing constraint (through [get_pins { PCIe_Demo_sb_0.PCIe_Demo_sb_HPMS_0.MSS_ADLIB_INST.CONFIG_PRESET_N }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design 
@W: MT447 :"c:/users/athuldeep.n/desktop/phase_1_wrk/dg0532/liberoproject/pcie_demo/designer/pcie_demo/synthesis.fdc":20:0:20:0|Timing constraint (through [get_pins { PCIe_Demo_sb_0.SYSRESET_POR.POWER_ON_RESET_N }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design 
