Microsemi Corporation - Microsemi Libero Software Release Libero SoC v11.8 SP1 (Version 11.8.1.12)

Date      :  Tue Aug 29 12:20:27 2017
Project   :  C:\Users\athuldeep.n\Desktop\PHASE_1_WRK\dg0532\LiberoProject\PCIE_Demo
Component :  PCIe_Demo_sb
Family    :  IGLOO2


HDL source files for all Synthesis and Simulation tools:
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_addrdec.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_defaultslavesm.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_masterstage.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_matrix4x16.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_slavearbiter.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_slavestage.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/DirectCore/CoreConfigMaster/2.1.102/rtl/vlog/core/coreconfigmaster.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/DirectCore/CoreConfigP/7.1.100/rtl/vlog/core/coreconfigp.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/DirectCore/CoreResetP/7.1.100/rtl/vlog/core/coreresetp.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/DirectCore/CoreResetP/7.1.100/rtl/vlog/core/coreresetp_pcie_hotreset.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/work/PCIe_Demo_sb/CCC_0/PCIe_Demo_sb_CCC_0_FCCC.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/work/PCIe_Demo_sb/FABOSC_0/PCIe_Demo_sb_FABOSC_0_OSC.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/work/PCIe_Demo_sb/PCIe_Demo_sb.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/work/PCIe_Demo_sb_HPMS/PCIe_Demo_sb_HPMS.v

HDL source files for Synopsys SynplifyPro Synthesis tool:
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/SgCore/OSC/2.0.101/osc_comps.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/work/PCIe_Demo_sb_HPMS/PCIe_Demo_sb_HPMS_syn.v

HDL source files for Mentor Precision Synthesis tool:
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/Actel/SgCore/OSC/2.0.101/osc_comps_pre.v
    C:/Users/athuldeep.n/Desktop/PHASE_1_WRK/dg0532/LiberoProject/PCIE_Demo/component/work/PCIe_Demo_sb_HPMS/PCIe_Demo_sb_HPMS_pre.v

