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L0 9
R5
r1
!s85 0
31
!s108 1434134765.000000
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/syssvc_blk/syssvc_blk.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/syssvc_blk/syssvc_blk.v|
!s101 -O0
!i113 1
R7
R8
vtestbench
!i10b 1
!s100 2]K;S;N<fz;1RoK<d2b;j2
IB@j]3]Rg8XRDZ[1<1Izoh2
VJVNmgo:;eRn^@m9l;TBE>1
R0
w1379354355
8D:/Appsnotes/2013/NRBG/Working_M2GL_design/Sysservice_NRBG/component/work/Top/testbench.v
FD:/Appsnotes/2013/NRBG/Working_M2GL_design/Sysservice_NRBG/component/work/Top/testbench.v
L0 12
OW;L;10.1c;51
r1
!s85 0
31
!s108 1379354997.387000
!s107 D:/Appsnotes/2013/NRBG/Working_M2GL_design/Sysservice_NRBG/component/work/Top/testbench.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2013/NRBG/Working_M2GL_design/Sysservice_NRBG/component/work/UART_top/COREABC_0/rtl/vlog/core|+incdir+D:/Appsnotes/2013/NRBG/Working_M2GL_design/Sysservice_NRBG/component/work/Top|-work|presynth|D:/Appsnotes/2013/NRBG/Working_M2GL_design/Sysservice_NRBG/component/work/Top/testbench.v|
!s101 -O0
R7
!s92 +incdir+D:/Appsnotes/2013/NRBG/Working_M2GL_design/Sysservice_NRBG/component/work/UART_top/COREABC_0/rtl/vlog/core +incdir+D:/Appsnotes/2013/NRBG/Working_M2GL_design/Sysservice_NRBG/component/work/Top -work presynth -O0
vTop
R29
!i10b 1
!s100 @mG=:T;;PgOQIz8lXYRBh0
IkcH7jaN8mdEU:<F5TQFHk1
R2
R3
w1433980389
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/Top/Top.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/Top/Top.v
L0 9
R5
r1
!s85 0
31
R28
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/Top/Top.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/Top/Top.v|
!s101 -O0
!i113 1
R7
R8
n@top
vUART_top
R18
!i10b 1
!s100 If5D9A<[g`SaIaEFJ:K;^3
IAnP;SmnnNNg<ZGCG?7[Im1
R2
R3
Z30 w1433984912
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/UART_top.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/UART_top.v
L0 9
R5
r1
!s85 0
31
!s108 1434134756.000000
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/UART_top.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/UART_top.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top
vUART_top_COREABC_0_ACMTABLE
R1
!i10b 1
!s100 <L1bOTRMVXdDSeKW2XJgk1
I;KON`^jn?A:JXEb6EGLCQ1
R2
R3
Z31 w1433984911
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/acmtable.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/acmtable.v
L0 24
R5
r1
!s85 0
31
Z32 !s108 1434134748.000000
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/acmtable.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/acmtable.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@c@o@r@e@a@b@c_0_@a@c@m@t@a@b@l@e
vUART_top_COREABC_0_COREABC
Z33 !s110 1434134752
!i10b 1
!s100 b^LHS^@b5CE03^DfV>VbR2
I5eNRFIn=:=8SgAz>CTLWj0
R2
R3
R31
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/coreabc.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/coreabc.v
Z34 FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/support.v
L0 46
R5
r1
!s85 0
31
Z35 !s108 1434134752.000000
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/support.v|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/coreabc.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/coreabc.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@c@o@r@e@a@b@c_0_@c@o@r@e@a@b@c
vUART_top_COREABC_0_DEBUGBLK
R1
!i10b 1
!s100 UHnPz[`6[6UI^BkUjRMeT0
IleM4RMaa[]@j72VjLBEF?2
R2
R3
R31
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/debugblk.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/debugblk.v
R34
Z36 L0 25
R5
r1
!s85 0
31
R32
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/support.v|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/debugblk.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/debugblk.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@c@o@r@e@a@b@c_0_@d@e@b@u@g@b@l@k
vUART_top_COREABC_0_INSTRUCTIONS
Z37 !s110 1434134749
!i10b 1
!s100 QzL3K^zCh0?zzFPBBe18P2
I39[<Ej<liSMLg8F=METCM0
R2
R3
R31
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructions.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructions.v
R34
L0 26
R5
r1
!s85 0
31
Z38 !s108 1434134749.000000
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/support.v|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructions.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructions.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@c@o@r@e@a@b@c_0_@i@n@s@t@r@u@c@t@i@o@n@s
vUART_top_COREABC_0_INSTRUCTNVM
R37
!i10b 1
!s100 Bh=T<4POCe<3LkN6<B05J3
I:c79<@B?@i:zcZ=UFe7c:2
R2
R3
R31
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructnvm_bb.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructnvm_bb.v
R34
R19
R5
r1
!s85 0
31
R38
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/support.v|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructnvm_bb.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructnvm_bb.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@c@o@r@e@a@b@c_0_@i@n@s@t@r@u@c@t@n@v@m
vUART_top_COREABC_0_INSTRUCTRAM
Z39 !s110 1434134750
!i10b 1
!s100 3l[1JKEj5ZBX<`MmIYE;32
IMLak02eF9caIL_?[BzPm82
R2
R3
R31
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructram.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructram.v
Z40 L0 27
R5
r1
!s85 0
31
Z41 !s108 1434134750.000000
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructram.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/instructram.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@c@o@r@e@a@b@c_0_@i@n@s@t@r@u@c@t@r@a@m
vUART_top_COREABC_0_IRAM512X9
R39
!i10b 1
!s100 YGM@?kJ2IUh1a`DKHGTMX0
IPi5P?<4[N08W@m>Zz3FYD3
R2
R3
R31
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/iram512x9_rtl.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/iram512x9_rtl.v
R40
R5
r1
!s85 0
31
R38
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/iram512x9_rtl.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/iram512x9_rtl.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@c@o@r@e@a@b@c_0_@i@r@a@m512@x9
vUART_top_COREABC_0_RAM128X8
Z42 !s110 1434134751
!i10b 1
!s100 8;?dHbo@8zVOFjThnMEoZ0
IledziC9z><[OeGm>Za8=:3
R2
R3
R31
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram128x8_smartfusion2.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram128x8_smartfusion2.v
R16
R5
r1
!s85 0
31
R41
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram128x8_smartfusion2.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram128x8_smartfusion2.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@c@o@r@e@a@b@c_0_@r@a@m128@x8
vUART_top_COREABC_0_RAM256X16
R42
!i10b 1
!s100 DgWUN>^=C7gl2XF=^R@nN1
I<69;:e2f=UeIC^63ELWn^1
R2
R3
R31
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram256x16_rtl.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram256x16_rtl.v
R27
R5
r1
!s85 0
31
Z43 !s108 1434134751.000000
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram256x16_rtl.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram256x16_rtl.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@c@o@r@e@a@b@c_0_@r@a@m256@x16
vUART_top_COREABC_0_RAM256X8
R33
!i10b 1
!s100 COUQ7b_@zfOcNO:PkZ^nd3
I[:nk`i`L;6e;]f:YzM5a00
R2
R3
R31
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram256x8_rtl.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram256x8_rtl.v
R27
R5
r1
!s85 0
31
R43
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram256x8_rtl.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ram256x8_rtl.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@c@o@r@e@a@b@c_0_@r@a@m256@x8
vUART_top_COREABC_0_RAMBLOCKS
R33
!i10b 1
!s100 Uo`<?nY1z`<I?9fbgRI7a2
I3j;MJnUz7m`^WWGKAW6762
R2
R3
R31
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ramblocks.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ramblocks.v
R36
R5
r1
!s85 0
31
R35
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ramblocks.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core/ramblocks.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@c@o@r@e@a@b@c_0_@r@a@m@b@l@o@c@k@s
vUART_top_CoreUARTapb_0_Clock_gen
Z44 !s110 1434134753
!i10b 1
!s100 NiQkS>c[=z;VCKDlPMZd=0
I^YTGAQ6l0iH[F?<6Nc;z[0
R2
R3
R30
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Clock_gen.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Clock_gen.v
L0 38
R5
r1
!s85 0
31
R35
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Clock_gen.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Clock_gen.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@core@u@a@r@tapb_0_@clock_gen
vUART_top_CoreUARTapb_0_COREUART
Z45 !s110 1434134754
!i10b 1
!s100 K^35[SEa8h4AGMNAccFHB0
IcfVJ^1d:@_51j>Hb@8:8a0
R2
R3
R30
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/CoreUART.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/CoreUART.v
R19
R5
r1
!s85 0
31
Z46 !s108 1434134754.000000
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/CoreUART.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/CoreUART.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@core@u@a@r@tapb_0_@c@o@r@e@u@a@r@t
vUART_top_CoreUARTapb_0_CoreUARTapb
!s110 1434134755
!i10b 1
!s100 VE8S3D]g[IMO9Bi^C7geR0
I1helO7zgGELVX1z^1YEVA2
R2
R3
R30
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/CoreUARTapb.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/CoreUARTapb.v
L0 59
R5
r1
!s85 0
31
!s108 1434134755.000000
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/CoreUARTapb.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/CoreUARTapb.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@core@u@a@r@tapb_0_@core@u@a@r@tapb
vUART_top_CoreUARTapb_0_fifo_256x8
R45
!i10b 1
!s100 0N2]3nWJ@JPgBkCFh4<b[0
I6n?=>9OnfaF;Ncjg<]3nb1
R2
R3
R30
Z47 8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/fifo_256x8.v
Z48 FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/fifo_256x8.v
R19
R5
r1
!s85 0
31
R46
Z49 !s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/fifo_256x8.v|
Z50 !s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/fifo_256x8.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@core@u@a@r@tapb_0_fifo_256x8
vUART_top_CoreUARTapb_0_fifo_ctrl_256
R45
!i10b 1
!s100 X^EhSN9=O7acPOk6a[KI@1
I]e:;0R]_M8`6^3=1Fngn]0
R2
R3
R30
R47
R48
L0 71
R5
r1
!s85 0
31
R46
R49
R50
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@core@u@a@r@tapb_0_fifo_ctrl_256
vUART_top_CoreUARTapb_0_ram16x8
R45
!i10b 1
!s100 mICke1YCFQMX^dRiRf7Oz1
IaiNA2f4^F7UDj6i6mkQgY0
R2
R3
R30
R47
R48
L0 233
R5
r1
!s85 0
31
R46
R49
R50
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@core@u@a@r@tapb_0_ram16x8
vUART_top_CoreUARTapb_0_Rx_async
R44
!i10b 1
!s100 J0GT8i_M=A;EJlH`D;e^:0
IC@NAH`STFgK`k5[E<a:e@1
R2
R3
R30
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Rx_async.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Rx_async.v
L0 30
R5
r1
!s85 0
31
Z51 !s108 1434134753.000000
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Rx_async.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Rx_async.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@core@u@a@r@tapb_0_@rx_async
vUART_top_CoreUARTapb_0_Tx_async
R45
!i10b 1
!s100 :@jSJSzWI]44`0h[:R9c:0
I=<BdWCQQ@?RG_78c=EUo[1
R2
R3
R30
8D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Tx_async.v
FD:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Tx_async.v
R19
R5
r1
!s85 0
31
R51
!s107 D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Tx_async.v|
!s90 -reportprogress|300|+incdir+D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/COREABC_0/rtl/vlog/core|-work|presynth|D:/Appsnotes/2015/11_6_update/NRBG/SF2_IGL2_nrbg_11p6_DF/Libero/M2GL090_design/NRBG_M2GL090TS/component/work/UART_top/CoreUARTapb_0/rtl/vlog/core/Tx_async.v|
!s101 -O0
!i113 1
R7
R8
n@u@a@r@t_top_@core@u@a@r@tapb_0_@tx_async
