
*******************************************
       Libero SoC, MSS and IP Core VERSIONS
*******************************************

This design was tested with the following: 
	Libero SoC Version: 11.8
	MSS Version: 1.1.500


******************************************
     DESIGN FILE DIRECTORY STRUCTURE
******************************************


m2gl_an5927_df
    |
    |    
    |   
    |      
    |      
    |----libero
    |      |
    |      |
    |      |     
    |      |-----M2GL090_design
    |	   |	|
    |	   |	|
    |      |    |----NRBG_M2GL090TS	  
    |      |         
    |
    |
    |	   
    |
    |---stapl_programming_file
    |      |
    |      |
    |      |     
    |      |-----M2GL090TS.stp       
    |      
    |      
    |
    |
    |---readme.txt
    

libero
==================================
LiberoProject files

For reference, the final Libero SoC Verilog project of this demo is given under this folder. 
The designs are created for SmartFusion2  Eval Board using M2S090TS and IGLOO2 Eval Board using M2GL090TS device.



stapl_programming_file
============================
This folder consists the programming file.







