MDDR_TA_top_syn (synthesis_1)
Synthesis -
Compiler Report
Pre-mapping Report
Clock Summary
Mapper Report
Clock Conversion
Timing Report
Performance Summary
Clock Relationships
Interface Information
Detailed Report for Clocks
Clock: MDDR_TA_CCC_0_FCCC|GL0_net_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: MDDR_TA_CCC_0_FCCC|GL2_net_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: MDDR_TA_FABOSC_0_OSC|RCOSC_25_50MHZ_CCC_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: MDDR_TA_HPMS|FIC_2_APB_M_PCLK_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: System
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Resource Utilization
Hierarchical Area Report(MDDR_TA_top) (12:20 27-Mar)
Session Log (12:17 27-Mar)