<?xml version="1.0" encoding="UTF-8" standalone="no" ?><Component xmlns="http://actel.com/sweng/afi"><name>LPDDR_VIP_Simulation</name><vendor/><library/><version/><fileSets><fileSet fileSetId="OTHER_FILESET"><file fileid="0"><name>./LPDDR_VIP_Simulation.sdb</name><userFileType>SDB</userFileType></file><file fileid="1"><name>./LPDDR_VIP_Simulation_manifest.txt</name><userFileType>LOG</userFileType></file></fileSet><fileSet fileSetId="COMPONENT_FILESET"><file fileid="2"><name>../../Actel/Simulation/RESET_GEN/1.0.1/RESET_GEN.cxf</name><userFileType>CXF</userFileType></file><file fileid="3"><name>../../Actel/Simulation/SimDRAM/1.0.101/SimDRAM.cxf</name><userFileType>CXF</userFileType></file></fileSet><fileSet fileSetId="STIMULUS_FILESET"><file fileid="4"><name>./LPDDR_VIP_Simulation.v</name><fileType>verilogSource</fileType></file></fileSet></fileSets><hwModel><views><view><fileSetRef>OTHER_FILESET</fileSetRef><fileSetRef>COMPONENT_FILESET</fileSetRef><fileSetRef>STIMULUS_FILESET</fileSetRef><name>OTHER</name></view></views></hwModel><category>SmartCoreDesignTestBench</category><function>SmartDesignTestBench</function><variation>SmartDesignTestBench</variation><vendor>Actel</vendor><version>1.0</version><vendorExtension><type>SmartCoreDesignTestBench</type></vendorExtension><vendorExtension><state value="GENERATED"/></vendorExtension><vendorExtensions><previousType/><preDesignInGoodState>false</preDesignInGoodState><componentRef library="" name="" vendor="" version=""/><dependentModules><module id_library="Simulation" id_name="RESET_GEN" id_vendor="Actel" id_version="1.0.1" module_class="SpiritModule" name="RESET_GEN" state="GOOD" type="3"/><module id_library="Simulation" id_name="SimDRAM" id_vendor="Actel" id_version="1.0.101" module_class="SpiritModule" name="SimDRAM" state="GOOD" type="3"/><module module_class="ComponentModule" name="MDDR_TA_top::work" state="GOOD" type="1"/></dependentModules></vendorExtensions><model><signals><signal><name>TX</name><direction>out</direction><export>false</export><vendorExtensions><pad>false</pad><used>true</used></vendorExtensions></signal></signals></model></Component>