sourcing \\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\message_override.tcl


Starting:    \\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\bin64\mbin\synbatch.exe
Install:     \\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3
Hostname:    W764-BALA
Date:        Tue Sep 29 14:53:23 2015
Version:     J-2015.03M-3

Arguments:   -product synplify_pro -licensetype synplifypro_actel -batch -log synplify.log MDDR_TA_top_syn.tcl
ProductType: synplify_pro

License checkout: synplifypro_actel
License: synplifypro_actel from server denzil 
Licensed Vendor: actel
License Option: actel_oem

Running in Vendor Mode


auto_infer_blackbox is not supported in current product.
auto_infer_blackbox is not supported in current product.
auto_infer_blackbox is not supported in current product.

log file: "D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\MDDR_TA_top.srr"

Running: synthesis in foreground



Running MDDR_TA_top_syn|synthesis


Running: compile (Compile) on MDDR_TA_top_syn|synthesis


Running: compile_flow (Compile Process) on MDDR_TA_top_syn|synthesis


Running: compiler (Compile Input) on MDDR_TA_top_syn|synthesis

Copied D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\synwork\MDDR_TA_top_comp.srs to D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\MDDR_TA_top.srs


compiler Completed
Return Code: 0
Run Time:0h:00m:10s


Running: multi_srs_gen (Multi-srs Generator) on MDDR_TA_top_syn|synthesis

Copied D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\synwork\MDDR_TA_top_comp.srs to D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\synwork\MDDR_TA_top_s.srs


multi_srs_gen Completed
Return Code: 0
Run Time:0h:00m:02s

Copied D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\synwork\MDDR_TA_top_mult.srs to D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\MDDR_TA_top.srs

Complete: Compile Process on MDDR_TA_top_syn|synthesis


Running: premap (Pre-mapping) on MDDR_TA_top_syn|synthesis

Copied D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\MDDR_TA_top.sap to D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\synwork\MDDR_TA_top_s.sap

Copied D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\MDDR_TA_top.fse to D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\synwork\MDDR_TA_top_s.fse


premap Completed with warnings
Return Code: 1
Run Time:0h:00m:05s

Complete: Compile on MDDR_TA_top_syn|synthesis


Running: map (Map) on MDDR_TA_top_syn|synthesis


Running: fpga_mapper (Map & Optimize) on MDDR_TA_top_syn|synthesis

Copied D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\synwork\MDDR_TA_top_m.srm to D:\Libero_11.6_migration\Libero_designs\m2gl_ac424_new_without_workaround\Libero_Project\MDDR_TA\synthesis\MDDR_TA_top.srm


fpga_mapper Completed with warnings
Return Code: 1
Run Time:0h:00m:15s

Complete: Map on MDDR_TA_top_syn|synthesis

Complete: Logic Synthesis on MDDR_TA_top_syn|synthesis

TCL script complete: "MDDR_TA_top_syn.tcl"

exit status=0

exit status=0

License checkin: synplifypro_actel

