@N: MF248 |Running in 64-bit mode.
@N: MF667 |Clock conversion disabled 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":163:0:163:5|Removing sequential instance CoreAHBLite_0.matrix4x16.masterstage_0.regHSIZE[2] of view:PrimLib.dffr(prim) in hierarchy view:work.my_hpms(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v":79:4:79:9|Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_16.masterDataInProg[3] of view:PrimLib.dffr(prim) in hierarchy view:work.my_hpms(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v":79:4:79:9|Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_1.masterDataInProg[3] of view:PrimLib.dffr(prim) in hierarchy view:work.my_hpms(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v":79:4:79:9|Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_16.masterDataInProg[2] of view:PrimLib.dffr(prim) in hierarchy view:work.my_hpms(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v":79:4:79:9|Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_16.masterDataInProg[1] of view:PrimLib.dffr(prim) in hierarchy view:work.my_hpms(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v":79:4:79:9|Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_1.masterDataInProg[2] of view:PrimLib.dffr(prim) in hierarchy view:work.my_hpms(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v":79:4:79:9|Removing sequential instance CoreAHBLite_0.matrix4x16.slavestage_1.masterDataInProg[1] of view:PrimLib.dffr(prim) in hierarchy view:work.my_hpms(verilog) because there are no references to its outputs 
@N: MO225 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\hdl\mem_apb_wrp.v":63:0:63:5|No possible illegal states for state machine fsm[3:0],safe FSM implementation is disabled
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[8] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[9] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[10] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[11] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[16] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[17] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[18] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[19] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[20] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[21] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[22] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[23] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[24] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[25] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[26] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[27] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[28] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[29] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[30] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":146:0:146:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3OOl[31] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.INIT_DONE_int in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":163:0:163:5|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.masterstage_0.regHSIZE[0] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sm0_state[6] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[8] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[9] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[10] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[11] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[16] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[17] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[18] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[19] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[20] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[21] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[22] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[23] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[24] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[25] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[26] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[27] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[28] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[29] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[30] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahbtoapb3\3.1.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":229:0:229:5|Removing sequential instance my_hpms_top_0.my_hpms_0.COREAHBTOAPB3_0.CAHBtoAPB3I0l.CAHBtoAPB3IOl[31] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_1.slave_arbiter.arbRegSMCurrentState[14] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_1.slave_arbiter.arbRegSMCurrentState[15] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_1.slave_arbiter.arbRegSMCurrentState[2] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_1.slave_arbiter.arbRegSMCurrentState[3] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_1.slave_arbiter.arbRegSMCurrentState[6] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_1.slave_arbiter.arbRegSMCurrentState[7] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_1.slave_arbiter.arbRegSMCurrentState[10] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_1.slave_arbiter.arbRegSMCurrentState[11] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[14] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[15] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[2] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[3] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[6] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[7] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[10] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreahblite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CoreAHBLite_0.matrix4x16.slavestage_16.slave_arbiter.arbRegSMCurrentState[11] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1613:4:1613:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.ddr_settled in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1646:4:1646:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.ddr_settled_q1 in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sdif3_spll_lock_q2 in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":929:4:929:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.CONFIG1_DONE_q1 in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":870:4:870:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sdif0_areset_n_rcosc_q1 in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":856:4:856:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sm0_areset_n_rcosc in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":755:4:755:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sm0_areset_n_q1 in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":755:4:755:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sm0_areset_n_clk_base in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1646:4:1646:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.ddr_settled_clk_base in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sm0_state[5] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sm0_state[4] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sm0_state[3] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sm0_state[2] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sm0_state[1] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2016\11_7_update\sram_init\igl2\m2gl_ac421_df\sram_init_igl2_vlog\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance my_hpms_top_0.my_hpms_0.CORERESETP_0.sm0_state[0] in hierarchy view:work.Top(verilog) because there are no references to its outputs 
@N: FP130 |Promoting Net my_hpms_top_0_HPMS_READY on CLKINT  I_146 
@N: BW103 |Synopsys Constraint File time units using default value of 1ns 
@N: BW107 |Synopsys Constraint File capacitance units using default value of 1pF 
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.
@N: MT322 |Clock constraints cover only FF-to-FF paths associated with the clock.
@N: MT582 |Estimated period and frequency not reported for given clock unless the clock has at least one timing path which is not a false or a max delay path and that does not have excessive slack
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.
@N: MT322 |Clock constraints cover only FF-to-FF paths associated with the clock.
@N: MT582 |Estimated period and frequency not reported for given clock unless the clock has at least one timing path which is not a false or a max delay path and that does not have excessive slack
