@W: BN544 :"c:/tcl_update/igl2/ac412/ac412_igl2_flash_freeze_entry_exit/libero_project/designer/top/synthesis.fdc":8:0:8:0|create_generated_clock with both -multiply_by and -divide_by not supported for this target technology
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coresysservices\3.2.102\rtl\vlog\core\coresysservices_userif.v":653:3:653:8|Removing sequential instance CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_hold[4] because it is equivalent to instance CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_hold[2]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coresysservices\3.2.102\rtl\vlog\core\coresysservices_userif.v":653:3:653:8|Removing sequential instance CORESYSSERVICES_0.U_UserIF.uclatchoptions_hold[1] because it is equivalent to instance CORESYSSERVICES_0.U_UserIF.ucmdbyte_req_hold[2]. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3837:2:3837:14|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_15 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_14. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3786:2:3786:14|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_14 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_13. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3735:2:3735:14|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_13 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_12. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3684:2:3684:14|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_12 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_11. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3633:2:3633:14|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_11 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3531:2:3531:13|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_9 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3480:2:3480:13|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_8 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3429:2:3429:13|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_7 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3378:2:3378:13|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_6 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3327:2:3327:13|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_5 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3276:2:3276:13|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_4 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3225:2:3225:13|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_3 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3174:2:3174:13|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_2 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_10. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreahblite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":3582:2:3582:14|Removing user instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_10 because it is equivalent to instance SystemBuilder_0.CoreAHBLite_0.matrix4x16.slavestage_0. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":1204:4:1204:9|Removing sequential instance SystemBuilder_0.CORERESETP_0.MDDR_DDR_AXI_S_CORE_RESET_N_int because it is equivalent to instance SystemBuilder_0.CORERESETP_0.FDDR_CORE_RESET_N_int. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":755:4:755:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF0_PERST_N_q1 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":774:4:774:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF1_PERST_N_q1 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":793:4:793:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF2_PERST_N_q1 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":812:4:812:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF3_PERST_N_q1 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":851:4:851:9|Sequential instance SystemBuilder_0.CORERESETP_0.sm1_areset_n_q1 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":755:4:755:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF0_PERST_N_q2 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":774:4:774:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF1_PERST_N_q2 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":793:4:793:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF2_PERST_N_q2 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":812:4:812:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF3_PERST_N_q2 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":851:4:851:9|Sequential instance SystemBuilder_0.CORERESETP_0.sm1_areset_n_q2 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":755:4:755:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF0_PERST_N_q3 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":774:4:774:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF1_PERST_N_q3 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":793:4:793:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF2_PERST_N_q3 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":812:4:812:9|Sequential instance SystemBuilder_0.CORERESETP_0.SDIF3_PERST_N_q3 is reduced to a combinational gate by constant propagation.
@W: MO129 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\actel\directcore\coreresetp\8.0.103\rtl\vlog\core\coreresetp.v":1503:4:1503:9|Sequential instance SystemBuilder_0.CORERESETP_0.RESET_N_F2M_int is reduced to a combinational gate by constant propagation.
@W: MT688 :"c:/tcl_update/igl2/ac412/ac412_igl2_flash_freeze_entry_exit/libero_project/designer/top/synthesis.fdc":8:0:8:0|No path from master pin (-source) to source of clock SystemBuilder_0/CCC_0/GL0 due to black box SystemBuilder_0.CCC_0.CCC_INST 
@W: MT530 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\work\ram_with_wrapper\sram_64x8_0\ram_with_wrapper_sram_64x8_0_tpsram.v":33:12:33:51|Found inferred clock top|rclk_user which controls 3 sequential elements including AHBMASTER_FIC_RAM_0.RAM_with_wrapper_0.SRAM_64x8_0.RAM_with_wrapper_SRAM_64x8_0_TPSRAM_R0C0. This clock has no specified timing constraint which may adversely impact design performance. 
@W: MT530 :"c:\tcl_update\igl2\ac412\ac412_igl2_flash_freeze_entry_exit\libero_project\component\work\ram_with_wrapper\sram_64x8_0\ram_with_wrapper_sram_64x8_0_tpsram.v":33:12:33:51|Found inferred clock top|wclk_user which controls 1 sequential elements including AHBMASTER_FIC_RAM_0.RAM_with_wrapper_0.SRAM_64x8_0.RAM_with_wrapper_SRAM_64x8_0_TPSRAM_R0C0. This clock has no specified timing constraint which may adversely impact design performance. 
@W: MF511 |Found issues with constraints. Please check constraint checker report "C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\synthesis\top_cck.rpt" .
