@N|Running in 64-bit mode
@N|Running in 64-bit mode
@N: CG1349 :	| Running Verilog Compiler in System Verilog mode
@N: CG775 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\top\CORESYSSERVICES_0\rtl\vlog\core\CoreSysServices.v":30:7:30:43|Component top_CORESYSSERVICES_0_CORESYSSERVICES not found in library "work" or "__hyper__lib__", but found in library CORESYSSERVICES_LIB
@N: CG775 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\COREAHBTOAPB3\3.2.101\rtl\vlog\core_obfuscated\coreahbtoapb3.v":8:0:8:12|Component COREAHBTOAPB3 not found in library "work" or "__hyper__lib__", but found in library COREAHBTOAPB3_LIB
@N: CG775 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3.v":31:7:31:14|Component CoreAPB3 not found in library "work" or "__hyper__lib__", but found in library COREAPB3_LIB
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\AHBMASTER_FIC.v":4:7:4:19|Synthesizing module AHBMASTER_FIC in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\COREAHBTOAPB3\3.2.101\rtl\vlog\core_obfuscated\coreahbtoapb3_ahbtoapbsm.v":8:0:8:10|Synthesizing module CAHBtoAPB3O in library COREAHBTOAPB3_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\COREAHBTOAPB3\3.2.101\rtl\vlog\core_obfuscated\coreahbtoapb3_penablescheduler.v":8:0:8:12|Synthesizing module CAHBtoAPB3OIl in library COREAHBTOAPB3_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\COREAHBTOAPB3\3.2.101\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":8:0:8:12|Synthesizing module CAHBtoAPB3l1I in library COREAHBTOAPB3_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\COREAHBTOAPB3\3.2.101\rtl\vlog\core_obfuscated\coreahbtoapb3.v":8:0:8:12|Synthesizing module COREAHBTOAPB3 in library COREAHBTOAPB3_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3_muxptob3.v":30:7:30:23|Synthesizing module COREAPB3_MUXPTOB3 in library COREAPB3_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAPB3\4.2.100\rtl\vlog\core\coreapb3.v":31:7:31:14|Synthesizing module CoreAPB3 in library COREAPB3_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\mem_apb_wrp.v":19:7:19:17|Synthesizing module mem_apb_wrp in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\mux_blk.v":19:7:19:13|Synthesizing module mux_blk in library work.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\igloo2.v":382:7:382:13|Synthesizing module RAM1K18 in library work.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\igloo2.v":372:7:372:9|Synthesizing module GND in library work.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\igloo2.v":376:7:376:9|Synthesizing module VCC in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\RAM_with_wrapper\SRAM_64x8_0\RAM_with_wrapper_SRAM_64x8_0_TPSRAM.v":5:7:5:41|Synthesizing module RAM_with_wrapper_SRAM_64x8_0_TPSRAM in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\RAM_with_wrapper\RAM_with_wrapper.v":9:7:9:22|Synthesizing module RAM_with_wrapper in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\AHBMASTER_FIC_RAM\AHBMASTER_FIC_RAM.v":9:7:9:23|Synthesizing module AHBMASTER_FIC_RAM in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\counter_delay.v":21:7:21:19|Synthesizing module counter_delay in library work.
@N: CG179 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\counter_delay.v":42:25:42:29|Removing redundant assignment.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\cnt34.v":7:7:7:11|Synthesizing module cnt34 in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CORESYSSERVICES\3.2.102\rtl\vlog\core\CoreSysServices_UserIF.v":30:7:30:28|Synthesizing module CoreSysServices_UserIF in library CORESYSSERVICES_LIB.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\igloo2.v":837:7:837:18|Synthesizing module FLASH_FREEZE in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CORESYSSERVICES\3.2.102\rtl\vlog\core\CoreSysServices_CmdDec.v":30:7:30:28|Synthesizing module CoreSysServices_CmdDec in library CORESYSSERVICES_LIB.
@N: CG179 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CORESYSSERVICES\3.2.102\rtl\vlog\core\CoreSysServices_CmdDec.v":1912:26:1912:35|Removing redundant assignment.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CORESYSSERVICES\3.2.102\rtl\vlog\core\CoreSysServices_FSMCtrl.v":30:7:30:29|Synthesizing module CoreSysServices_FSMCtrl in library CORESYSSERVICES_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CORESYSSERVICES\3.2.102\rtl\vlog\core\CoreSysServices_AHBLMasterIF.v":30:7:30:34|Synthesizing module CoreSysServices_AHBLMasterIF in library CORESYSSERVICES_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\top\CORESYSSERVICES_0\rtl\vlog\core\CoreSysServices.v":30:7:30:43|Synthesizing module top_CORESYSSERVICES_0_CORESYSSERVICES in library CORESYSSERVICES_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\FF_FSM.v":1:7:1:12|Synthesizing module ff_fsm in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\FF_BLKS\FF_BLKS.v":9:7:9:13|Synthesizing module FF_BLKS in library work.
@N: CG775 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder\CoreAHBLite_0\rtl\vlog\core\coreahblite.v":23:7:23:45|Component SystemBuilder_CoreAHBLite_0_CoreAHBLite not found in library "work" or "__hyper__lib__", but found in library COREAHBLITE_LIB
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\igloo2.v":362:7:362:12|Synthesizing module CLKINT in library work.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\igloo2.v":729:7:729:9|Synthesizing module CCC in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder\CCC_0\SystemBuilder_CCC_0_FCCC.v":5:7:5:30|Synthesizing module SystemBuilder_CCC_0_FCCC in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_addrdec.v":20:7:20:25|Synthesizing module COREAHBLITE_ADDRDEC in library COREAHBLITE_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_defaultslavesm.v":20:7:20:32|Synthesizing module COREAHBLITE_DEFAULTSLAVESM in library COREAHBLITE_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":22:7:22:29|Synthesizing module COREAHBLITE_MASTERSTAGE in library COREAHBLITE_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_addrdec.v":20:7:20:25|Synthesizing module COREAHBLITE_ADDRDEC in library COREAHBLITE_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":22:7:22:29|Synthesizing module COREAHBLITE_MASTERSTAGE in library COREAHBLITE_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_slavearbiter.v":20:7:20:30|Synthesizing module COREAHBLITE_SLAVEARBITER in library COREAHBLITE_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_slavestage.v":22:7:22:28|Synthesizing module COREAHBLITE_SLAVESTAGE in library COREAHBLITE_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":23:7:23:28|Synthesizing module COREAHBLITE_MATRIX4X16 in library COREAHBLITE_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder\CoreAHBLite_0\rtl\vlog\core\coreahblite.v":23:7:23:45|Synthesizing module SystemBuilder_CoreAHBLite_0_CoreAHBLite in library COREAHBLITE_LIB.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":23:7:23:16|Synthesizing module CoreResetP in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\SgCore\OSC\2.0.101\osc_comps.v":51:7:51:24|Synthesizing module RCOSC_25_50MHZ_FAB in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\SgCore\OSC\2.0.101\osc_comps.v":11:7:11:20|Synthesizing module RCOSC_25_50MHZ in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder\FABOSC_0\SystemBuilder_FABOSC_0_OSC.v":5:7:5:32|Synthesizing module SystemBuilder_FABOSC_0_OSC in library work.
@N: CG364 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\igloo2.v":720:7:720:14|Synthesizing module SYSRESET in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder_HPMS\SystemBuilder_HPMS_syn.v":5:7:5:13|Synthesizing module MSS_010 in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder_HPMS\SystemBuilder_HPMS.v":9:7:9:24|Synthesizing module SystemBuilder_HPMS in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder\SystemBuilder.v":9:7:9:19|Synthesizing module SystemBuilder in library work.
@N: CG364 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\top\top.v":9:7:9:9|Synthesizing module top in library work.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder\FABOSC_0\SystemBuilder_FABOSC_0_OSC.v":14:7:14:9|Input XTL is unused.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":1480:4:1480:9|Trying to extract state machine for register sdif3_state.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":1415:4:1415:9|Trying to extract state machine for register sdif2_state.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":1350:4:1350:9|Trying to extract state machine for register sdif1_state.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":1285:4:1285:9|Trying to extract state machine for register sdif0_state.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":1204:4:1204:9|Trying to extract state machine for register sm0_state.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":29:20:29:28|Input CLK_LTSSM is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":67:20:67:28|Input FPLL_LOCK is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":70:20:70:34|Input SDIF0_SPLL_LOCK is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":79:20:79:34|Input SDIF1_SPLL_LOCK is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":83:20:83:34|Input SDIF2_SPLL_LOCK is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":87:20:87:34|Input SDIF3_SPLL_LOCK is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":101:20:101:29|Input SDIF0_PSEL is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":102:20:102:31|Input SDIF0_PWRITE is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":103:20:103:31|Input SDIF0_PRDATA is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":104:20:104:29|Input SDIF1_PSEL is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":105:20:105:31|Input SDIF1_PWRITE is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":106:20:106:31|Input SDIF1_PRDATA is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":107:20:107:29|Input SDIF2_PSEL is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":108:20:108:31|Input SDIF2_PWRITE is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":109:20:109:31|Input SDIF2_PRDATA is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":110:20:110:29|Input SDIF3_PSEL is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":111:20:111:31|Input SDIF3_PWRITE is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":112:20:112:31|Input SDIF3_PRDATA is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":118:20:118:37|Input SOFT_EXT_RESET_OUT is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":119:20:119:33|Input SOFT_RESET_F2M is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":120:20:120:32|Input SOFT_M3_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":121:20:121:49|Input SOFT_MDDR_DDR_AXI_S_CORE_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":122:20:122:39|Input SOFT_FDDR_CORE_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":123:20:123:39|Input SOFT_SDIF0_PHY_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":124:20:124:40|Input SOFT_SDIF0_CORE_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":125:20:125:39|Input SOFT_SDIF1_PHY_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":126:20:126:40|Input SOFT_SDIF1_CORE_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":127:20:127:39|Input SOFT_SDIF2_PHY_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":128:20:128:40|Input SOFT_SDIF2_CORE_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":129:20:129:39|Input SOFT_SDIF3_PHY_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":130:20:130:40|Input SOFT_SDIF3_CORE_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":134:20:134:42|Input SOFT_SDIF0_0_CORE_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreResetP\8.0.103\rtl\vlog\core\coreresetp.v":135:20:135:42|Input SOFT_SDIF0_1_CORE_RESET is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder\CoreAHBLite_0\rtl\vlog\core\coreahblite.v":145:15:145:22|Input HPROT_M0 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder\CoreAHBLite_0\rtl\vlog\core\coreahblite.v":156:15:156:22|Input HPROT_M1 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder\CoreAHBLite_0\rtl\vlog\core\coreahblite.v":167:15:167:22|Input HPROT_M2 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\work\SystemBuilder\CoreAHBLite_0\rtl\vlog\core\coreahblite.v":178:15:178:22|Input HPROT_M3 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":63:18:63:26|Input HWDATA_M2 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":73:18:73:26|Input HWDATA_M3 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":77:18:77:26|Input HRDATA_S0 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":78:13:78:24|Input HREADYOUT_S0 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":79:13:79:20|Input HRESP_S0 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":101:18:101:26|Input HRDATA_S2 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":102:13:102:24|Input HREADYOUT_S2 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":103:13:103:20|Input HRESP_S2 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":113:18:113:26|Input HRDATA_S3 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":114:13:114:24|Input HREADYOUT_S3 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":115:13:115:20|Input HRESP_S3 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":125:18:125:26|Input HRDATA_S4 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":126:13:126:24|Input HREADYOUT_S4 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":127:13:127:20|Input HRESP_S4 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":137:18:137:26|Input HRDATA_S5 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":138:13:138:24|Input HREADYOUT_S5 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":139:13:139:20|Input HRESP_S5 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":149:18:149:26|Input HRDATA_S6 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":150:13:150:24|Input HREADYOUT_S6 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":151:13:151:20|Input HRESP_S6 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":161:18:161:26|Input HRDATA_S7 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":162:13:162:24|Input HREADYOUT_S7 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":163:13:163:20|Input HRESP_S7 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":173:18:173:26|Input HRDATA_S8 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":174:13:174:24|Input HREADYOUT_S8 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":175:13:175:20|Input HRESP_S8 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":185:18:185:26|Input HRDATA_S9 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":186:13:186:24|Input HREADYOUT_S9 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":187:13:187:20|Input HRESP_S9 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":197:18:197:27|Input HRDATA_S10 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":198:13:198:25|Input HREADYOUT_S10 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":199:13:199:21|Input HRESP_S10 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":209:18:209:27|Input HRDATA_S11 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":210:13:210:25|Input HREADYOUT_S11 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":211:13:211:21|Input HRESP_S11 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":221:18:221:27|Input HRDATA_S12 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":222:13:222:25|Input HREADYOUT_S12 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":223:13:223:21|Input HRESP_S12 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":233:18:233:27|Input HRDATA_S13 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":234:13:234:25|Input HREADYOUT_S13 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":235:13:235:21|Input HRESP_S13 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":245:18:245:27|Input HRDATA_S14 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":246:13:246:25|Input HREADYOUT_S14 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":247:13:247:21|Input HRESP_S14 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":257:18:257:27|Input HRDATA_S15 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":258:13:258:25|Input HREADYOUT_S15 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_matrix4x16.v":259:13:259:21|Input HRESP_S15 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_slavestage.v":39:15:39:33|Input MPREVDATASLAVEREADY is unused.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Trying to extract state machine for register arbRegSMCurrentState.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":43:16:43:25|Input SDATAREADY is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":44:16:44:21|Input SHRESP is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":54:16:54:24|Input HRDATA_S0 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":55:11:55:22|Input HREADYOUT_S0 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":56:16:56:24|Input HRDATA_S1 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":57:11:57:22|Input HREADYOUT_S1 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":58:16:58:24|Input HRDATA_S2 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":59:11:59:22|Input HREADYOUT_S2 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":60:16:60:24|Input HRDATA_S3 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":61:11:61:22|Input HREADYOUT_S3 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":62:16:62:24|Input HRDATA_S4 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":63:11:63:22|Input HREADYOUT_S4 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":64:16:64:24|Input HRDATA_S5 is unused.
@N: CL159 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CoreAHBLite\5.5.101\rtl\vlog\core\coreahblite_masterstage.v":65:11:65:22|Input HREADYOUT_S5 is unused.
@N: CL135 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\FF_FSM.v":57:4:57:9|Found sequential shift sync3 with address depth of 3 words and data bit width of 1.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\FF_FSM.v":187:4:187:9|Trying to extract state machine for register pres_state.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\FF_FSM.v":104:4:104:9|Trying to extract state machine for register mux_sel_state.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CORESYSSERVICES\3.2.102\rtl\vlog\core\CoreSysServices_FSMCtrl.v":326:3:326:8|Trying to extract state machine for register curr_state.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CORESYSSERVICES\3.2.102\rtl\vlog\core\CoreSysServices_CmdDec.v":3426:3:3426:8|Trying to extract state machine for register asynchevent_curr_state.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CORESYSSERVICES\3.2.102\rtl\vlog\core\CoreSysServices_CmdDec.v":3004:3:3004:8|Trying to extract state machine for register resp_curr_state.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CORESYSSERVICES\3.2.102\rtl\vlog\core\CoreSysServices_CmdDec.v":1970:3:1970:8|Trying to extract state machine for register req_curr_state.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CORESYSSERVICES\3.2.102\rtl\vlog\core\CoreSysServices_CmdDec.v":1640:3:1640:8|Trying to extract state machine for register main_curr_state.
@N: CL135 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\CORESYSSERVICES\3.2.102\rtl\vlog\core\CoreSysServices_UserIF.v":772:3:772:8|Found sequential shift zer_new_serv_d1 with address depth of 3 words and data bit width of 1.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\mem_apb_wrp.v":78:0:78:5|Trying to extract state machine for register fsm.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\COREAHBTOAPB3\3.2.101\rtl\vlog\core_obfuscated\coreahbtoapb3_penablescheduler.v":196:0:196:5|Trying to extract state machine for register CAHBtoAPB3lIl.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\component\Actel\DirectCore\COREAHBTOAPB3\3.2.101\rtl\vlog\core_obfuscated\coreahbtoapb3_ahbtoapbsm.v":690:0:690:5|Trying to extract state machine for register CAHBtoAPB3IOI.
@N: CL201 :"C:\tcl_update\igl2\ac412\AC412_IGL2_Flash_Freeze_Entry_Exit\Libero_Project\hdl\AHBMASTER_FIC.v":74:0:74:5|Trying to extract state machine for register ahb_fsm_current_state.
@N|Running in 64-bit mode

