Power Report for design top with the following settings:

Vendor: Microsemi Corporation
Program: Microsemi Libero Software, Release v12.6 (Version 12.900.20.24)
Copyright (C) 1989-
Date: Thu Mar 25 16:18:26 2021
Version: 3.0

Design: top
Family: IGLOO2
Die: M2GL010TS
Package: 484 FBGA
Temperature Range: COM
Voltage Range: COM
Operating Conditions: Typical
Operating Mode: Active
Process: Typical
Data Source: Production

Power Summary

Power (mW) Percentage
Total Power 78.509 100.0%
Static Power 12.569 16.0%
Dynamic Power 65.940 84.0%

Breakdown by Rail

Power (mW) Voltage (V) Current (mA)
Rail VDD 41.075 1.200 34.229
Rail VDDI 2.5 10.308 2.500 4.123
Rail CCC_NE1_PLL_VDDA 9.000 3.300 2.727
Rail MDDR_PLL_VDDA 5.000 3.300 1.515
Rail VPP 13.125 2.500 5.250

Breakdown by Clock

Power (mW) Percentage
AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/wclk:Y (clocks) 0.000 0.0%
AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/wclk:Y (register outputs) 0.000 0.0%
AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/wclk:Y (primary inputs) 0.000 0.0%
AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/wclk:Y (combinational outputs) 0.000 0.0%
AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/wclk:Y (set/reset nets) 0.000 0.0%
AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/rclk:Y (clocks) 0.000 0.0%
AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/rclk:Y (register outputs) 0.000 0.0%
AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/rclk:Y (primary inputs) 0.000 0.0%
AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/rclk:Y (combinational outputs) 0.000 0.0%
AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/rclk:Y (set/reset nets) 0.000 0.0%
SystemBuilder_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 (clocks) 25.105 70.2%
SystemBuilder_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 (register outputs) 1.201 3.4%
SystemBuilder_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 (primary inputs) 0.000 0.0%
SystemBuilder_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 (combinational outputs) 7.894 22.1%
SystemBuilder_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 (set/reset nets) 0.000 0.0%
SystemBuilder_0/FABOSC_0/I_RCOSC_25_50MHZ/U0:CLKOUT (clocks) 0.429 1.2%
SystemBuilder_0/FABOSC_0/I_RCOSC_25_50MHZ/U0:CLKOUT (register outputs) 0.046 0.1%
SystemBuilder_0/FABOSC_0/I_RCOSC_25_50MHZ/U0:CLKOUT (primary inputs) 0.000 0.0%
SystemBuilder_0/FABOSC_0/I_RCOSC_25_50MHZ/U0:CLKOUT (combinational outputs) 0.336 0.9%
SystemBuilder_0/FABOSC_0/I_RCOSC_25_50MHZ/U0:CLKOUT (set/reset nets) 0.000 0.0%
Input to Output 0.764 2.1%

Breakdown by Type

Power (mW) Percentage
Type Net 2.724 3.5%
Type Gate 12.962 16.5%
Type I/O 6.658 8.5%
Type Memory 0.002 0.0%
Type Core Static 8.262 10.5%
Type Banks Static 3.682 4.7%
Type VPP Static 0.625 0.8%
Type Built-in Blocks 43.594 55.5%