Microsemi Corporation - Microsemi Libero Software Release v12.6 (Version 12.900.20.24)
Date: Wed Mar 31 12:55:30 2021
| From | GB Location | Net Name | Fanout | |
|---|---|---|---|---|
| 1 | GB[2] | (220, 54) | SystemBuilder_0/CCC_0/GL0_INST/U0_YNn | 637 |
| 2 | GB[7] | (225, 54) | SystemBuilder_0/CORERESETP_0/INIT_DONE_int_rep_RNIBUK4/U0_YNn | 492 |
| 3 | GB[1] | (219, 54) | SystemBuilder_0/CORERESETP_0/MSS_HPMS_READY_int_rep_RNIG635/U0_YNn | 109 |
| 4 | GB[0] | (218, 54) | SystemBuilder_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YNn | 26 |
| 5 | GB[5] | (223, 54) | SystemBuilder_0/CORERESETP_0/sm0_areset_n_q2_RNI45P/U0_YNn | 21 |
| 6 | GB[3] | (221, 54) | SystemBuilder_0/CORERESETP_0/sdif0_areset_n_RNI8567/U0_YNn | 12 |
| 7 | GB[6] | (224, 54) | AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/rclk_RNINKRC/U0_YNn_GSouth | 3 |
(none)
| From | From Location | To | Net Name | Net Type | Fanout | |
|---|---|---|---|---|---|---|
| 1 | SystemBuilder_0/CORERESETP_0/INIT_DONE_int_rep:Q | (262, 58) | GB[7] | SystemBuilder_0/CORERESETP_0/INIT_DONE_int_rep_Z | ROUTED | 1 |
| 2 | SystemBuilder_0/CORERESETP_0/MSS_HPMS_READY_int_rep:Q | (304, 61) | GB[1] | SystemBuilder_0/CORERESETP_0/MSS_HPMS_READY_int_rep_Z | ROUTED | 1 |
| 3 | SystemBuilder_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT | (397, 92) | GB[0] | SystemBuilder_0/FABOSC_0/N_RCOSC_25_50MHZ_CLKINT | ROUTED | 1 |
| 4 | SystemBuilder_0/CORERESETP_0/sm0_areset_n_q2:Q | (239, 58) | GB[5] | SystemBuilder_0/CORERESETP_0/sm0_areset_n_q2_0 | ROUTED | 1 |
| 5 | SystemBuilder_0/CORERESETP_0/sdif0_areset_n:Y | (305, 60) | GB[3] | SystemBuilder_0/CORERESETP_0/sm0_areset_n | ROUTED | 1 |
| 6 | AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/rclk:Y | (7, 45) | GB[6] | AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/rclk_Z | ROUTED | 1 |
| From | From Location | Pin Swapped for Back Annotation Only | To | Net Name | Net Type | Fanout | |
|---|---|---|---|---|---|---|---|
| 1 | SystemBuilder_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 | CCC-NE1 (390, 92) | GL0 => GL2 | GB[2] | SystemBuilder_0/CCC_0/GL0_net | HARDWIRED | 1 |
| From | From Location | To (Pin Swapped for Back Annotation Only) | CCC Location | Net Name | Net Type | Fanout | |
|---|---|---|---|---|---|---|---|
| 1 | SystemBuilder_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT | (396, 92) | SystemBuilder_0/CCC_0/CCC_INST/INST_CCC_IP:RCOSC_25_50MHZ | CCC-NE1 (390, 92) | SystemBuilder_0/FABOSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC | HARDWIRED | 2 |
(none)
| From | From Location | Net Name | Fanout | RGB Location | Local Fanout | ||
|---|---|---|---|---|---|---|---|
| 1 | GB[2] | (220, 54) | SystemBuilder_0/CCC_0/GL0_INST/U0_YNn | 637 | 1 | (218, 60) | 13 |
| 2 | (218, 63) | 2 | |||||
| 3 | (218, 102) | 1 | |||||
| 4 | (219, 57) | 96 | |||||
| 2 | GB[7] | (225, 54) | SystemBuilder_0/CORERESETP_0/INIT_DONE_int_rep_RNIBUK4/U0_YNn | 492 | 1 | (219, 60) | 7 |
| 2 | (222, 57) | 50 | |||||
| 3 | GB[1] | (219, 54) | SystemBuilder_0/CORERESETP_0/MSS_HPMS_READY_int_rep_RNIG635/U0_YNn | 109 | (220, 57) | 23 | |
| 4 | GB[0] | (218, 54) | SystemBuilder_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YNn | 26 | 1 | (218, 84) | 11 |
| 2 | (221, 57) | 15 | |||||
| 5 | GB[5] | (223, 54) | SystemBuilder_0/CORERESETP_0/sm0_areset_n_q2_RNI45P/U0_YNn | 21 | (223, 57) | 21 | |
| 6 | GB[3] | (221, 54) | SystemBuilder_0/CORERESETP_0/sdif0_areset_n_RNI8567/U0_YNn | 12 | (218, 57) | 12 | |
| 7 | GB[6] | (224, 54) | AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/rclk_RNINKRC/U0_YNn_GSouth | 3 | (219, 45) | 3 |
The following clocks are routed using regular routing resources instead of dedicated global resources. Clocks using regular routing are more susceptible to noise than those using dedicated global resources. Microchip recommends promoting these signals to dedicated global resources.
| From | Driving Net | To | |
|---|---|---|---|
| 1 | AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0/wclk:Y | AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/mux_blk_0_wclk | AHBMASTER_FIC_RAM_0/RAM_with_wrapper_0/SRAM_64x8_0/RAM_with_wrapper_SRAM_64x8_0_TPSRAM_R0C0/FF_24:CLK |