

##### START OF TIMING REPORT #####[
# Timing Report written on Thu Nov 15 17:47:36 2012
#


Top view:               UART_MSS
Operating conditions:   smartfusion.COMWC-2
Requested Frequency:    100.0 MHz
Wire load mode:         top
Wire load model:        smartfusion
Paths requested:        5
Constraint File(s):    
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.

@N: MT322 |Clock constraints cover only FF-to-FF paths associated with the clock.



Performance Summary 
*******************


Worst slack in design: 0.192

                   Requested     Estimated     Requested     Estimated               Clock      Clock          
Starting Clock     Frequency     Frequency     Period        Period        Slack     Type       Group          
---------------------------------------------------------------------------------------------------------------
System             100.0 MHz     213.3 MHz     10.000        4.688         5.312     system     system_clkgroup
===============================================================================================================



Clock Relationships
*******************

Clocks            |    rise  to  rise   |    fall  to  fall   |    rise  to  fall   |    fall  to  rise 
--------------------------------------------------------------------------------------------------------
Starting  Ending  |  constraint  slack  |  constraint  slack  |  constraint  slack  |  constraint  slack
--------------------------------------------------------------------------------------------------------
System    System  |  0.000       0.192  |  No paths    -      |  No paths    -      |  No paths    -    
========================================================================================================
 Note: 'No paths' indicates there are no paths in the design for that pair of clock edges.
       'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups.



Interface Information 
*********************

No IO constraint found



====================================
Detailed Report for Clock: System
====================================



Starting Points with Worst Slack
********************************

                      Starting                                                       Arrival          
Instance              Reference     Type        Pin        Net                       Time        Slack
                      Clock                                                                           
------------------------------------------------------------------------------------------------------
MSS_ADLIB_INST        System        MSS_APB     EMCCLK     MSS_ADLIB_INST_EMCCLK     0.000       0.274
MSS_CCC_0.I_RCOSC     System        RCOSC       CLKOUT     N_CLKA_RCOSC              0.000       4.688
======================================================================================================


Ending Points with Worst Slack
******************************

                   Starting                                                          Required          
Instance           Reference     Type        Pin           Net                       Time         Slack
                   Clock                                                                               
-------------------------------------------------------------------------------------------------------
MSS_ADLIB_INST     System        MSS_APB     EMCCLKRTN     MSS_ADLIB_INST_EMCCLK     0.000        0.192
MSS_ADLIB_INST     System        MSS_APB     FCLK          MSS_ADLIB_INST_FCLK       0.000        4.524
=======================================================================================================



Worst Path Information
***********************


Path information for path number 1: 
    Propagation time:                        0.192
    + Clock delay at starting point:         0.000 (ideal)
-0.000
    - Requested Period:                      0.000
    - Hold time:                             0.000
    - Clock delay at ending point:           0.000 (ideal)
0.000
    = Slack (critical) :                     0.192

    Number of logic level(s):                0
    Starting point:                          MSS_ADLIB_INST / EMCCLK
    Ending point:                            MSS_ADLIB_INST / EMCCLKRTN
    The start point is clocked by            System [rising]
    The end   point is clocked by            System [rising]

Instance / Net                        Pin           Pin               Arrival     No. of    
Name                      Type        Name          Dir     Delay     Time        Fan Out(s)
--------------------------------------------------------------------------------------------
MSS_ADLIB_INST            MSS_APB     EMCCLK        Out     0.000     0.000       -         
MSS_ADLIB_INST_EMCCLK     Net         -             -       0.192     -           1         
MSS_ADLIB_INST            MSS_APB     EMCCLKRTN     In      -         0.192       -         
============================================================================================



##### END OF TIMING REPORT #####]

