C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\bin\m_proasic.exe  -prodtype synplify_pro -encrypt  -pro  -rundir  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis  -part A2F200M3F  -package FBGA484  -grade -1   -globalthreshold 50 -maxfan 24 -opcond COMWC     -report_path 0       -summaryfile C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\synlog\report\SF_UART_fpga_mapper.xml -top_level_module  SF_UART  -flow mapping  -mp 1 -prjfile  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\scratchproject.prs  -implementation synthesis -licensetype  synplifypro_actel  -oedif  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.edn  -freq 100.000  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\synwork\SF_UART_premap.srd  -sap  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.sap  -otap  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.tap  -omap  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.map  -devicelib  C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.v  -sap  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.sap  -ologparam  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\syntmp\SF_UART.plg  -osyn  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.srm  -prjdir  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\  -prjname  SF_UART_syn  -log  C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\synlog\SF_UART_fpga_mapper.srr 
rc:1 success:1
C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\scratchproject.prs|o|1353311732|2148
C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.edn|o|1353311945|98761
C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\synwork\SF_UART_premap.srd|i|1353311943|11725
C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.sap|o|1353311943|87
C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.tap|o|0|0
C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.map|o|1353311945|28
C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.v|i|1339996216|72817
C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.sap|o|1353311943|87
C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\syntmp\SF_UART.plg|o|1353311945|664
C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\SF_UART.srm|o|1353311944|199775
C:\SF_UART_LiberoSC_DF\EVAL_KIT\UART_Libero_SC\SF_UART\synthesis\synlog\SF_UART_fpga_mapper.srr|o|1353311945|11124
C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\bin\m_proasic.exe|i|1340167048|13099520
C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\bin64\m_proasic.exe|i|1340167062|15745024
