<?xml version="1.0" encoding="ISO-8859-1" ?>
<?xml-stylesheet type="text/xsl" href="datasheet.xsl"?>
<datasheet>
  <header>SmartFusion_UART</header>
  <project-settings>
    <fam>SmartFusion</fam>
    <die>A2F500M3G</die>
    <package>484 FBGA</package>
    <speed-grade>-1</speed-grade>
    <voltage>1.5</voltage>
    <hdl-type>Verilog</hdl-type>
    <project-description>
    </project-description>
    <location>C:/SF_UART_LiberoSC_DF/DEV_KIT/UART_Libero_SC/SmartFusion_UART/component/work/SmartFusion_UART</location>
    <state>GENERATED ( Mon Nov 19 14:10:16 2012 )</state>
    <swide-toolchain>SoftConsole workspace generated to C:\SF_UART_LiberoSC_DF\DEV_KIT\UART_Libero_SC\SmartFusion_UART\SoftConsole</swide-toolchain>
  </project-settings>
  <site-map>
  </site-map>
  <fileset>
    <name>HDL File(s)</name>
    <file>C:\SF_UART_LiberoSC_DF\DEV_KIT\UART_Libero_SC\SmartFusion_UART\component\Actel\SmartFusionMSS\MSS\2.5.106\mss_comps.v</file>
    <file>C:\SF_UART_LiberoSC_DF\DEV_KIT\UART_Libero_SC\SmartFusion_UART\component\work\SmartFusion_UART\SmartFusion_UART.v</file>
    <file>C:\SF_UART_LiberoSC_DF\DEV_KIT\UART_Libero_SC\SmartFusion_UART\component\work\SmartFusion_UART_MSS\MSS_CCC_0\SmartFusion_UART_MSS_tmp_MSS_CCC_0_MSS_CCC.v</file>
    <file>C:\SF_UART_LiberoSC_DF\DEV_KIT\UART_Libero_SC\SmartFusion_UART\component\work\SmartFusion_UART_MSS\mss_tshell.v</file>
    <file>C:\SF_UART_LiberoSC_DF\DEV_KIT\UART_Libero_SC\SmartFusion_UART\component\work\SmartFusion_UART_MSS\SmartFusion_UART_MSS.v</file>
  </fileset>
  <fileset>
    <name>Flash Memory File(s)</name>
    <file>C:\SF_UART_LiberoSC_DF\DEV_KIT\UART_Libero_SC\SmartFusion_UART\component\work\C:/SF_UART_LiberoSC_DF/DEV_KIT/UART_Libero_SC/SmartFusion_UART/component/work/SmartFusion_UART_MSS/MSS_ENVM_0/MSS_ENVM_0.efc</file>
  </fileset>
  <io>
    <port-name>UART_0_RXD</port-name>
    <direction>IN</direction>
    <pin-number>U18</pin-number>
    <io-standard>LVTTL</io-standard>
  </io>
  <io>
    <port-name>MSS_RESET_N</port-name>
    <direction>IN</direction>
    <pin-number>R1</pin-number>
    <io-standard>LVTTL</io-standard>
  </io>
  <io>
    <port-name>UART_0_TXD</port-name>
    <direction>OUT</direction>
    <pin-number>Y22</pin-number>
    <io-standard>LVTTL</io-standard>
  </io>
  <core type="ComponentModule">
    <core-type>ComponentModule</core-type>
    <core-exttype>HierSpiritDesign</core-exttype>
    <core-location>C:/SF_UART_LiberoSC_DF/DEV_KIT/UART_Libero_SC/SmartFusion_UART/component/work/SmartFusion_UART_MSS</core-location>
    <core-name>SmartFusion_UART_MSS_0</core-name>
  </core>
  <firmware_core type="FirmWareModule">
    <core-exttype>IP</core-exttype>
    <core-type>FirmWareModule</core-type>
    <core-vendor>Actel</core-vendor>
    <core-lib>Firmware</core-lib>
    <core-intname>HAL</core-intname>
    <core-ver>2.2.102</core-ver>
    <core-desc>The Hardware Abstraction Layer is used by drivers to access the hardware. It also allows the control of interrupts. The HAL is normally required when using bare metal drivers as part of your application.</core-desc>
    <core-param>
      <param-name>Memory Model:</param-name>
      <param-value>Small</param-value>
      <param-hdlname>MemoryModel</param-hdlname>
      <param-hdlvalue>0</param-hdlvalue>
      <param-tag>actel-cc:variantParameter</param-tag>
    </core-param>
    <core-param>
      <param-name>Processor:</param-name>
      <param-value>Cortex-M3</param-value>
      <param-hdlname>Processor</param-hdlname>
      <param-hdlvalue>0</param-hdlvalue>
      <param-tag>actel-cc:variantParameter</param-tag>
    </core-param>
    <core-param>
      <param-name>Software Tool Chain:</param-name>
      <param-value>SoftConsole</param-value>
      <param-hdlname>ToolChain</param-hdlname>
      <param-hdlvalue>0</param-hdlvalue>
      <param-tag>actel-cc:variantParameter</param-tag>
    </core-param>
    <core-name>HAL_0</core-name>
  </firmware_core>
  <firmware_core type="FirmWareModule">
    <core-exttype>IP</core-exttype>
    <core-type>FirmWareModule</core-type>
    <core-vendor>Actel</core-vendor>
    <core-lib>Firmware</core-lib>
    <core-intname>MSS_UART_Driver</core-intname>
    <core-ver>2.3.101</core-ver>
    <core-desc>SmartFusion microcontroller subsystem (MSS) UART bare metal software driver.

This driver requires the SmartFusion CMSIS-PAL to build correctly.</core-desc>
    <core-name>MSS_UART_Driver_0</core-name>
  </firmware_core>
  <firmware_core type="FirmWareModule">
    <core-exttype>IP</core-exttype>
    <core-type>FirmWareModule</core-type>
    <core-vendor>Actel</core-vendor>
    <core-lib>Firmware</core-lib>
    <core-intname>SmartFusion_CMSIS_PAL</core-intname>
    <core-ver>2.3.103</core-ver>
    <core-desc>SmartFusion Cortex Microcontroller Software Interface Standard - Peripheral Access Layer (CMSIS-PAL).

The CMSIS provides:
- startup code.
- standard naming for exception and interrupt handlers.
- standard functions for controlling the Cortex-M3 Nested Vectored Interrupt Controller (NVIC).
- peripherals registers description.

These files are required by the SmartFusion bare metal peripheral drivers to build correctly.</core-desc>
    <core-param>
      <param-name>Software Tool Chain</param-name>
      <param-value>SoftConsole</param-value>
      <param-hdlname>ToolChain</param-hdlname>
      <param-hdlvalue>0</param-hdlvalue>
      <param-tag>actel-cc:variantParameter</param-tag>
    </core-param>
    <core-name>SmartFusion_CMSIS_PAL_0</core-name>
  </firmware_core>
  <memorysystem>
    <title>Memory Map for SmartFusion_UART</title>
    <description>The project contains the following subsystems:</description>
    <subsystems>
      <subsystem>
        <name>MSS_CM3_0</name>
        <master>MSS_CM3_0</master>
        <addressNames>
          <count>1</count>
          <name>
          </name>
        </addressNames>
        <slave>
          <name>SYSREG</name>
          <remapAddress>0xE0042000</remapAddress>
          <fullAddressSpace>0xE0042000 - 0xE0042FFF</fullAddressSpace>
          <range>0x1000</range>
          <memoryMap>
            <name>RegisterMap</name>
            <addressBlock>
              <baseAddress>0x0</baseAddress>
              <range format="long">0x1000</range>
              <width format="long" id="width">32</width>
              <register>
                <name>ESRAM_CONFIG</name>
                <addressOffset>0x0</addressOffset>
                <absoluteAddress>0xE0042000</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>F2_ESRAMSIZE</name>
                  <bitNumber>4:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_TESTESRAM1REMAP_SYNC</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_TESTREMAPENABLE_SYNC</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>COM_ESRAMFWREMAP</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_CONFIG</name>
                <addressOffset>0x4</addressOffset>
                <absoluteAddress>0xE0042004</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ENVM_SIX_CYCLE</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ENVM_PIPE_BYPASS</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_ENVMPOWEREDDOWN</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>COM_ENVMREMAPSIZE</name>
                  <bitNumber>4:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_REMAP_BASE</name>
                <addressOffset>0x8</addressOffset>
                <absoluteAddress>0xE0042008</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>COM_ENVMREMAPBASE</name>
                  <bitNumber>19:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_FAB_REMAP</name>
                <addressOffset>0xC</addressOffset>
                <absoluteAddress>0xE004200C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>COM_ENVMFABREMAPBASE</name>
                  <bitNumber>19:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FAB_PROT_SIZE</name>
                <addressOffset>0x10</addressOffset>
                <absoluteAddress>0xE0042010</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>COM_PROTREGIONSIZE</name>
                  <bitNumber>4:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FAB_PROT_BASE</name>
                <addressOffset>0x14</addressOffset>
                <absoluteAddress>0xE0042014</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>COM_PROTREGIONBASE</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATRIX_CONFIG</name>
                <addressOffset>0x18</addressOffset>
                <absoluteAddress>0xE0042018</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>COM_WEIGHTEDMODE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>COM_MASTERENABLE</name>
                  <bitNumber>2:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DSS_STATUS</name>
                <addressOffset>0x1C</addressOffset>
                <absoluteAddress>0xE004201C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>PLLLOCKLOSTINT</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PLLLOCKINT</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>COM_ERRORSTATUS</name>
                  <bitNumber>8:4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT3_3VINT</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT1_5VINT</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>WDOGTIMEOUTEVENT</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCMATCHEVENT</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CLR_DSS_STATUS</name>
                <addressOffset>0x20</addressOffset>
                <absoluteAddress>0xE0042020</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CLRPLLLOCKLOSTINT</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CLRPLLLOCKINT</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>COM_CLEARSTATUS</name>
                  <bitNumber>8:4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CLRBROWNOUT3_3VINT</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CLRBROWNOUT1_5VINT</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CLRWDOGTIMEOUTEVENT</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CLRRTCMATCHEVENT</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FROM_CONFIG</name>
                <addressOffset>0x24</addressOffset>
                <absoluteAddress>0xE0042024</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SYS_TOPT</name>
                  <bitNumber>3:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>IAP_CONFIG</name>
                <addressOffset>0x28</addressOffset>
                <absoluteAddress>0xE0042028</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SYS_FCFG</name>
                  <bitNumber>2:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>SOFT_INTERRUPT</name>
                <addressOffset>0x2C</addressOffset>
                <absoluteAddress>0xE004202C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SOFTINTERRUPT</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>SOFT_RESET</name>
                <addressOffset>0x30</addressOffset>
                <absoluteAddress>0xE0042030</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>PADRESETENABLE</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USERRESETACTIVE</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FPGA_SOFTRESET</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EXT_SOFTRESET</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>IAP_SOFTRESET</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>GPIO_SOFTRESET</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ACE_SOFTRESET</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C1_SOFTRESET</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C0_SOFTRESET</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPI1_SOFTRESET</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPI0_SOFTRESET</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>UART1_SOFTRESET</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>UART0_SOFTRESET</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIMER_SOFTRESET</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PDMA_SOFTRESET</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_SOFTRESET</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EMC_SOFTRESET</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_SOFTRESET</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_SOFTRESET</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ENVM_SOFTRESET</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DEVICE_STATUS</name>
                <addressOffset>0x34</addressOffset>
                <absoluteAddress>0xE0042034</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>FPGAGOOD_SYNC</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FPGAPROGRAMMING_SYNC</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_PC_ACCESS_SYNC</name>
                  <bitNumber>4:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VCCIBGOOD_SYNC</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT3_3V_SYNCN</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT1_5V_SYNCN</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>SYSTICK_CONFIG</name>
                <addressOffset>0x38</addressOffset>
                <absoluteAddress>0xE0042038</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>STCLK_DIVISOR</name>
                  <bitNumber>29:28</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>STCALIB</name>
                  <bitNumber>25:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>EM_MUX_CONFIG</name>
                <addressOffset>0x3C</addressOffset>
                <absoluteAddress>0xE004203C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>EM_SEL</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>EM_CONFIG_0</name>
                <addressOffset>0x40</addressOffset>
                <absoluteAddress>0xE0042040</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>EM_CSFE0</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_WENBEN0</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RWPOL0</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PIPEWRN0</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PIPERDN0</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_IDD0</name>
                  <bitNumber>16:15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_WRITELAT0</name>
                  <bitNumber>14:11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RDLATREST0</name>
                  <bitNumber>10:7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RDLATFIRST0</name>
                  <bitNumber>6:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PORTSIZE0</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_MEMTYPE0</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>EM_CONFIG_1</name>
                <addressOffset>0x44</addressOffset>
                <absoluteAddress>0xE0042044</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>EM_CSFE1</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_WENBEN1</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RWPOL1</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PIPEWRN1</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PIPERDN1</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_IDD1</name>
                  <bitNumber>16:15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_WRITELAT1</name>
                  <bitNumber>14:11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RDLATREST1</name>
                  <bitNumber>10:7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RDLATFIRST1</name>
                  <bitNumber>6:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PORTSIZE1</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_MEMTYPE1</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CLK_CTRL</name>
                <addressOffset>0x48</addressOffset>
                <absoluteAddress>0xE0042048</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>GLBDIVISOR</name>
                  <bitNumber>13:12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCIF_ACMDIVISOR</name>
                  <bitNumber>11:8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ACLKDIVISOR</name>
                  <bitNumber>7:6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PCLK1DIVISOR</name>
                  <bitNumber>5:4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PCLK0DIVISOR</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RMIICLKSEL</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CCC_DIV_CONFIG</name>
                <addressOffset>0x4C</addressOffset>
                <absoluteAddress>0xE004204C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>OCDIVRST</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIVHALF</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIV4</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIV3</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIV2</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIV1</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIV0</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIVRST</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIVHALF</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIV4</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIV3</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIV2</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIV1</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIV0</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIVRST</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIVHALF</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIV4</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIV3</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIV2</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIV1</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIV0</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CCC_MUX_CONFIG</name>
                <addressOffset>0x50</addressOffset>
                <absoluteAddress>0xE0042050</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MODE</name>
                  <bitNumber>31:30</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EN</name>
                  <bitNumber>29</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>GLMUXCFG1</name>
                  <bitNumber>27</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>GLMUXCFG0</name>
                  <bitNumber>26</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>GLMUXSEL1</name>
                  <bitNumber>25</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>GLMUXSEL0</name>
                  <bitNumber>24</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BYPASS_PLL3</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCMUX2</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCMUX1</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCMUX0</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DYNCSEL</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RXCSEL</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>STATCSEL</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BYPASS_PLL2</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBMUX2</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBMUX1</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBMUX0</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DYNBSEL</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RXBSEL</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>STATBSEL</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BYPASS_PLL1</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OAMUX2</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OAMUX1</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OAMUX0</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DYNASEL</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RXASEL</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>STATASEL</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CCC_PLL_CONFIG</name>
                <addressOffset>0x54</addressOffset>
                <absoluteAddress>0xE0042054</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>POWERDOWN</name>
                  <bitNumber>31</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VCOSEL2</name>
                  <bitNumber>24</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VCOSEL1</name>
                  <bitNumber>23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VCOSEL0</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>XDLYSEL</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDLY4</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDLY3</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDLY2</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDLY1</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDLY0</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBSEL1</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBSEL0</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV6</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV5</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV4</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV3</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV2</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV1</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV0</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV6</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV5</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV4</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV3</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV2</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV1</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV0</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CCC_DLY_CONFIG</name>
                <addressOffset>0x58</addressOffset>
                <absoluteAddress>0xE0042058</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DLYA14</name>
                  <bitNumber>24</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA13</name>
                  <bitNumber>23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA12</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA11</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA10</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA04</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA03</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA02</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA01</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA00</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCC4</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCC3</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCC2</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCC1</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCC0</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCB4</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCB3</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCB2</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCB1</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCB0</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCA4</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCA3</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCA2</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCA1</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCA0</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CCC_STATUS</name>
                <addressOffset>0x5C</addressOffset>
                <absoluteAddress>0xE004205C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>PLLLOCK_SYNC</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>VTG_CTRL</name>
                <addressOffset>0x64</addressOffset>
                <absoluteAddress>0xE0042064</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>BGPSMENABLE</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VBATSELECT</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCIF_CLRPUBINT</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCIF_VRONENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCIF_FWVRON</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FAB_IF</name>
                <addressOffset>0x6C</addressOffset>
                <absoluteAddress>0xE004206C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>FABCALIBFAIL</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FABCALIBSTART</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_LARGE_CT_XS</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB_APB32</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB_AHBIF</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_AHBCAPABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB_AHB_BYPASS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>APB_EXTN</name>
                <addressOffset>0x70</addressOffset>
                <absoluteAddress>0xE0042070</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>APB16_XHOLD</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>LOOPBACK_CTRL</name>
                <addressOffset>0x74</addressOffset>
                <absoluteAddress>0xE0042074</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DSS_EMACLOOPBACK</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPIOLOOPBACK</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_I2CLOOPBACK</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_SPILOOPBACK</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_UARTLOOPBACK</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>IO_BANK_CONFIG</name>
                <addressOffset>0x78</addressOffset>
                <absoluteAddress>0xE0042078</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>BTWEST</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BTEAST</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>GPIN_SRC_SEL</name>
                <addressOffset>0x7C</addressOffset>
                <absoluteAddress>0xE004207C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DSS_GPINSOURCE[15]</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[14]</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[13]</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[12]</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[11]</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[10]</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[9]</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[8]</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[7]</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[6]</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[5]</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[4]</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[3]</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[2]</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[1]</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[0]</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
            </addressBlock>
          </memoryMap>
        </slave>
        <slave>
          <name>External_Memory_Type_1</name>
          <remapAddress>0x74000000</remapAddress>
          <fullAddressSpace>0x74000000 - 0x77FFFFFF</fullAddressSpace>
          <range>0x4000000</range>
        </slave>
        <slave>
          <name>External_Memory_Type_0</name>
          <remapAddress>0x70000000</remapAddress>
          <fullAddressSpace>0x70000000 - 0x73FFFFFF</fullAddressSpace>
          <range>0x4000000</range>
        </slave>
        <slave>
          <name>ENVM_USER_DATA_SPARE</name>
          <remapAddress>0x60088000</remapAddress>
          <fullAddressSpace>0x60088000 - 0x600881FF</fullAddressSpace>
          <range>0x200</range>
        </slave>
        <slave>
          <name>ENVM_USER_DATA</name>
          <remapAddress>0x60084000</remapAddress>
          <fullAddressSpace>0x60084000 - 0x60087FFF</fullAddressSpace>
          <range>0x4000</range>
        </slave>
        <slave>
          <name>ENVM_SPARE_PAGE</name>
          <remapAddress>0x60080000</remapAddress>
          <fullAddressSpace>0x60080000 - 0x60083FFF</fullAddressSpace>
          <range>0x4000</range>
        </slave>
        <slave>
          <name>ENVM_ARRAY</name>
          <remapAddress>0x60000000</remapAddress>
          <fullAddressSpace>0x60000000 - 0x6007FFFF</fullAddressSpace>
          <range>0x80000</range>
        </slave>
        <slave>
          <name>FPGA_FABRIC_BACKDOOR</name>
          <remapAddress>0x40040000</remapAddress>
          <fullAddressSpace>0x40040000 - 0x4004FFFF</fullAddressSpace>
          <range>0x10000</range>
        </slave>
        <slave>
          <name>FROM</name>
          <remapAddress>0x40015000</remapAddress>
          <fullAddressSpace>0x40015000 - 0x40015FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>RTC</name>
          <remapAddress>0x40014000</remapAddress>
          <fullAddressSpace>0x40014000 - 0x40014FFF</fullAddressSpace>
          <range>0x1000</range>
          <memoryMap>
            <name>RegisterMap</name>
            <addressBlock>
              <baseAddress>0x0</baseAddress>
              <range format="long">0x1000</range>
              <width format="long" id="width">32</width>
              <register>
                <name>COUNTER0</name>
                <addressOffset>0x100</addressOffset>
                <absoluteAddress>0x40010100</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>COUNTER1</name>
                <addressOffset>0x104</addressOffset>
                <absoluteAddress>0x40010104</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>COUNTER2</name>
                <addressOffset>0x108</addressOffset>
                <absoluteAddress>0x40010108</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>COUNTER3</name>
                <addressOffset>0x10C</addressOffset>
                <absoluteAddress>0x4001010C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>COUNTER4</name>
                <addressOffset>0x110</addressOffset>
                <absoluteAddress>0x40010110</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATCHREG0</name>
                <addressOffset>0x120</addressOffset>
                <absoluteAddress>0x40010120</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATCHREG1</name>
                <addressOffset>0x124</addressOffset>
                <absoluteAddress>0x40010124</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATCHREG2</name>
                <addressOffset>0x128</addressOffset>
                <absoluteAddress>0x40010128</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATCHREG3</name>
                <addressOffset>0x12C</addressOffset>
                <absoluteAddress>0x4001012C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATCHREG4</name>
                <addressOffset>0x130</addressOffset>
                <absoluteAddress>0x40010130</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATCHBITS0</name>
                <addressOffset>0x140</addressOffset>
                <absoluteAddress>0x40010140</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATCHBITS1</name>
                <addressOffset>0x144</addressOffset>
                <absoluteAddress>0x40010144</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATCHBITS2</name>
                <addressOffset>0x148</addressOffset>
                <absoluteAddress>0x40010148</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATCHBITS3</name>
                <addressOffset>0x14C</addressOffset>
                <absoluteAddress>0x4001014C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATCHBITS4</name>
                <addressOffset>0x150</addressOffset>
                <absoluteAddress>0x40010150</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>VALUE</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CTRL_STAT</name>
                <addressOffset>0x160</addressOffset>
                <absoluteAddress>0x40010160</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>RTM_RST</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CNTR_EN</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VR_EN_MAT</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>XT_MODE</name>
                  <bitNumber>4:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RST_CNT_OMAT</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RSTB_CNT</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>XTAL_EN</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
            </addressBlock>
          </memoryMap>
        </slave>
        <slave>
          <name>GPIO</name>
          <remapAddress>0x40013000</remapAddress>
          <fullAddressSpace>0x40013000 - 0x40013FFF</fullAddressSpace>
          <range>0x1000</range>
          <memoryMap>
            <name>RegisterMap</name>
            <addressBlock>
              <baseAddress>0x0</baseAddress>
              <range format="long">0x1000</range>
              <width format="long" id="width">32</width>
              <register>
                <name>CONFIG_0</name>
                <addressOffset>0x0</addressOffset>
                <absoluteAddress>0x40010000</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_1</name>
                <addressOffset>0x4</addressOffset>
                <absoluteAddress>0x40010004</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_2</name>
                <addressOffset>0x8</addressOffset>
                <absoluteAddress>0x40010008</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_3</name>
                <addressOffset>0xC</addressOffset>
                <absoluteAddress>0x4001000C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_4</name>
                <addressOffset>0x10</addressOffset>
                <absoluteAddress>0x40010010</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_5</name>
                <addressOffset>0x14</addressOffset>
                <absoluteAddress>0x40010014</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_6</name>
                <addressOffset>0x18</addressOffset>
                <absoluteAddress>0x40010018</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_7</name>
                <addressOffset>0x1C</addressOffset>
                <absoluteAddress>0x4001001C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_8</name>
                <addressOffset>0x20</addressOffset>
                <absoluteAddress>0x40010020</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_9</name>
                <addressOffset>0x24</addressOffset>
                <absoluteAddress>0x40010024</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_10</name>
                <addressOffset>0x28</addressOffset>
                <absoluteAddress>0x40010028</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_11</name>
                <addressOffset>0x2C</addressOffset>
                <absoluteAddress>0x4001002C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_12</name>
                <addressOffset>0x30</addressOffset>
                <absoluteAddress>0x40010030</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_13</name>
                <addressOffset>0x34</addressOffset>
                <absoluteAddress>0x40010034</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_14</name>
                <addressOffset>0x38</addressOffset>
                <absoluteAddress>0x40010038</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_15</name>
                <addressOffset>0x3C</addressOffset>
                <absoluteAddress>0x4001003C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_16</name>
                <addressOffset>0x40</addressOffset>
                <absoluteAddress>0x40010040</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_17</name>
                <addressOffset>0x44</addressOffset>
                <absoluteAddress>0x40010044</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_18</name>
                <addressOffset>0x48</addressOffset>
                <absoluteAddress>0x40010048</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_19</name>
                <addressOffset>0x4C</addressOffset>
                <absoluteAddress>0x4001004C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_20</name>
                <addressOffset>0x50</addressOffset>
                <absoluteAddress>0x40010050</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_21</name>
                <addressOffset>0x54</addressOffset>
                <absoluteAddress>0x40010054</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_22</name>
                <addressOffset>0x58</addressOffset>
                <absoluteAddress>0x40010058</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_23</name>
                <addressOffset>0x5C</addressOffset>
                <absoluteAddress>0x4001005C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_24</name>
                <addressOffset>0x60</addressOffset>
                <absoluteAddress>0x40010060</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_25</name>
                <addressOffset>0x64</addressOffset>
                <absoluteAddress>0x40010064</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_26</name>
                <addressOffset>0x68</addressOffset>
                <absoluteAddress>0x40010068</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_27</name>
                <addressOffset>0x6C</addressOffset>
                <absoluteAddress>0x4001006C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_28</name>
                <addressOffset>0x70</addressOffset>
                <absoluteAddress>0x40010070</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_29</name>
                <addressOffset>0x74</addressOffset>
                <absoluteAddress>0x40010074</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_30</name>
                <addressOffset>0x78</addressOffset>
                <absoluteAddress>0x40010078</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CONFIG_31</name>
                <addressOffset>0x7C</addressOffset>
                <absoluteAddress>0x4001007C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INTR_TYPE</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INTR_ENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_BUF_ENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>INP_REG_ENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT_REG_ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>GPIO_IRQ</name>
                <addressOffset>0x80</addressOffset>
                <absoluteAddress>0x40010080</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>IRQ</name>
                  <bitNumber>30:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>GPIO_IN</name>
                <addressOffset>0x84</addressOffset>
                <absoluteAddress>0x40010084</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>INPUT</name>
                  <bitNumber>30:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>GPIO_OUT</name>
                <addressOffset>0x88</addressOffset>
                <absoluteAddress>0x40010088</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>OUTPUT</name>
                  <bitNumber>30:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
            </addressBlock>
          </memoryMap>
        </slave>
        <slave>
          <name>H2FINTERRUPT</name>
          <remapAddress>0x40007000</remapAddress>
          <fullAddressSpace>0x40007000 - 0x40007FFF</fullAddressSpace>
          <range>0x1000</range>
          <memoryMap>
            <name>RegisterMap</name>
            <addressBlock>
              <baseAddress>0x0</baseAddress>
              <range format="long">0x1000</range>
              <width format="long" id="width">32</width>
              <register>
                <name>Interrupt0_Enable</name>
                <addressOffset>0x0</addressOffset>
                <absoluteAddress>0x40000000</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SOFTINTERRUPTENABLE</name>
                  <bitNumber>24</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PLLLOCKLOSTINTENABLE</name>
                  <bitNumber>23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PLLLOCKINTENABLE</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIMER2INTENABLE</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIMER1INTENABLE</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_SMBSUS1ENABLE</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_SMBALERT1ENABLE</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_INT1ENABLE</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_SMBSUS0ENABLE</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_SMBALERT0ENABLE</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_INT0ENABLE</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPIINT1ENABLE</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPIINT0ENABLE</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>UART1_INTRENABLE</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>UART0_INTRENABLE</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DMAINTERRUPTENABLE</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>HINT_OUT1ENABLE</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>HINT_OUT0ENABLE</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>IAP_INTRENABLE</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_INTENABLE</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCIF_PUBINT</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCMATCHEVENTENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT3_3VINTENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT1_5VINTENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>WDOGWAKEUPINTENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt1_Enable</name>
                <addressOffset>0x4</addressOffset>
                <absoluteAddress>0x40000004</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DSS_GPIO_INTENABLE</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt2_Enable</name>
                <addressOffset>0x8</addressOffset>
                <absoluteAddress>0x40000008</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_COMPINTENABLE</name>
                  <bitNumber>23:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt3_Enable</name>
                <addressOffset>0xC</addressOffset>
                <absoluteAddress>0x4000000C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_SSEGPINTENABLE</name>
                  <bitNumber>11:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt4_Enable</name>
                <addressOffset>0x10</addressOffset>
                <absoluteAddress>0x40000010</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_THRESHINTENABLE</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt5_Enable</name>
                <addressOffset>0x14</addressOffset>
                <absoluteAddress>0x40000014</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_ADCCONVINTENABLE</name>
                  <bitNumber>8:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt6_Enable</name>
                <addressOffset>0x18</addressOffset>
                <absoluteAddress>0x40000018</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_FIFOFULLINTENABLE</name>
                  <bitNumber>5:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt7_Enable</name>
                <addressOffset>0x1C</addressOffset>
                <absoluteAddress>0x4000001C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_FIFOEMPTYINTENABLE</name>
                  <bitNumber>2:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt0_Reason</name>
                <addressOffset>0x20</addressOffset>
                <absoluteAddress>0x40000020</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SOFTINTERRUPTENABLE</name>
                  <bitNumber>24</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PLLLOCKLOSTINTENABLE</name>
                  <bitNumber>23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PLLLOCKINTENABLE</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIMER2INTENABLE</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIMER1INTENABLE</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_SMBSUS1ENABLE</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_SMBALERT1ENABLE</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_INT1ENABLE</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_SMBSUS0ENABLE</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_SMBALERT0ENABLE</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C_INT0ENABLE</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPIINT1ENABLE</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPIINT0ENABLE</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>UART1_INTRENABLE</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>UART0_INTRENABLE</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DMAINTERRUPTENABLE</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>HINT_OUT1ENABLE</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>HINT_OUT0ENABLE</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>IAP_INTRENABLE</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_INTENABLE</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCIF_PUBINT</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCMATCHEVENTENABLE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT3_3VINTENABLE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT1_5VINTENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>WDOGWAKEUPINTENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt1_Reason</name>
                <addressOffset>0x24</addressOffset>
                <absoluteAddress>0x40000024</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DSS_GPIO_INTENABLE</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt2_Reason</name>
                <addressOffset>0x28</addressOffset>
                <absoluteAddress>0x40000028</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_COMPINTENABLE</name>
                  <bitNumber>23:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt3_Reason</name>
                <addressOffset>0x2C</addressOffset>
                <absoluteAddress>0x4000002C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_SSEGPINTENABLE</name>
                  <bitNumber>11:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt4_Reason</name>
                <addressOffset>0x30</addressOffset>
                <absoluteAddress>0x40000030</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_THRESHINTENABLE</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt5_Reason</name>
                <addressOffset>0x34</addressOffset>
                <absoluteAddress>0x40000034</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_ADCCONVINTENABLE</name>
                  <bitNumber>8:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt6_Reason</name>
                <addressOffset>0x38</addressOffset>
                <absoluteAddress>0x40000038</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_FIFOFULLINTENABLE</name>
                  <bitNumber>5:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>Interrupt7_Reason</name>
                <addressOffset>0x3C</addressOffset>
                <absoluteAddress>0x4000003C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ACE_FIFOEMPTYINTENABLE</name>
                  <bitNumber>2:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>InterruptMode</name>
                <addressOffset>0x40</addressOffset>
                <absoluteAddress>0x40000040</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>H2FINTMODE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
            </addressBlock>
          </memoryMap>
        </slave>
        <slave>
          <name>TIMER</name>
          <remapAddress>0x40005000</remapAddress>
          <fullAddressSpace>0x40005000 - 0x40005FFF</fullAddressSpace>
          <range>0x1000</range>
          <memoryMap>
            <name>RegisterMap</name>
            <addressBlock>
              <baseAddress>0x0</baseAddress>
              <range format="long">0x1000</range>
              <width format="long" id="width">32</width>
              <register>
                <name>TIM1VALUE</name>
                <addressOffset>0x0</addressOffset>
                <absoluteAddress>0x40000000</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM1VALUE</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIME1LOADVAL</name>
                <addressOffset>0x4</addressOffset>
                <absoluteAddress>0x40000004</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM1LOADVAL</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM1BGLOADVAL</name>
                <addressOffset>0x8</addressOffset>
                <absoluteAddress>0x40000008</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM1BGLOADVAL</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM1CONTROL</name>
                <addressOffset>0xC</addressOffset>
                <absoluteAddress>0x4000000C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM1INTEN</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIM1MODE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIM1ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM1RIS</name>
                <addressOffset>0x10</addressOffset>
                <absoluteAddress>0x40000010</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM1RIS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM1MIS</name>
                <addressOffset>0x14</addressOffset>
                <absoluteAddress>0x40000014</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM1MIS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM2VALUE</name>
                <addressOffset>0x18</addressOffset>
                <absoluteAddress>0x40000018</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM2VALUE</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM2LOADVAL</name>
                <addressOffset>0x1C</addressOffset>
                <absoluteAddress>0x4000001C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM2LOADVAL</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM2BGLOADVAL</name>
                <addressOffset>0x20</addressOffset>
                <absoluteAddress>0x40000020</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM2BGLOADVAL</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM2CONTROL</name>
                <addressOffset>0x24</addressOffset>
                <absoluteAddress>0x40000024</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM2INTEN</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIM2MODE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIM2ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM2RIS</name>
                <addressOffset>0x28</addressOffset>
                <absoluteAddress>0x40000028</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM2RIS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM2MIS</name>
                <addressOffset>0x2C</addressOffset>
                <absoluteAddress>0x4000002C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM2MIS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM64ValueU</name>
                <addressOffset>0x30</addressOffset>
                <absoluteAddress>0x40000030</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM64VALUEU</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM64ValueL</name>
                <addressOffset>0x34</addressOffset>
                <absoluteAddress>0x40000034</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM64VALUEL</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM64LOADVALU</name>
                <addressOffset>0x38</addressOffset>
                <absoluteAddress>0x40000038</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM64LOADVALU</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM64LOADVALL</name>
                <addressOffset>0x3C</addressOffset>
                <absoluteAddress>0x4000003C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM64LOADVALL</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM64BGLOADVALU</name>
                <addressOffset>0x40</addressOffset>
                <absoluteAddress>0x40000040</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM64BGLOADVALU</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM64BGLOADVALL</name>
                <addressOffset>0x44</addressOffset>
                <absoluteAddress>0x40000044</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM64BGLOADVALL</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM64CONTROL</name>
                <addressOffset>0x48</addressOffset>
                <absoluteAddress>0x40000048</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM64INTEN</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIM64MODECONTROL</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIM64ENABLE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM64RIS</name>
                <addressOffset>0x4C</addressOffset>
                <absoluteAddress>0x4000004C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM64RIS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM64MIS</name>
                <addressOffset>0x50</addressOffset>
                <absoluteAddress>0x40000050</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM64MIS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>TIM64MODE</name>
                <addressOffset>0x54</addressOffset>
                <absoluteAddress>0x40000054</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>TIM64MODE</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
            </addressBlock>
          </memoryMap>
        </slave>
        <slave>
          <name>DMA</name>
          <remapAddress>0x40004000</remapAddress>
          <fullAddressSpace>0x40004000 - 0x40004FFF</fullAddressSpace>
          <range>0x1000</range>
          <memoryMap>
            <name>RegisterMap</name>
            <addressBlock>
              <baseAddress>0x0</baseAddress>
              <range format="long">0x1000</range>
              <width format="long" id="width">32</width>
              <register>
                <name>RATIO_HIGH_LOW</name>
                <addressOffset>0x0</addressOffset>
                <absoluteAddress>0x40000000</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>Reserved</name>
                  <bitNumber>31:8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ratioHiLo</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>BUFFER_STATUS</name>
                <addressOffset>0x4</addressOffset>
                <absoluteAddress>0x40000004</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>Reserved</name>
                  <bitNumber>31:16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch7BufBComplete</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch7BufAComplete</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch6BufBComplete</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch6BufAComplete</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch5BufBComplete</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch5BufAComplete</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch4BufBComplete</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch4BufAComplete</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch3BufBComplete</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch3BufAComplete</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch2BufBComplete</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch2BufAComplete</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch1BufBComplete</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch1BufAComplete</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch0BufBComplete</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ch0BufAComplete</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL0_CONTROL</name>
                <addressOffset>0x20</addressOffset>
                <absoluteAddress>0x40000020</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>periphSelect</name>
                  <bitNumber>26:23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>Reserved</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channDestAddrInc</name>
                  <bitNumber>13:12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channSrcAddrInc</name>
                  <bitNumber>11:10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>portHiPriority</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneB</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneA</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelInterruptEnable</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelReset</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelPause</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelTransferSize</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelDirection</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>periphDMA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL0_STATUS</name>
                <addressOffset>0x24</addressOffset>
                <absoluteAddress>0x40000024</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>Reserved</name>
                  <bitNumber>31:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>bufferBSelect</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteB</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL0_BUFFERA_SRC_ADDR</name>
                <addressOffset>0x28</addressOffset>
                <absoluteAddress>0x40000028</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch0BufASourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL0_BUFFERA_DEST_ADDR</name>
                <addressOffset>0x2C</addressOffset>
                <absoluteAddress>0x4000002C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch0BufADestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL0_BUFFERA_XFER_COUNT</name>
                <addressOffset>0x30</addressOffset>
                <absoluteAddress>0x40000030</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch0BufATransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL0_BUFFERB_SRC_ADDR</name>
                <addressOffset>0x34</addressOffset>
                <absoluteAddress>0x40000034</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch0BufBSourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL0_BUFFERB_DEST_ADDR</name>
                <addressOffset>0x38</addressOffset>
                <absoluteAddress>0x40000038</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch0BufBDestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL0_BUFFERB_XFER_COUNT</name>
                <addressOffset>0x3C</addressOffset>
                <absoluteAddress>0x4000003C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch0BufBTransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL1_CONTROL</name>
                <addressOffset>0x40</addressOffset>
                <absoluteAddress>0x40000040</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>periphSelect</name>
                  <bitNumber>26:23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>Reserved</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channDestAddrInc</name>
                  <bitNumber>13:12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channSrcAddrInc</name>
                  <bitNumber>11:10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>portHiPriority</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneB</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneA</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelInterruptEnable</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelReset</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelPause</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelTransferSize</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelDirection</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>periphDMA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL1_STATUS</name>
                <addressOffset>0x44</addressOffset>
                <absoluteAddress>0x40000044</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>Reserved</name>
                  <bitNumber>31:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>bufferBSelect</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteB</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL1_BUFFERA_SRC_ADDR</name>
                <addressOffset>0x48</addressOffset>
                <absoluteAddress>0x40000048</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch1BufASourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL1_BUFFERA_DEST_ADDR</name>
                <addressOffset>0x4C</addressOffset>
                <absoluteAddress>0x4000004C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch1BufADestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL1_BUFFERA_XFER_COUNT</name>
                <addressOffset>0x50</addressOffset>
                <absoluteAddress>0x40000050</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch1BufATransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL1_BUFFERB_SRC_ADDR</name>
                <addressOffset>0x54</addressOffset>
                <absoluteAddress>0x40000054</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch1BufBSourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL1_BUFFERB_DEST_ADDR</name>
                <addressOffset>0x58</addressOffset>
                <absoluteAddress>0x40000058</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch1BufBDestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL1_BUFFERB_XFER_COUNT</name>
                <addressOffset>0x5C</addressOffset>
                <absoluteAddress>0x4000005C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch1BufBTransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL2_CONTROL</name>
                <addressOffset>0x60</addressOffset>
                <absoluteAddress>0x40000060</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>periphSelect</name>
                  <bitNumber>26:23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>Reserved</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channDestAddrInc</name>
                  <bitNumber>13:12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channSrcAddrInc</name>
                  <bitNumber>11:10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>portHiPriority</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneB</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneA</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelInterruptEnable</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelReset</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelPause</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelTransferSize</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelDirection</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>periphDMA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL2_STATUS</name>
                <addressOffset>0x64</addressOffset>
                <absoluteAddress>0x40000064</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>Reserved</name>
                  <bitNumber>31:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>bufferBSelect</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteB</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL2_BUFFERA_SRC_ADDR</name>
                <addressOffset>0x68</addressOffset>
                <absoluteAddress>0x40000068</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch2BufASourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL2_BUFFERA_DEST_ADDR</name>
                <addressOffset>0x6C</addressOffset>
                <absoluteAddress>0x4000006C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch2BufADestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL2_BUFFERA_XFER_COUNT</name>
                <addressOffset>0x70</addressOffset>
                <absoluteAddress>0x40000070</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch2BufATransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL2_BUFFERB_SRC_ADDR</name>
                <addressOffset>0x74</addressOffset>
                <absoluteAddress>0x40000074</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch2BufBSourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL2_BUFFERB_DEST_ADDR</name>
                <addressOffset>0x78</addressOffset>
                <absoluteAddress>0x40000078</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch2BufBDestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL2_BUFFERB_XFER_COUNT</name>
                <addressOffset>0x7C</addressOffset>
                <absoluteAddress>0x4000007C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch2BufBTransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL3_CONTROL</name>
                <addressOffset>0x80</addressOffset>
                <absoluteAddress>0x40000080</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>periphSelect</name>
                  <bitNumber>26:23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>Reserved</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channDestAddrInc</name>
                  <bitNumber>13:12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channSrcAddrInc</name>
                  <bitNumber>11:10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>portHiPriority</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneB</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneA</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelInterruptEnable</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelReset</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelPause</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelTransferSize</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelDirection</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>periphDMA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL3_STATUS</name>
                <addressOffset>0x84</addressOffset>
                <absoluteAddress>0x40000084</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>Reserved</name>
                  <bitNumber>31:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>bufferBSelect</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteB</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL3_BUFFERA_SRC_ADDR</name>
                <addressOffset>0x88</addressOffset>
                <absoluteAddress>0x40000088</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch3BufASourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL3_BUFFERA_DEST_ADDR</name>
                <addressOffset>0x8C</addressOffset>
                <absoluteAddress>0x4000008C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch3BufADestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL3_BUFFERA_XFER_COUNT</name>
                <addressOffset>0x90</addressOffset>
                <absoluteAddress>0x40000090</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch3BufATransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL3_BUFFERB_SRC_ADDR</name>
                <addressOffset>0x94</addressOffset>
                <absoluteAddress>0x40000094</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch3BufBSourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL3_BUFFERB_DEST_ADDR</name>
                <addressOffset>0x98</addressOffset>
                <absoluteAddress>0x40000098</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch3BufBDestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL3_BUFFERB_XFER_COUNT</name>
                <addressOffset>0x9C</addressOffset>
                <absoluteAddress>0x4000009C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch3BufBTransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL4_CONTROL</name>
                <addressOffset>0xA0</addressOffset>
                <absoluteAddress>0x400000A0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>periphSelect</name>
                  <bitNumber>26:23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>Reserved</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channDestAddrInc</name>
                  <bitNumber>13:12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channSrcAddrInc</name>
                  <bitNumber>11:10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>portHiPriority</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneB</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneA</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelInterruptEnable</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelReset</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelPause</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelTransferSize</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelDirection</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>periphDMA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL4_STATUS</name>
                <addressOffset>0xA4</addressOffset>
                <absoluteAddress>0x400000A4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>Reserved</name>
                  <bitNumber>31:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>bufferBSelect</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteB</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL4_BUFFERA_SRC_ADDR</name>
                <addressOffset>0xA8</addressOffset>
                <absoluteAddress>0x400000A8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch4BufASourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL4_BUFFERA_DEST_ADDR</name>
                <addressOffset>0xAC</addressOffset>
                <absoluteAddress>0x400000AC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch4BufADestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL4_BUFFERA_XFER_COUNT</name>
                <addressOffset>0xB0</addressOffset>
                <absoluteAddress>0x400000B0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch4BufATransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL4_BUFFERB_SRC_ADDR</name>
                <addressOffset>0xB4</addressOffset>
                <absoluteAddress>0x400000B4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch4BufBSourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL4_BUFFERB_DEST_ADDR</name>
                <addressOffset>0xB8</addressOffset>
                <absoluteAddress>0x400000B8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch4BufBDestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL4_BUFFERB_XFER_COUNT</name>
                <addressOffset>0xBC</addressOffset>
                <absoluteAddress>0x400000BC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch4BufBTransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL5_CONTROL</name>
                <addressOffset>0xC0</addressOffset>
                <absoluteAddress>0x400000C0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>periphSelect</name>
                  <bitNumber>26:23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>Reserved</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channDestAddrInc</name>
                  <bitNumber>13:12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channSrcAddrInc</name>
                  <bitNumber>11:10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>portHiPriority</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneB</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneA</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelInterruptEnable</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelReset</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelPause</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelTransferSize</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelDirection</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>periphDMA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL5_STATUS</name>
                <addressOffset>0xC4</addressOffset>
                <absoluteAddress>0x400000C4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>Reserved</name>
                  <bitNumber>31:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>bufferBSelect</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteB</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL5_BUFFERA_SRC_ADDR</name>
                <addressOffset>0xC8</addressOffset>
                <absoluteAddress>0x400000C8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch5BufASourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL5_BUFFERA_DEST_ADDR</name>
                <addressOffset>0xCC</addressOffset>
                <absoluteAddress>0x400000CC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch5BufADestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL5_BUFFERA_XFER_COUNT</name>
                <addressOffset>0xD0</addressOffset>
                <absoluteAddress>0x400000D0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch5BufATransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL5_BUFFERB_SRC_ADDR</name>
                <addressOffset>0xD4</addressOffset>
                <absoluteAddress>0x400000D4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch5BufBSourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL5_BUFFERB_DEST_ADDR</name>
                <addressOffset>0xD8</addressOffset>
                <absoluteAddress>0x400000D8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch5BufBDestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL5_BUFFERB_XFER_COUNT</name>
                <addressOffset>0xDC</addressOffset>
                <absoluteAddress>0x400000DC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch5BufBTransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL6_CONTROL</name>
                <addressOffset>0xE0</addressOffset>
                <absoluteAddress>0x400000E0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>periphSelect</name>
                  <bitNumber>26:23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>Reserved</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channDestAddrInc</name>
                  <bitNumber>13:12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channSrcAddrInc</name>
                  <bitNumber>11:10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>portHiPriority</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneB</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneA</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelInterruptEnable</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelReset</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelPause</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelTransferSize</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelDirection</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>periphDMA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL6_STATUS</name>
                <addressOffset>0xE4</addressOffset>
                <absoluteAddress>0x400000E4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>Reserved</name>
                  <bitNumber>31:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>bufferBSelect</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteB</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL6_BUFFERA_SRC_ADDR</name>
                <addressOffset>0xE8</addressOffset>
                <absoluteAddress>0x400000E8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch6BufASourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL6_BUFFERA_DEST_ADDR</name>
                <addressOffset>0xEC</addressOffset>
                <absoluteAddress>0x400000EC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch6BufADestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL6_BUFFERA_XFER_COUNT</name>
                <addressOffset>0xF0</addressOffset>
                <absoluteAddress>0x400000F0</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch6BufATransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL6_BUFFERB_SRC_ADDR</name>
                <addressOffset>0xF4</addressOffset>
                <absoluteAddress>0x400000F4</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch6BufBSourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL6_BUFFERB_DEST_ADDR</name>
                <addressOffset>0xF8</addressOffset>
                <absoluteAddress>0x400000F8</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch6BufBDestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL6_BUFFERB_XFER_COUNT</name>
                <addressOffset>0xFC</addressOffset>
                <absoluteAddress>0x400000FC</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch6BufBTransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL7_CONTROL</name>
                <addressOffset>0x100</addressOffset>
                <absoluteAddress>0x40000100</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>periphSelect</name>
                  <bitNumber>26:23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>Reserved</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channDestAddrInc</name>
                  <bitNumber>13:12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channSrcAddrInc</name>
                  <bitNumber>11:10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>portHiPriority</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneB</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>clearDmaPortDoneA</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelInterruptEnable</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelReset</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelPause</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelTransferSize</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelDirection</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>periphDMA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL7_STATUS</name>
                <addressOffset>0x104</addressOffset>
                <absoluteAddress>0x40000104</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>Reserved</name>
                  <bitNumber>31:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>bufferBSelect</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteB</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>channelCompleteA</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL7_BUFFERA_SRC_ADDR</name>
                <addressOffset>0x108</addressOffset>
                <absoluteAddress>0x40000108</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch7BufASourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL7_BUFFERA_DEST_ADDR</name>
                <addressOffset>0x10C</addressOffset>
                <absoluteAddress>0x4000010C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch7BufADestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL7_BUFFERA_XFER_COUNT</name>
                <addressOffset>0x110</addressOffset>
                <absoluteAddress>0x40000110</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch7BufATransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL7_BUFFERB_SRC_ADDR</name>
                <addressOffset>0x114</addressOffset>
                <absoluteAddress>0x40000114</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch7BufBSourceAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL7_BUFFERB_DEST_ADDR</name>
                <addressOffset>0x118</addressOffset>
                <absoluteAddress>0x40000118</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch7BufBDestAddr</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CHANNEL7_BUFFERB_XFER_COUNT</name>
                <addressOffset>0x11C</addressOffset>
                <absoluteAddress>0x4000011C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ch7BufBTransferCount</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
            </addressBlock>
          </memoryMap>
        </slave>
        <slave>
          <name>UART_0</name>
          <remapAddress>0x40000000</remapAddress>
          <fullAddressSpace>0x40000000 - 0x40000FFF</fullAddressSpace>
          <range>0x1000</range>
          <memoryMap>
            <name>RegisterMap</name>
            <addressBlock>
              <baseAddress>0x0</baseAddress>
              <range format="long">0x1000</range>
              <width format="long" id="width">32</width>
              <register>
                <name>RECEIVE_BUFFER</name>
                <addressOffset>0x0</addressOffset>
                <absoluteAddress>0x40000000</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>RBR</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DIVISOR_LATCH_MSB</name>
                <addressOffset>0x4</addressOffset>
                <absoluteAddress>0x40000004</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DMR</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>INTERRUPT_IDENTIFICATION</name>
                <addressOffset>0x8</addressOffset>
                <absoluteAddress>0x40000008</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MODE</name>
                  <bitNumber>7:6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RESERVED</name>
                  <bitNumber>5:4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>IIR</name>
                  <bitNumber>3:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>LINE_CONTROL</name>
                <addressOffset>0xC</addressOffset>
                <absoluteAddress>0x4000000C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DLAB</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SB</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SP</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EPS</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PEN</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>STB</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>WLS</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MODEM_CONTROL</name>
                <addressOffset>0x10</addressOffset>
                <absoluteAddress>0x40000010</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>RESERVED</name>
                  <bitNumber>7:5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>LOOP</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT2</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OUT1</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTS</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DTR</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>LINE_STATUS</name>
                <addressOffset>0x14</addressOffset>
                <absoluteAddress>0x40000014</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>FIER</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TEMT</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>THRE</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BI</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PE</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DR</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MODEM_STATUS</name>
                <addressOffset>0x18</addressOffset>
                <absoluteAddress>0x40000018</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DCD</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RI</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSR</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CTS</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDCD</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TERI</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DDSR</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DCTS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>SCRATCH</name>
                <addressOffset>0x1C</addressOffset>
                <absoluteAddress>0x4000001C</absoluteAddress>
                <size>8</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SCR</name>
                  <bitNumber>7:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
            </addressBlock>
          </memoryMap>
        </slave>
        <slave>
          <name>ESRAM_1</name>
          <remapAddress>0x20008000</remapAddress>
          <fullAddressSpace>0x20008000 - 0x2000FFFF</fullAddressSpace>
          <range>0x8000</range>
        </slave>
        <slave>
          <name>ESRAM_0</name>
          <remapAddress>0x20000000</remapAddress>
          <fullAddressSpace>0x20000000 - 0x20007FFF</fullAddressSpace>
          <range>0x8000</range>
        </slave>
      </subsystem>
    </subsystems>
  </memorysystem>
</datasheet>
