Actel Designer Software
Version: 10.1.1.6
Release: v10.1 SP1

Info: The design Voltage_Monitor.adb was last modified by software version 10.1.1.6.
Opened an existing Libero design Voltage_Monitor.adb.
'BA_NAME' set to 'Voltage_Monitor_ba'
'IDE_DESIGNERVIEW_NAME' set to 'Impl1'
'IDE_DESIGNERVIEW_COUNT' set to '1'
'IDE_DESIGNERVIEW_REV0' set to 'Impl1'
'IDE_DESIGNERVIEW_REVNUM0' set to '1'
'IDE_DESIGNERVIEW_ROOTDIR' set to
'C:\SF_Libero_Keil_POTlevel_tut_DF\EVAL_KIT\POT_LED_Libero_Keil\Voltage_Monitor\designer'
'IDE_DESIGNERVIEW_LASTREV' set to '1'
***** Layout Variables *********************************************

Mode: TIMING_DRIVEN
Power-driven Layout: OFF
Incremental Placement: OFF
Incremental Route: OFF


Info: I/O Bank Assigner detected (1) out of (6) I/O Bank(s) with locked I/O technologies.

Running I/O Bank Assigner.

I/O Bank Assigner completed successfully.
 

Planning global net placement...


Global net placement completed successfully.


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Timing-driven Placer Started: Tue Nov 20 15:11:12 2012



Placer Finished: Tue Nov 20 15:11:14 2012

Total Placer CPU Time:     00:00:02



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Timing-driven Router 

Design: Voltage_Monitor                 Started: Tue Nov 20 15:11:17 2012



 



Timing-driven Router completed successfully.



Design: Voltage_Monitor                 

Finished: Tue Nov 20 15:11:25 2012

Total CPU Time:     00:00:07            Total Elapsed Time: 00:00:08

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Loading the Timing data for the design.
Finished loading the Timing data.
TIMER: Max delay timing requirements have been met.
TIMER: Min delay timing requirements have been met.

The Layout command succeeded ( 00:00:18 )
Wrote status report to file: Voltage_Monitor_place_and_route_report.txt

The Report command succeeded ( 00:00:00 )
Wrote globalnet report to file: Voltage_Monitor_globalnet_report.txt

The Report command succeeded ( 00:00:00 )
Wrote globalusage report to file: Voltage_Monitor_globalusage_report.txt

The Report command succeeded ( 00:00:00 )
Wrote iobank report to file: Voltage_Monitor_iobank_report.txt

The Report command succeeded ( 00:00:00 )
Design saved to file
C:\SF_Libero_Keil_POTlevel_tut_DF\EVAL_KIT\POT_LED_Libero_Keil\Voltage_Monitor\designer\impl1\V\
oltage_Monitor.adb.

The Execute Script command succeeded ( 00:00:21 )
Design closed.

