# Actel Physical design constraints file
# Generated file

# Version: 10.0 SP1 10.0.10.4
# Family: SmartFusion , Die: A2F500M3G , Package: 484 FBGA
# Date generated: Fri Apr 20 18:26:20 2012 


# 
# IO banks setting
# 


# 
# I/O constraints
# 

set_io MSS_RESET_N    \
    -pinname R1       \
    -fixed yes        \
    -DIRECTION Input


set_io TM0_Voltage    \
    -pinname W8       \
    -fixed yes        \
    -DIRECTION Input


set_io UART_0_RXD     \
    -pinname U18      \
    -fixed yes        \
    -DIRECTION Input


set_io UART_0_TXD      \
    -pinname Y22       \
    -fixed yes         \
    -DIRECTION Output


set_io VAREF0         \
    -pinname U10      \
    -fixed yes        \
    -DIRECTION Input



#
# Non IO constraints
#


#
# Old IO constraints, commented out for reference
#

# set_io MSS_RESET_N -pinname R1 -fixed yes -DIRECTION Input 
# set_io TM0_Voltage -pinname W8 -fixed yes -DIRECTION Input 
# set_io UART_0_RXD -pinname U18 -fixed yes -DIRECTION Input 
# set_io UART_0_TXD -pinname Y22 -fixed yes -DIRECTION Output 
# set_io VAREF0 -pinname U10 -fixed yes -DIRECTION Input 
# set_io MSS_RESET_N -pinname R1 -fixed yes -DIRECTION Input 
# set_io TM0_Voltage -pinname W8 -fixed yes -DIRECTION Input 
# set_io UART_0_RXD -pinname U18 -fixed yes -DIRECTION Input 
# set_io UART_0_TXD -pinname Y22 -fixed yes -DIRECTION Output 
# set_io VAREF0 -pinname U10 -fixed yes -DIRECTION Input 
