Actel Designer Software
Version: 10.0.10.4
Release: v10.0 SP1

Info: The design Voltage_Monitor.adb was last modified by software version 10.0.9.37.
Opened an existing Libero design Voltage_Monitor.adb.
'BA_NAME' set to 'Voltage_Monitor_ba'
'IDE_DESIGNERVIEW_NAME' set to 'Impl1'
'IDE_DESIGNERVIEW_COUNT' set to '1'
'IDE_DESIGNERVIEW_REV0' set to 'Impl1'
'IDE_DESIGNERVIEW_REVNUM0' set to '1'
'IDE_DESIGNERVIEW_ROOTDIR' set to
'C:\SF_LiberoIAR_POTlevel_tutorial_DF\EVAL_KIT\POT_LED_Libero_IAR_old\Voltage_Monitor\designer'
'IDE_DESIGNERVIEW_LASTREV' set to '1'

 Netlist Reading Time = 1.0 seconds
Imported the files:

C:\SF_LiberoIAR_POTlevel_tutorial_DF\EVAL_KIT\POT_LED_Libero_IAR_old\Voltage_Monitor\synthesis\\
Voltage_Monitor.edn

C:\SF_LiberoIAR_POTlevel_tutorial_DF\EVAL_KIT\POT_LED_Libero_IAR_old\Voltage_Monitor\component\\
work\Voltage_Monitor\Voltage_Monitor.pdc

The Import command succeeded ( 00:00:03 )
=====================================================================
Parameters used to run compile:
===============================

Family      : SmartFusion
Device      : A2F200M3F
Package     : 484 FBGA
Source      :
C:\SF_LiberoIAR_POTlevel_tutorial_DF\EVAL_KIT\POT_LED_Libero_IAR_old\Voltage_Monitor\synthesis\\
Voltage_Monitor.edn

C:\SF_LiberoIAR_POTlevel_tutorial_DF\EVAL_KIT\POT_LED_Libero_IAR_old\Voltage_Monitor\component\\
work\Voltage_Monitor\Voltage_Monitor.pdc
Format      : EDIF
Topcell     : Voltage_Monitor
Speed grade : STD
Temp        : 0:25:85
Voltage     : 1.58:1.50:1.42

Keep Existing Physical Constraints : Yes
Keep Existing Timing Constraints   : Yes

pdc_abort_on_error                 : Yes
pdc_eco_display_unmatched_objects  : No
pdc_eco_max_warnings               : 10000

demote_globals                     : No
promote_globals                    : No
localclock_max_shared_instances    : 12
localclock_buffer_tree_max_fanout  : 12

combine_register                   : No
delete_buffer_tree                 : No

report_high_fanout_nets_limit      : 10

=====================================================================
Compile starts ...

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Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPADDR[16] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPADDR[17] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPADDR[18] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPADDR[19] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPENABLE drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPSEL drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[0] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[1] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[2] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[3] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[4] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[5] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[6] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[7] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[8] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[9] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[10] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[11] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[12] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[13] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[14] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[15] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[16] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[17] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[18] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[19] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[20] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[21] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[22] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[23] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[24] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[25] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[26] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[27] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[28] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[29] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[30] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWDATA[31] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSSPWRITE drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/PUFABn drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SDD0 drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SDD1 drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SDD2 drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SLEEP drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0CLKO drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0DO drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0DOE drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0MODE drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0SSO[0] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0SSO[1] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0SSO[2] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0SSO[3] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0SSO[4] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0SSO[5] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0SSO[6] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI0SSO[7] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1CLKO drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1DO drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1DOE drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1MODE drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1SSO[0] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1SSO[1] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1SSO[2] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1SSO[3] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1SSO[4] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1SSO[5] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1SSO[6] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/SPI1SSO[7] drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/TXEV drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/UART0DTRn drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/UART0RTSn drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/UART1DTRn drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/UART1RTSn drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/UART1TXD drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/VAREFOUT drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/VCC15GOOD drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/VCC33GOOD drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/WDINT drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSS_CCC_0/I_MSSCCC_GLA drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSS_CCC_0/I_MSSCCC_GLB drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSS_CCC_0/I_MSSCCC_GLC drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSS_CCC_0/I_MSSCCC_LOCK drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSS_CCC_0/I_MSSCCC_YB drives no load.
Warning: CMP201: Net Voltage_Monitor_MSS_0/MSS_CCC_0/I_MSSCCC_YC drives no load.

Netlist Optimization Report
===========================

Optimized macros:
  - Dangling net drivers:   0
  - Buffers:                4
  - Inverters:              0
  - Tieoff:                 0
  - Logic combining:        0

    Total macros optimized  4

There were 0 error(s) and 331 warning(s) in this design.
=====================================================================

Reading previous post-compile physical placement constraints.


There were 0 error(s) and 0 warning(s).

=====================================================================

Reading user pdc (Physical Design Constraints) file(s) postcompile


There were 0 error(s) and 0 warning(s) in reading the user pdc.

=====================================================================
Compile report:
===============

    Microcontroller Subsystem  Used:      1  Total:      1   (100.00%)
    Fabric                     Used:      0  Total:   4608   (0.00%)
    Fabric IO (W/ clocks)      Used:      4  Total:     94   (4.26%)
    Fabric Differential IO     Used:      0  Total:     47   (0.00%)
    Dedicated Analog IO        Used:      2  Total:     32   (6.25%)
    Dedicated MSS IO           Used:      3  Total:     43   (6.98%)
    GLOBAL (Chip+Quadrant)     Used:      0  Total:     15   (0.00%)
    MSS GLOBAL                 Used:      3  Total:      3   (100.00%)
    On-chip RC oscillator      Used:      1  Total:      1   (100.00%)
    Main Crystal oscillator    Used:      0  Total:      1   (0.00%)
    32 KHz Crystal oscillator  Used:      0  Total:      1   (0.00%)
    RAM/FIFO                   Used:      0  Total:      8   (0.00%)
    User JTAG                  Used:      0  Total:      1   (0.00%)

Global Information:

    Type            | Used   | Total
    ----------------|--------|--------------
    Chip global     | 0      | 3  (0.00%)*
    Quadrant global | 0      | 12 (0.00%)
    MSS global      | 3      | 3  (100.00%)

    (*) Chip globals may be assigned to Quadrant globals using the Multi-View Navigator (MVN)
        or Physical Design Constraints (PDC).
        They may also be assigned to Quadrant globals automatically during Layout.

Core Information:

    Type    | Instances    | Core tiles
    --------|--------------|-----------
    COMB    | 0            | 0
    SEQ     | 0            | 0

I/O Function:

    Type                          | w/o register  | w/ register  | w/ DDR register
    ------------------------------|---------------|--------------|----------------
    Input I/O                     | 0             | 0            | 0
    Output I/O                    | 4             | 0            | 0
    Bidirectional I/O             | 0             | 0            | 0
    Differential Input I/O Pairs  | 0             | 0            | 0
    Differential Output I/O Pairs | 0             | 0            | 0

I/O Technology:

                                    |   Voltages    |             I/Os
    --------------------------------|-------|-------|-------|--------|--------------
    I/O Standard(s)                 | Vcci  | Vref  | Input | Output | Bidirectional
    --------------------------------|-------|-------|-------|--------|--------------
    LVTTL                           | 3.30v | N/A   | 0     | 4      | 0

I/O Placement:

    Locked  :   4 ( 100.00% )
    Placed  :   0
    UnPlaced:   0

Net information report:
=======================

High fanout nets in the post compile netlist:
    Fanout  Type          Name
    --------------------------
    1       INT_NET       Net   : Voltage_Monitor_MSS_0/MSSINT_GPO_30_A
                          Driver: Voltage_Monitor_MSS_0/MSS_ADLIB_INST
    1       INT_NET       Net   : Voltage_Monitor_MSS_0/MSSINT_GPO_28_A
                          Driver: Voltage_Monitor_MSS_0/MSS_ADLIB_INST
    1       INT_NET       Net   : Voltage_Monitor_MSS_0/MSSINT_GPO_29_A
                          Driver: Voltage_Monitor_MSS_0/MSS_ADLIB_INST
    1       INT_NET       Net   : Voltage_Monitor_MSS_0/MSSINT_GPO_31_A
                          Driver: Voltage_Monitor_MSS_0/MSS_ADLIB_INST

Nets that are candidates for clock assignment and the resulting fanout:
    Fanout  Type          Name
    --------------------------
    1       INT_NET       Net   : Voltage_Monitor_MSS_0/MSSINT_GPO_30_A
                          Driver: Voltage_Monitor_MSS_0/MSS_ADLIB_INST
    1       INT_NET       Net   : Voltage_Monitor_MSS_0/MSSINT_GPO_28_A
                          Driver: Voltage_Monitor_MSS_0/MSS_ADLIB_INST
    1       INT_NET       Net   : Voltage_Monitor_MSS_0/MSSINT_GPO_29_A
                          Driver: Voltage_Monitor_MSS_0/MSS_ADLIB_INST
    1       INT_NET       Net   : Voltage_Monitor_MSS_0/MSSINT_GPO_31_A
                          Driver: Voltage_Monitor_MSS_0/MSS_ADLIB_INST

The Compile command succeeded ( 00:00:02 )
Wrote status report to file: Voltage_Monitor_compile_report.txt

The Report command succeeded ( 00:00:00 )
Design saved to file
C:\SF_LiberoIAR_POTlevel_tutorial_DF\EVAL_KIT\POT_LED_Libero_IAR_old\Voltage_Monitor\designer\i\
mpl1\Voltage_Monitor.adb.

The Execute Script command succeeded ( 00:00:09 )
Design closed.

