• synthesis (Top_55TFT32bit_QVGA_EthMAC)
  • Compiler Report

• Mapper Report
• Timing Report
• Performance Summary
• Clock Relationships
• Interface Information
• Detailed Report for Clock: MSS_new_top_tmp_MSS_CCC_0_MSS_CCC|MSS_ADLIB_INST_FCLK_inferred_clock
  • Starting Points with Worst Slack
  • Ending Points with Worst Slack
  • Worst Path Information
• Detailed Report for Clock: MSS_new_top_tmp_MSS_CCC_0_MSS_CCC|MSS_new_top_0_FAB_CLK_inferred_clock
  • Starting Points with Worst Slack
  • Ending Points with Worst Slack
  • Worst Path Information
• Detailed Report for Clock: TOGGLE_DIV_0.DIVREG_GEN\.2\.TOGGLEDIV_REG\.I_DIVREG[2]
  • Starting Points with Worst Slack
  • Ending Points with Worst Slack
  • Worst Path Information
• Detailed Report for Clock: System
  • Starting Points with Worst Slack
  • Ending Points with Worst Slack
  • Worst Path Information
• Resource Utilization