#Build: Synplify Pro 8.6.2D, Build 013R, Jun 5 2006 #install: \\dm5\sqatest5\releases\Synplify\pc\Synplify8.6.2D #OS: Windows XP 5.1 #Hostname: WXP-WONGAL #Fri Feb 09 13:54:30 2007 $ Running Identify Instrumentor. See log file: @N: : identify.log | #Fri Feb 09 13:54:30 2007 $ Start of Compile #Fri Feb 09 13:54:37 2007 Synplicity VHDL Compiler, version 3.7, Build 090R, built Nov 17 2006 Copyright (C) 1994-2006, Synplicity Inc. All Rights Reserved @N:CD720 : std.vhd(123) | Setting time resolution to ns @N: : config_top.vhd(23) | Top entity is set to config_top. @I:: "D:\ProgrammingSRAM\sconfig\synthesis\rev_1_identify_4\instr_sources\syn_dics.vhd" VHDL syntax check successful! Options changed - recompiling @N:CD630 : config_top.vhd(17) | Synthesizing work.config_top.rtl @N:CD630 : syn_dics.vhd(1994) | Synthesizing work.iice_0.structure @N:CD630 : syn_dics.vhd(1464) | Synthesizing work.b7_ofwnt9s.b3_vfw @N:CD630 : syn_dics.vhd(1132) | Synthesizing work.b12_ofwnt9_wmeed.b3_joc Post processing for work.b12_ofwnt9_wmeed.b3_joc @N:CD630 : syn_dics.vhd(1397) | Synthesizing work.ram_block.struct @N:CD630 : syn_dics.vhd(1342) | Synthesizing work.ramsliceram_block.struct @N:CD630 : syn_dics.vhd(1190) | Synthesizing work.genericramram_block.struct @N:CD630 : fusion.vhd(3267) | Synthesizing work.ram512x18.syn_black_box Post processing for work.ram512x18.syn_black_box Post processing for work.genericramram_block.struct Post processing for work.ramsliceram_block.struct Post processing for work.ram_block.struct Post processing for work.b7_ofwnt9s.b3_vfw @N:CD630 : syn_dics.vhd(1729) | Synthesizing work.b3_ukr.b3_vcj @N:CD630 : syn_dics.vhd(1633) | Synthesizing work.b7_plf_6ln.b3_vcj Post processing for work.b7_plf_6ln.b3_vcj @N:CD630 : syn_dics.vhd(1678) | Synthesizing work.b12_nvmfl_la1xyh.b3_vcj Post processing for work.b12_nvmfl_la1xyh.b3_vcj Post processing for work.b3_ukr.b3_vcj @N:CD630 : syn_dics.vhd(1829) | Synthesizing work.b3_12m.b6_oczobx @W:CD638 : syn_dics.vhd(1893) | Signal b11_nutz3qm_tkl is undriven @N:CD630 : syn_dics.vhd(636) | Synthesizing work.b7_pffzrny.b6_oczobx @N:CD630 : syn_dics.vhd(492) | Synthesizing work.b5_nvmfl.b6_oczobx Post processing for work.b5_nvmfl.b6_oczobx @N:CD630 : syn_dics.vhd(588) | Synthesizing work.b11_psyil9s1fkt.b3_joc @N:CD630 : syn_dics.vhd(538) | Synthesizing work.b15_crgctcua_eh4_wi.b3_joc @N:CD630 : syn_dics.vhd(526) | Synthesizing work.b9_o2yyf_fg2.b3_joc Post processing for work.b9_o2yyf_fg2.b3_joc Post processing for work.b15_crgctcua_eh4_wi.b3_joc @N:CD630 : syn_dics.vhd(412) | Synthesizing work.b8_1lbcqdr1.b3_joc Post processing for work.b8_1lbcqdr1.b3_joc Post processing for work.b11_psyil9s1fkt.b3_joc Post processing for work.b7_pffzrny.b6_oczobx @N:CD630 : syn_dics.vhd(834) | Synthesizing work.b7_ocbylxc.b3_joc @W:CD274 : syn_dics.vhd(950) | Incomplete case statement - add more cases or a when others @N:CD630 : syn_dics.vhd(745) | Synthesizing work.b8_nr_ymqrg.b3_joc Post processing for work.b8_nr_ymqrg.b3_joc Post processing for work.b7_ocbylxc.b3_joc Post processing for work.b3_12m.b6_oczobx Post processing for work.iice_0.structure @N:CD630 : syn_dics.vhd(1936) | Synthesizing work.ldic1_0.structure Post processing for work.ldic1_0.structure @N:CD630 : syn_dics.vhd(243) | Synthesizing work.comm_block.b3_joc @N:CD630 : syn_dics.vhd(5) | Synthesizing work.b9_orbiwxaef.b3_vcj Post processing for work.b9_orbiwxaef.b3_vcj @N:CD630 : syn_dics.vhd(192) | Synthesizing work.b16_rcmi_qlx9_yhpm7y.b3_vcj Post processing for work.b16_rcmi_qlx9_yhpm7y.b3_vcj @N:CD630 : syn_dics.vhd(70) | Synthesizing work.jtag_interface.b3_vcj @W:CD434 : syn_dics.vhd(159) | Signal identify_clk2_no_clk_buffer_needed in the sensitivity list is not used in the process @W:CD434 : syn_dics.vhd(170) | Signal identify_clk2_no_clk_buffer_needed in the sensitivity list is not used in the process @W:CD638 : syn_dics.vhd(94) | Signal b14_gir9p_al2ezh2v is undriven @N:CD630 : fusion.vhd(4363) | Synthesizing work.ujtag.syn_black_box Post processing for work.ujtag.syn_black_box Post processing for work.jtag_interface.b3_vcj Post processing for work.comm_block.b3_joc @N:CD630 : cfgnvm.vhd(7) | Synthesizing work.cfgnvm.def_arch @N:CD630 : fusion.vhd(4474) | Synthesizing work.nvm.syn_black_box Post processing for work.nvm.syn_black_box @N:CD630 : fusion.vhd(3021) | Synthesizing work.vcc.syn_black_box Post processing for work.vcc.syn_black_box @N:CD630 : fusion.vhd(1901) | Synthesizing work.gnd.syn_black_box Post processing for work.gnd.syn_black_box Post processing for work.cfgnvm.def_arch @W:CL168 : cfgnvm.vhd(119) | Pruning instance VCC_power_inst1 - not in use ... @N:CD630 : sconfig.vhd(18) | Synthesizing work.sconfig.rtl @N:CD630 : syn_dics.vhd(1961) | Synthesizing work.ldic4_0.structure Post processing for work.ldic4_0.structure @N:CD630 : ram256x8.vhd(7) | Synthesizing work.ram256x8.def_arch @N:CD630 : fusion.vhd(3184) | Synthesizing work.ram4k9.syn_black_box Post processing for work.ram4k9.syn_black_box @N:CD630 : fusion.vhd(2119) | Synthesizing work.inv.syn_black_box Post processing for work.inv.syn_black_box Post processing for work.ram256x8.def_arch Post processing for work.sconfig.rtl @W:CL170 : sconfig.vhd(361) | Pruning bit <7> of wdata(7 downto 0) - not in use ... @N:CD630 : pll_60_40_10.vhd(7) | Synthesizing work.pll_60_40_10.def_arch @N:CD630 : fusion.vhd(4213) | Synthesizing work.pll.syn_black_box Post processing for work.pll.syn_black_box Post processing for work.pll_60_40_10.def_arch @N:CD630 : rc_osc.vhd(7) | Synthesizing work.rc_osc.def_arch @N:CD630 : fusion.vhd(4457) | Synthesizing work.rcosc.syn_black_box Post processing for work.rcosc.syn_black_box Post processing for work.rc_osc.def_arch Post processing for work.config_top.rtl @N:CL201 : sconfig.vhd(541) | Trying to extract state machine for register state2 Extracted state machine for register state2 State machine has 10 reachable states with original encodings of: 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 @N:CL201 : sconfig.vhd(233) | Trying to extract state machine for register state Extracted state machine for register state State machine has 8 reachable states with original encodings of: 000 001 010 011 100 101 110 111 @N:CL201 : syn_dics.vhd(932) | Trying to extract state machine for register b13_nAzGfFM_sLsv3 Extracted state machine for register b13_nAzGfFM_sLsv3 State machine has 14 reachable states with original encodings of: 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 @W:CL209 : syn_dics.vhd(638) | Input port bit <5> of b9_slyy_nrgd(0 to 52) is unused @END Process took 0h:00m:01s realtime, 0h:00m:01s cputime # Fri Feb 09 13:54:39 2007 ###########################################################] Synplicity Proasic Technology Mapper, Version 9.0.0, Build 368R, Built Nov 27 2006 12:29:38 Copyright (C) 1994-2006, Synplicity Inc. All Rights Reserved Product Version Version 8.6.2D @N:MF249 : | Running in 32-bit mode. @N:MF258 : | Gated clock conversion disabled @W:BN153 : | View "prim", Cell "NGMUX", Port "CLK0": remove clock marking @W:BN153 : | View "prim", Cell "NGMUX", Port "CLK1": remove clock marking @W:BN154 : | View "prim" of Cell "NGMUX": 4 sequential timing arcs are removed Automatic dissolve at startup in view:work.sconfig(rtl) of ldic4_inst_0(ldic4_0) Automatic dissolve at startup in view:work.sconfig(rtl) of M1(ram256x8) Automatic dissolve at startup in view:work.comm_block(b3_joc) of b9_ORb_xNywD(b9_ORbIwXaEF) Automatic dissolve at startup in view:work.comm_block(b3_joc) of b7_Rcmi_ql(b16_Rcmi_qlx9_yHpm7y) Automatic dissolve at startup in view:work.b7_OCByLXC(b3_joc) of b11_nUTGT_khWqH(b8_nR_ymqrG) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b7_d_mIC_G.0.b19_O2yyf_fG2_MiQA1E6_h(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b7_d_mIC_E.0.b25_O2yyf_fG2_MiQA1E6_r_lnxob(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b7_d_mIC_E.3.b25_O2yyf_fG2_MiQA1E6_r_lnxob(b9_O2yyf_fG2_b7_d_mIC_E_3_b25_O2yyf_fG2_MiQA1E6_r_lnxob) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b7_d_mIC_E.2.b25_O2yyf_fG2_MiQA1E6_r_lnxob(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b7_d_mIC_E.1.b25_O2yyf_fG2_MiQA1E6_r_lnxob(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.9.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.2.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.11.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.0.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.5.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.6.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.7.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.4.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.1.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.10.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.3.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.8.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b15_CRGcTCua_eH4_wi(b3_joc) of b8_d_mIC_Gq.12.b19_O2yyf_fG2_MiQA1E6_q(b9_O2yyf_fG2) Automatic dissolve at startup in view:work.b7_PfFzrNY(b6_oczobx) of b5_PbrtL(b5_nvmFL) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst1(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block(struct) of GenericRAMInst0(GenericRAMram_block) Automatic dissolve at startup in view:work.ramSliceram_block_ramSliceInst2(struct) of GenericRAMInst1(GenericRAMram_block_GenericRAMInst1) Automatic dissolve at startup in view:work.ramSliceram_block_ramSliceInst2(struct) of GenericRAMInst0(GenericRAMram_block_GenericRAMInst0) Automatic dissolve at startup in view:work.config_top(rtl) of ldic1_inst_0(ldic1_0) Automatic dissolve at startup in view:work.config_top(rtl) of M2(cfgnvm) Automatic dissolve at startup in view:work.config_top(rtl) of M1(cfgnvm) Automatic dissolve at startup in view:work.config_top(rtl) of C2(PLL_60_40_10) Automatic dissolve at startup in view:work.config_top(rtl) of C1(rc_osc) RTL optimization done. Finished RTL optimizations (Time elapsed 0h:00m:00s; Memory used current: 46MB peak: 49MB) Encoding state machine work.sconfig(rtl)-state[0:7] original code -> new code 000 -> 00000001 001 -> 00000010 010 -> 00000100 011 -> 00001000 100 -> 00010000 101 -> 00100000 110 -> 01000000 111 -> 10000000 Encoding state machine work.sconfig(rtl)-state2[0:9] original code -> new code 0000 -> 0000000001 0001 -> 0000000010 0010 -> 0000000100 0011 -> 0000001000 0100 -> 0000010000 0101 -> 0000100000 0110 -> 0001000000 0111 -> 0010000000 1000 -> 0100000000 1001 -> 1000000000 @N:MF176 : | Default generator successful @N:MF238 : sconfig.vhd(288) | Found 19 bit incrementor, 'un1_inc_1[18:0]' @N:MF176 : | Default generator successful Encoding state machine work.b7_OCByLXC(b3_joc)-b13_nAzGfFM_sLsv3[0:13] original code -> new code 0000 -> 00000000000001 0001 -> 00000000000010 0010 -> 00000000000100 0011 -> 00000000001000 0100 -> 00000000010000 0101 -> 00000000100000 0110 -> 00000001000000 0111 -> 00000010000000 1000 -> 00000100000000 1001 -> 00001000000000 1010 -> 00010000000000 1011 -> 00100000000000 1100 -> 01000000000000 1101 -> 10000000000000 @W:MO129 : | Sequential instance iice_inst_0.b7_12mFLWM.b5_nUTGT.b3_nfs[1] has been reduced to a combinational gate by constant propagation Finished factoring (Time elapsed 0h:00m:04s; Memory used current: 49MB peak: 50MB) @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.51.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[0] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.50.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[1] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.49.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[2] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.48.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[3] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.47.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[4] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.46.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[5] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.45.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[6] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.44.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[7] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.43.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[8] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.42.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[9] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.41.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[10] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.40.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[11] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.39.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[12] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.38.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[13] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.37.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[14] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.36.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[15] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.35.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[16] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.34.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[17] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.33.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[18] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.32.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[19] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.31.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[20] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.30.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[21] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.29.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[22] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.28.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[23] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.27.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[24] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.26.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[25] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.25.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[26] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.24.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[27] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.23.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[28] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.22.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[29] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.21.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[30] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.20.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[31] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.19.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[32] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.18.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[33] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.17.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[34] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.16.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[35] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.15.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[36] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.14.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[37] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.13.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[38] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.12.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[39] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.11.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[40] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.10.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[41] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.9.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[42] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.8.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[43] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.7.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[44] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.6.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[45] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.5.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[46] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.4.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[47] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.3.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[48] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.2.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[49] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.1.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[50] @W:BN132 : syn_dics.vhd(433) | Removing sequential instance iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b5_7oBdQ.0.b6_1LbcgK.b11_uUG_C9CrTXy, because it is equivalent to instance iice_inst_0.b3_SoW.b8_OFWNT9LR[51] Finished gated-clock and generated-clock conversion (Time elapsed 0h:00m:04s; Memory used current: 49MB peak: 50MB) Finished generic timing optimizations - Pass 1 (Time elapsed 0h:00m:05s; Memory used current: 50MB peak: 51MB) Starting Early Timing Optimization (Time elapsed 0h:00m:05s; Memory used current: 51MB peak: 53MB) Finished Early Timing Optimization (Time elapsed 0h:00m:05s; Memory used current: 51MB peak: 53MB) Finished generic timing optimizations - Pass 2 (Time elapsed 0h:00m:06s; Memory used current: 50MB peak: 53MB) Finished preparing to map (Time elapsed 0h:00m:07s; Memory used current: 52MB peak: 53MB) High Fanout Net Report ********************** Driver Instance / Pin Name Fanout, notes --------------------------------------------------------------------------------------------------------- comm_block_inst.jtag_block.jtagi.b10_nv_ywKMm9X / Y 68 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[5] / Q 34 comm_block_inst.b9_ORb_xNywD.un1_b3_orb8 / Y 32 iice_inst_0.VCC / Y 19 DI_pad / Y 28 U1.cmnd[0] / Q 13 U1.bit_cnt[0] / Q 22 U1.bit_cnt[1] / Q 16 U1.bit_cnt[2] / Q 14 RST_pad / Y 91 : 88 asynchronous set/reset iice_inst_0.b7_12mFLWM.b5_nUTGT.b12_voSc3_gmasbb_0 / Y 20 VCC / Y 25 iice_inst_0.b3_SoW.b9_v_mzCDYXs[8] / Q 54 iice_inst_0.b3_SoW.b11_OFWNT9_X1eH.b6_yor0PD_0_sqmuxa / Y 55 iice_inst_0.b3_SoW.b11_OFWNT9_X1eH.b8_OvyH3_YG / Y 54 iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b7_PSyil9s / Q 15 iice_inst_0.b7_12mFLWM.b4_PfFz.b5_PbrtL.b8_nvmFLCug.un2_b7_pkja_9u / Y 156 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nfs[1] / Q 28 : 28 asynchronous set/reset iice_inst_0.b7_12mFLWM.b5_nUTGT.b3_nfs[0] / Q 17 iice_inst_0.b7_12mFLWM.b5_nUTGT.un1_b12_urrc2xfy_rbn16 / Y 19 iice_inst_0.b7_12mFLWM.b5_nUTGT.b5_nYhI3.un1_b6_nut_ff_i / Y 24 U1.state2[9] / Q 22 U1.state2[8] / Q 13 U1.state2[1] / Q 22 U1.P6.un21_rstn / Y 24 : 24 asynchronous set/reset U1.state[4] / Q 16 U1.state[7] / Q 14 U1.G1.0.P4.un12_state / Y 19 U1.un8_nxt2_i_a2 / Y 20 U1.addr_ld_0_sqmuxa / Y 19 U1.addr_ld_1_sqmuxa / Y 17 U1.addr[18] / Y 14 ========================================================================================================= Promoting Net b3_PK3 on CLKINT jtag_block.jtagi.b3_PK3_inferred_clock Promoting Net CLK_c on CLKBUF CLK_pad Promoting Net RST_c on CLKBUF RST_pad Promoting Net comm2iice_link_iice_0_a_0[7] on CLKINT I_78 Replicating nvm_addr[18], fanout 14 segments 2 Replicating U1.addr_ld_1_sqmuxa, fanout 17 segments 2 Replicating U1.addr_ld_0_sqmuxa, fanout 19 segments 2 Replicating U1.N_446, fanout 20 segments 2 Replicating U1.G1.0.P4.un12_state, fanout 19 segments 2 Buffering DI_c, fanout 26 segments 3 Buffering CSn_c, fanout 26 segments 3 Replicating U1.state[7], fanout 14 segments 2 Replicating U1.state[4], fanout 16 segments 2 Replicating U1.P6.un21_rstn, fanout 24 segments 2 Replicating U1.state2[1], fanout 23 segments 2 Replicating U1.state2[8], fanout 16 segments 2 Replicating U1.state2[9], fanout 23 segments 2 Replicating uplink_8_a[6], fanout 13 segments 2 Replicating uplink_8_a[7], fanout 15 segments 2 Replicating uplink_8_a[8], fanout 21 segments 2 Replicating U1.P2.un5_bit_cnt, fanout 13 segments 2 Replicating U1.state[5], fanout 13 segments 2 Buffering CSn_c, fanout 13 segments 2 Finished technology mapping (Time elapsed 0h:00m:07s; Memory used current: 50MB peak: 54MB) Finished technology timing optimizations and critical path resynthesis (Time elapsed 0h:00m:08s; Memory used current: 50MB peak: 54MB) Added 5 Buffers Added 16 Cells via replication Added 5 Buffers Added 16 Cells via replication Added 5 Buffers Added 16 Cells via replication Added 5 Buffers Added 16 Cells via replication Finished restoring hierarchy (Time elapsed 0h:00m:08s; Memory used current: 51MB peak: 54MB) Writing Analyst data base D:\ProgrammingSRAM\sconfig\synthesis\rev_1_identify_4\config_top.srm @N:BN225 : | Writing default property annotation file D:\ProgrammingSRAM\sconfig\synthesis\rev_1_identify_4\config_top.map. Writing EDIF Netlist and constraint files Found clock config_top|CSn with period 1000.00ns Found clock config_top|CLK with period 1000.00ns Found clock config_top|C2.clk10M_inferred_clock with period 1000.00ns Found clock config_top|C2.clk60M_inferred_clock with period 1000.00ns Found clock jtag_interface|b3_PK3_inferred_clock with period 1000.00ns Found clock jtag_interface|b7_oSD_3vW_inferred_clock with period 1000.00ns Found clock jtag_interface|identify_clk2_no_clk_buffer_needed with period 1000.00ns ##### START OF TIMING REPORT #####[ # Timing Report written on Fri Feb 09 13:54:54 2007 # Top view: config_top Library name: fusion Operating conditions: COMWC-2 ( T = 70.0, V = 1.58, P = 1.15, tree_type = balanced_tree ) Requested Frequency: 1.0 MHz Wire load mode: top Wire load model: fusion Paths requested: 5 Constraint File(s): @N:MT195 : | This timing report estimates place and route data. Please look at the place and route timing report for final timing.. @N:MT197 : | Clock constraints cover only FF-to-FF paths associated with the clock.. Performance Summary ******************* Worst slack in design: 490.455 Requested Estimated Requested Estimated Clock Clock Starting Clock Frequency Frequency Period Period Slack Type Group ---------------------------------------------------------------------------------------------------------------------------------------------------------- config_top|C2.clk10M_inferred_clock 1.0 MHz 56.5 MHz 1000.000 17.688 982.312 inferred Inferred_clkgroup_6 config_top|C2.clk60M_inferred_clock 1.0 MHz 58.2 MHz 1000.000 17.193 982.807 inferred Inferred_clkgroup_2 config_top|CLK 1.0 MHz 52.4 MHz 1000.000 19.091 490.455 inferred Inferred_clkgroup_0 jtag_interface|b3_PK3_inferred_clock 1.0 MHz 50.3 MHz 1000.000 19.892 980.108 inferred Inferred_clkgroup_5 jtag_interface|b7_oSD_3vW_inferred_clock 1.0 MHz 170.1 MHz 1000.000 5.879 994.121 inferred Inferred_clkgroup_3 jtag_interface|identify_clk2_no_clk_buffer_needed 1.0 MHz 127.1 MHz 1000.000 7.870 992.130 inferred Inferred_clkgroup_4 System 1.0 MHz 161.8 MHz 1000.000 6.181 993.819 system default_clkgroup ========================================================================================================================================================== Clock Relationships ******************* Clocks | rise to rise | fall to fall | rise to fall | fall to rise -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Starting Ending | constraint slack | constraint slack | constraint slack | constraint slack -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- config_top|CLK config_top|CLK | 1000.000 988.033 | 1000.000 997.386 | 500.000 490.455 | No paths - config_top|CLK config_top|CSn | Diff grp - | No paths - | No paths - | No paths - config_top|CLK config_top|C2.clk60M_inferred_clock | Diff grp - | No paths - | No paths - | No paths - config_top|CLK config_top|C2.clk10M_inferred_clock | Diff grp - | No paths - | No paths - | Diff grp - config_top|C2.clk60M_inferred_clock config_top|CLK | Diff grp - | No paths - | Diff grp - | No paths - config_top|C2.clk60M_inferred_clock config_top|C2.clk60M_inferred_clock | 1000.000 982.807 | No paths - | No paths - | No paths - config_top|C2.clk60M_inferred_clock config_top|C2.clk10M_inferred_clock | Diff grp - | No paths - | No paths - | No paths - jtag_interface|b7_oSD_3vW_inferred_clock jtag_interface|b7_oSD_3vW_inferred_clock | 1000.000 994.121 | No paths - | No paths - | No paths - jtag_interface|b7_oSD_3vW_inferred_clock jtag_interface|identify_clk2_no_clk_buffer_needed | Diff grp - | No paths - | No paths - | No paths - jtag_interface|identify_clk2_no_clk_buffer_needed jtag_interface|identify_clk2_no_clk_buffer_needed | 1000.000 992.130 | No paths - | No paths - | No paths - jtag_interface|identify_clk2_no_clk_buffer_needed jtag_interface|b3_PK3_inferred_clock | Diff grp - | No paths - | No paths - | No paths - jtag_interface|identify_clk2_no_clk_buffer_needed config_top|C2.clk10M_inferred_clock | Diff grp - | No paths - | No paths - | No paths - jtag_interface|b3_PK3_inferred_clock jtag_interface|identify_clk2_no_clk_buffer_needed | Diff grp - | No paths - | No paths - | No paths - jtag_interface|b3_PK3_inferred_clock jtag_interface|b3_PK3_inferred_clock | 1000.000 980.108 | No paths - | No paths - | No paths - jtag_interface|b3_PK3_inferred_clock config_top|C2.clk10M_inferred_clock | Diff grp - | No paths - | No paths - | No paths - config_top|C2.clk10M_inferred_clock jtag_interface|b3_PK3_inferred_clock | Diff grp - | No paths - | No paths - | No paths - config_top|C2.clk10M_inferred_clock config_top|C2.clk10M_inferred_clock | 1000.000 982.312 | No paths - | No paths - | No paths - ================================================================================================================================================================================================== Note: 'No paths' indicates there are no paths in the design for that pair of clock edges. 'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups. Interface Information ********************* No IO constraint found ==================================== Detailed Report for Clock: config_top|C2.clk10M_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock -------------------------------------------------------------------------------------------------------------------------------------------------------- iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[5] config_top|C2.clk10M_inferred_clock DFN1 Q b7_nYhI39s[5] 0.476 982.312 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[6] config_top|C2.clk10M_inferred_clock DFN1 Q b7_nYhI39s[6] 0.476 982.410 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[2] config_top|C2.clk10M_inferred_clock DFN1 Q b7_nYhI39s[2] 0.476 982.922 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[7] config_top|C2.clk10M_inferred_clock DFN1 Q b7_nYhI39s[7] 0.476 982.990 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[4] config_top|C2.clk10M_inferred_clock DFN1 Q b7_nYhI39s[4] 0.476 983.016 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[1] config_top|C2.clk10M_inferred_clock DFN1 Q b7_nYhI39s[1] 0.476 983.087 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[0] config_top|C2.clk10M_inferred_clock DFN1 Q b7_nYhI39s[0] 0.476 983.091 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[3] config_top|C2.clk10M_inferred_clock DFN1 Q b7_nYhI39s[3] 0.476 983.182 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[8] config_top|C2.clk10M_inferred_clock DFN1 Q b7_nYhI39s[8] 0.476 983.459 iice_inst_0.b7_12mFLWM.b4_PfFz.b7_PbTtl9G.b7_PSyil9s config_top|C2.clk10M_inferred_clock DFN1 Q b10_uUT0JC4gFr 0.476 984.387 ======================================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------------------------------------------- iice_inst_0.b3_SoW.b9_2_mzCDYXs[7] config_top|C2.clk10M_inferred_clock DFN1 D b9_2_mzCDYXs_5_i[7] 999.690 982.312 iice_inst_0.b3_SoW.b9_2_mzCDYXs[6] config_top|C2.clk10M_inferred_clock DFN1 D b9_2_mzCDYXs_5_i[6] 999.690 982.970 iice_inst_0.b3_SoW.b9_2_mzCDYXs[5] config_top|C2.clk10M_inferred_clock DFN1 D b9_2_mzCDYXs_5_i[5] 999.690 983.158 iice_inst_0.b3_SoW.b9_2_mzCDYXs[8] config_top|C2.clk10M_inferred_clock DFN1 D b9_2_mzCDYXs_5_i[8] 999.690 983.158 iice_inst_0.b3_SoW.b9_2_mzCDYXs[4] config_top|C2.clk10M_inferred_clock DFN1 D b9_2_mzCDYXs_5_i[4] 999.690 983.816 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[7] config_top|C2.clk10M_inferred_clock DFN1 D b7_nYhI39s_12[7] 999.690 984.298 iice_inst_0.b3_SoW.b9_2_mzCDYXs[3] config_top|C2.clk10M_inferred_clock DFN1 D b9_2_mzCDYXs_5_i[3] 999.690 984.370 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[6] config_top|C2.clk10M_inferred_clock DFN1 D b7_nYhI39s_12[6] 999.690 985.001 iice_inst_0.b3_SoW.b9_2_mzCDYXs[2] config_top|C2.clk10M_inferred_clock DFN1 D b9_2_mzCDYXs_5_i[2] 999.690 985.029 iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[5] config_top|C2.clk10M_inferred_clock DFN1 D b7_nYhI39s_12[5] 999.690 985.189 ======================================================================================================================================================= Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.310 = Required time: 999.690 - Propagation time: 17.378 = Slack (non-critical) : 982.312 Number of logic level(s): 14 Starting point: iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[5] / Q Ending point: iice_inst_0.b3_SoW.b9_2_mzCDYXs[7] / D The start point is clocked by config_top|C2.clk10M_inferred_clock [rising] on pin CLK The end point is clocked by config_top|C2.clk10M_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ------------------------------------------------------------------------------------------------------------------------------ iice_inst_0.b7_12mFLWM.b5_nUTGT.b7_nYhI39s[5] DFN1 Q Out 0.476 0.476 - b7_nYhI39s[5] Net - - 1.017 - 5 iice_inst_0.b7_12mFLWM.b5_nUTGT.b13_nAzGfFM_sLsv3_ns_i_a2_1[3] NOR2 B In - 1.493 - iice_inst_0.b7_12mFLWM.b5_nUTGT.b13_nAzGfFM_sLsv3_ns_i_a2_1[3] NOR2 Y Out 0.474 1.967 - b13_nAzGfFM_sLsv3_ns_i_a2_1[3] Net - - 0.275 - 1 iice_inst_0.b7_12mFLWM.b5_nUTGT.b13_nAzGfFM_sLsv3_ns_i_a2_5[3] NOR3A A In - 2.242 - iice_inst_0.b7_12mFLWM.b5_nUTGT.b13_nAzGfFM_sLsv3_ns_i_a2_5[3] NOR3A Y Out 0.483 2.725 - b13_nAzGfFM_sLsv3_ns_i_a2_5[3] Net - - 0.275 - 1 iice_inst_0.b7_12mFLWM.b5_nUTGT.b13_nAzGfFM_sLsv3_ns_i_a2[3] OR3C A In - 3.000 - iice_inst_0.b7_12mFLWM.b5_nUTGT.b13_nAzGfFM_sLsv3_ns_i_a2[3] OR3C Y Out 0.389 3.389 - N_344 Net - - 1.829 - 11 iice_inst_0.b7_12mFLWM.b5_nUTGT.b12_voSc3_gmasbb_0_a2_0 NOR2 A In - 5.217 - iice_inst_0.b7_12mFLWM.b5_nUTGT.b12_voSc3_gmasbb_0_a2_0 NOR2 Y Out 0.376 5.593 - N_346 Net - - 0.829 - 4 iice_inst_0.b7_12mFLWM.b5_nUTGT.b12_voSc3_gmasbb_0_a2 OR2B A In - 6.422 - iice_inst_0.b7_12mFLWM.b5_nUTGT.b12_voSc3_gmasbb_0_a2 OR2B Y Out 0.384 6.806 - N_366 Net - - 0.463 - 2 iice_inst_0.b7_12mFLWM.b5_nUTGT.b12_voSc3_gmasbb_0 OR2A A In - 7.268 - iice_inst_0.b7_12mFLWM.b5_nUTGT.b12_voSc3_gmasbb_0 OR2A Y Out 0.399 7.667 - b8_SoWGfWYY Net - - 2.322 - 20 iice_inst_0.b3_SoW.b8_jAA_KlCO_1_sqmuxa_0_a2 NOR3 C In - 9.989 - iice_inst_0.b3_SoW.b8_jAA_KlCO_1_sqmuxa_0_a2 NOR3 Y Out 0.545 10.534 - b8_jAA_KlCO_1_sqmuxa Net - - 0.463 - 2 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_1 AND2 B In - 10.996 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_1 AND2 Y Out 0.460 11.456 - DWACT_ADD_CI_0_TMP[0] Net - - 0.463 - 2 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_44 NOR2B A In - 11.918 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_44 NOR2B Y Out 0.384 12.302 - DWACT_ADD_CI_0_g_array_1[0] Net - - 0.646 - 3 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_43 NOR2B A In - 12.948 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_43 NOR2B Y Out 0.384 13.331 - DWACT_ADD_CI_0_g_array_2[0] Net - - 0.829 - 4 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_42 NOR2B A In - 14.160 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_42 NOR2B Y Out 0.384 14.544 - DWACT_ADD_CI_0_g_array_11[0] Net - - 0.463 - 2 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_50 NOR2B A In - 15.006 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_50 NOR2B Y Out 0.384 15.390 - DWACT_ADD_CI_0_g_array_12_2[0] Net - - 0.275 - 1 iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_34 XOR2 B In - 15.665 - iice_inst_0.b3_SoW.un1_b9_2_mzCDYXs.I_34 XOR2 Y Out 0.681 16.346 - I_34_1 Net - - 0.275 - 1 iice_inst_0.b3_SoW.b8_2FsG_vuY.b9_2_mzCDYXs_5_i[7] NOR3A A In - 16.620 - iice_inst_0.b3_SoW.b8_2FsG_vuY.b9_2_mzCDYXs_5_i[7] NOR3A Y Out 0.483 17.103 - b9_2_mzCDYXs_5_i[7] Net - - 0.275 - 1 iice_inst_0.b3_SoW.b9_2_mzCDYXs[7] DFN1 D In - 17.378 - ============================================================================================================================== Total path delay (propagation time + setup) of 17.688 is 6.992(39.5%) logic and 10.696(60.5%) route. ==================================== Detailed Report for Clock: config_top|C2.clk60M_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock -------------------------------------------------------------------------------------------------------------- U1.sbulk config_top|C2.clk60M_inferred_clock DFN1C1 Q sbulk 0.476 982.807 U1.ssector config_top|C2.clk60M_inferred_clock DFN1C1 Q ssector 0.476 982.905 M1.NVM_INST config_top|C2.clk60M_inferred_clock NVM BUSY busy1 8.313 984.083 M2.NVM_INST config_top|C2.clk60M_inferred_clock NVM BUSY busy2 8.313 984.181 U1.xaddr[0] config_top|C2.clk60M_inferred_clock DFN1E1C1 Q xaddr[0] 0.476 984.804 U1.xaddr[1] config_top|C2.clk60M_inferred_clock DFN1E1C1 Q xaddr[1] 0.476 985.863 U1.xaddr[2] config_top|C2.clk60M_inferred_clock DFN1E1C1 Q xaddr[2] 0.476 985.927 U1.xaddr[3] config_top|C2.clk60M_inferred_clock DFN1E1C1 Q xaddr[3] 0.476 987.054 U1.xaddr[4] config_top|C2.clk60M_inferred_clock DFN1E1C1 Q xaddr[4] 0.476 987.119 U1.xaddr[5] config_top|C2.clk60M_inferred_clock DFN1E1C1 Q xaddr[5] 0.476 988.246 ============================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock --------------------------------------------------------------------------------------------------------------------- U1.xaddr[18] config_top|C2.clk60M_inferred_clock DFN1E1C1 D xaddr_4[18] 999.590 982.807 U1.xaddr[17] config_top|C2.clk60M_inferred_clock DFN1E1C1 D xaddr_4[17] 999.590 982.837 U1.xaddr[16] config_top|C2.clk60M_inferred_clock DFN1E1C1 D xaddr_4[16] 999.590 983.604 U1.state2[1] config_top|C2.clk60M_inferred_clock DFN1C1 D N_461_i_0 999.590 984.083 U1.state2_0[1] config_top|C2.clk60M_inferred_clock DFN1C1 D N_461_i_0 999.590 984.083 U1.state2[0] config_top|C2.clk60M_inferred_clock DFN1C1 D state2_ns[9] 999.590 984.256 U1.xaddr[15] config_top|C2.clk60M_inferred_clock DFN1E1C1 D xaddr_4[15] 999.590 984.670 U1.xaddr[14] config_top|C2.clk60M_inferred_clock DFN1E1C1 D xaddr_4[14] 999.710 984.834 U1.xaddr[13] config_top|C2.clk60M_inferred_clock DFN1E1C1 D xaddr_4[13] 999.590 985.861 U1.xaddr[12] config_top|C2.clk60M_inferred_clock DFN1E1C1 D xaddr_4[12] 999.710 986.026 ===================================================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.410 = Required time: 999.590 - Propagation time: 16.783 = Slack (non-critical) : 982.807 Number of logic level(s): 14 Starting point: U1.sbulk / Q Ending point: U1.xaddr[18] / D The start point is clocked by config_top|C2.clk60M_inferred_clock [rising] on pin CLK The end point is clocked by config_top|C2.clk60M_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ---------------------------------------------------------------------------------------------------------- U1.sbulk DFN1C1 Q Out 0.476 0.476 - sbulk Net - - 1.017 - 5 U1.state2_tr11_i_o2_0 OR2 B In - 1.493 - U1.state2_tr11_i_o2_0 OR2 Y Out 0.474 1.967 - un2_wip Net - - 1.449 - 8 U1.un1_xaddr.ADD_19x19_slow_I0_un1_CO1 OR2A B In - 3.416 - U1.un1_xaddr.ADD_19x19_slow_I0_un1_CO1 OR2A Y Out 0.474 3.890 - I0_un1_CO1_0 Net - - 0.646 - 3 U1.un1_xaddr.ADD_19x19_slow_I2_un1_CO1 OR3B C In - 4.536 - U1.un1_xaddr.ADD_19x19_slow_I2_un1_CO1 OR3B Y Out 0.546 5.082 - I2_un1_CO1_0 Net - - 0.646 - 3 U1.un1_xaddr.ADD_19x19_slow_I4_un1_CO1 OR3B C In - 5.728 - U1.un1_xaddr.ADD_19x19_slow_I4_un1_CO1 OR3B Y Out 0.546 6.274 - I4_un1_CO1_0 Net - - 0.646 - 3 U1.un1_xaddr.ADD_19x19_slow_I6_un1_CO1 OR3B C In - 6.919 - U1.un1_xaddr.ADD_19x19_slow_I6_un1_CO1 OR3B Y Out 0.546 7.465 - I6_un1_CO1 Net - - 0.463 - 2 U1.un1_xaddr.ADD_19x19_slow_I7_CO1_1 AO1C B In - 7.928 - U1.un1_xaddr.ADD_19x19_slow_I7_CO1_1 AO1C Y Out 0.435 8.363 - N220_1 Net - - 0.646 - 3 U1.un1_xaddr.ADD_19x19_slow_I9_CO1 OR3B C In - 9.008 - U1.un1_xaddr.ADD_19x19_slow_I9_CO1 OR3B Y Out 0.546 9.554 - N226 Net - - 0.646 - 3 U1.un1_xaddr.ADD_19x19_slow_I11_CO1 OR3B C In - 10.200 - U1.un1_xaddr.ADD_19x19_slow_I11_CO1 OR3B Y Out 0.546 10.746 - N234 Net - - 0.646 - 3 U1.un1_xaddr.ADD_19x19_slow_I13_CO1 OR3B C In - 11.392 - U1.un1_xaddr.ADD_19x19_slow_I13_CO1 OR3B Y Out 0.546 11.938 - N242 Net - - 0.646 - 3 U1.un1_xaddr.ADD_19x19_slow_I15_CO1 OR3B C In - 12.584 - U1.un1_xaddr.ADD_19x19_slow_I15_CO1 OR3B Y Out 0.546 13.130 - N250 Net - - 0.463 - 2 U1.un1_xaddr.ADD_19x19_slow_I16_un1_CO1 NOR2A B In - 13.592 - U1.un1_xaddr.ADD_19x19_slow_I16_un1_CO1 NOR2A Y Out 0.304 13.896 - I16_un1_CO1 Net - - 0.463 - 2 U1.un1_xaddr.ADD_19x19_slow_I18_Y AX1E A In - 14.359 - U1.un1_xaddr.ADD_19x19_slow_I18_Y AX1E Y Out 0.711 15.069 - un1_xaddr_i[18] Net - - 0.275 - 1 U1.P12.xaddr_4[18] MX2A A In - 15.344 - U1.P12.xaddr_4[18] MX2A Y Out 0.429 15.774 - N_612 Net - - 0.275 - 1 U1.P12.xaddr_4_r[18] NOR2A A In - 16.049 - U1.P12.xaddr_4_r[18] NOR2A Y Out 0.460 16.508 - xaddr_4[18] Net - - 0.275 - 1 U1.xaddr[18] DFN1E1C1 D In - 16.783 - ========================================================================================================== Total path delay (propagation time + setup) of 17.193 is 7.993(46.5%) logic and 9.199(53.5%) route. ==================================== Detailed Report for Clock: config_top|CLK ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------ U1.cmnd[5] config_top|CLK DFN1E1C1 Q uplink_8_a[11] 0.476 490.455 U1.cmnd[3] config_top|CLK DFN1E1C1 Q uplink_8_a[13] 0.476 490.697 U1.cmnd[6] config_top|CLK DFN1E1C1 Q uplink_8_a[10] 0.476 490.963 U1.cmnd[4] config_top|CLK DFN1E1C1 Q uplink_8_a[12] 0.476 491.205 U1.cmnd[1] config_top|CLK DFN1E1C1 Q uplink_8_a[15] 0.476 491.605 U1.cmnd[2] config_top|CLK DFN1E1C1 Q uplink_8_a[14] 0.476 491.613 U1.bit_cnt[0] config_top|CLK DFN1C1 Q uplink_8_a[8] 0.476 492.206 U1.cmnd[0] config_top|CLK DFN1E1C1 Q uplink_8_a[16] 0.476 492.584 U1.bit_cnt[2] config_top|CLK DFN1C1 Q uplink_8_a[6] 0.476 492.794 U1.bit_cnt[1] config_top|CLK DFN1C1 Q uplink_8_a[7] 0.476 492.833 ================================================================================================ Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock -------------------------------------------------------------------------------------------- U1.rdata[0] config_top|CLK DFN0C1 D rdata_3[0] 499.590 490.455 U1.rdata[1] config_top|CLK DFN0C1 D rdata_3[1] 499.590 490.455 U1.rdata[2] config_top|CLK DFN0C1 D rdata_3[2] 499.590 490.455 U1.rdata[3] config_top|CLK DFN0C1 D rdata_3[3] 499.590 490.455 U1.rdata[4] config_top|CLK DFN0C1 D rdata_3[4] 499.590 490.455 U1.rdata[5] config_top|CLK DFN0C1 D rdata_3[5] 499.590 490.466 U1.rdata[6] config_top|CLK DFN0C1 D rdata_3[6] 499.590 490.466 U1.rdata[7] config_top|CLK DFN0C1 D rdata_3[7] 499.590 490.466 U1.start[7] config_top|CLK DFN1C1 D start_2[7] 999.690 988.033 U1.state[0] config_top|CLK DFN1E1C1 D state_ns[7] 999.590 988.648 ============================================================================================ Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 500.000 - Setup time: 0.410 = Required time: 499.590 - Propagation time: 9.136 = Slack (critical) : 490.455 Number of logic level(s): 5 Starting point: U1.cmnd[5] / Q Ending point: U1.rdata[0] / D The start point is clocked by config_top|CLK [rising] on pin CLK The end point is clocked by config_top|CLK [falling] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) -------------------------------------------------------------------------------------- U1.cmnd[5] DFN1E1C1 Q Out 0.476 0.476 - uplink_8_a[11] Net - - 1.305 - 7 U1.un1_idis_1 OR2 B In - 1.781 - U1.un1_idis_1 OR2 Y Out 0.474 2.255 - un1_idis_1 Net - - 1.161 - 6 U1.un10_nxt0_2 NOR2 B In - 3.416 - U1.un10_nxt0_2 NOR2 Y Out 0.474 3.890 - nxt3_1_0 Net - - 1.305 - 7 U1.nxt3 NOR2A A In - 5.195 - U1.nxt3 NOR2A Y Out 0.460 5.654 - nvm_read Net - - 1.161 - 6 U1.P5.rdata_3_sn_m2 NOR2A B In - 6.815 - U1.P5.rdata_3_sn_m2 NOR2A Y Out 0.304 7.119 - N_553 Net - - 1.449 - 8 U1.P5.rdata_3[0] MX2C S In - 8.568 - U1.P5.rdata_3[0] MX2C Y Out 0.293 8.861 - rdata_3[0] Net - - 0.275 - 1 U1.rdata[0] DFN0C1 D In - 9.136 - ====================================================================================== Total path delay (propagation time + setup) of 9.545 is 2.891(30.3%) logic and 6.655(69.7%) route. ==================================== Detailed Report for Clock: jtag_interface|b3_PK3_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ---------------------------------------------------------------------------------------------------------------------------------------- iice_inst_0.b3_SoW.b9_v_mzCDYXs[6] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[6] 0.476 986.669 iice_inst_0.b3_SoW.b9_v_mzCDYXs[2] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[2] 0.476 986.748 iice_inst_0.b3_SoW.b9_v_mzCDYXs[7] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[7] 0.476 986.893 iice_inst_0.b3_SoW.b9_v_mzCDYXs[8] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[8] 0.476 986.955 iice_inst_0.b3_SoW.b9_v_mzCDYXs[3] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[3] 0.476 986.973 iice_inst_0.b3_SoW.b9_v_mzCDYXs[4] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[4] 0.476 987.499 iice_inst_0.b3_SoW.b9_v_mzCDYXs[5] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[5] 0.476 987.567 iice_inst_0.b3_SoW.b9_v_mzCDYXs[1] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[1] 0.476 987.647 iice_inst_0.b3_SoW.b9_v_mzCDYXs[0] jtag_interface|b3_PK3_inferred_clock DFN1 Q b9_v_mzCDYXs[0] 0.476 987.727 iice_inst_0.b3_SoW.b7_nYJ_BFM[52] jtag_interface|b3_PK3_inferred_clock DFN1 Q b7_nYJ_BFM[52] 0.476 989.062 ======================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ---------------------------------------------------------------------------------------------------------------------------------------------------------- iice_inst_0.b3_SoW.b9_v_mzCDYXs[7] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[7] 999.690 986.669 iice_inst_0.b3_SoW.b9_v_mzCDYXs[6] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[6] 999.690 987.327 iice_inst_0.b3_SoW.b9_v_mzCDYXs[5] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[5] 999.690 987.515 iice_inst_0.b3_SoW.b9_v_mzCDYXs[8] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[8] 999.690 987.515 iice_inst_0.b3_SoW.b9_v_mzCDYXs[4] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[4] 999.690 988.173 iice_inst_0.b3_SoW.b9_v_mzCDYXs[3] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[3] 999.690 988.727 iice_inst_0.b3_SoW.b9_v_mzCDYXs[2] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[2] 999.690 989.386 iice_inst_0.b3_SoW.b11_OFWNT9_X1eH.b6_yor0PD[9] jtag_interface|b3_PK3_inferred_clock DFN1E0 D b6_yor0PD_5[9] 999.590 989.891 iice_inst_0.b3_SoW.b9_v_mzCDYXs[1] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[1] 999.690 990.415 iice_inst_0.b3_SoW.b9_v_mzCDYXs[0] jtag_interface|b3_PK3_inferred_clock DFN1 D b9_v_mzCDYXs_5[0] 999.690 991.337 ========================================================================================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.310 = Required time: 999.690 - Propagation time: 13.021 = Slack (non-critical) : 986.669 Number of logic level(s): 11 Starting point: iice_inst_0.b3_SoW.b9_v_mzCDYXs[6] / Q Ending point: iice_inst_0.b3_SoW.b9_v_mzCDYXs[7] / D The start point is clocked by jtag_interface|b3_PK3_inferred_clock [rising] on pin CLK The end point is clocked by jtag_interface|b3_PK3_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) --------------------------------------------------------------------------------------------------------------------- iice_inst_0.b3_SoW.b9_v_mzCDYXs[6] DFN1 Q Out 0.476 0.476 - b9_v_mzCDYXs[6] Net - - 1.741 - 10 iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb_0 NOR2B B In - 2.218 - iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb_0 NOR2B Y Out 0.460 2.677 - un10_b11_vfsg_9urxbb_0 Net - - 0.275 - 1 iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb_5 NOR3C C In - 2.952 - iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb_5 NOR3C Y Out 0.484 3.436 - un10_b11_vfsg_9urxbb_5 Net - - 0.275 - 1 iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb NOR3C B In - 3.711 - iice_inst_0.b3_SoW.b8_vFsG_vuY.un10_b11_vfsg_9urxbb NOR3C Y Out 0.469 4.180 - un10_b11_vfsg_9urxbb Net - - 0.275 - 1 iice_inst_0.b3_SoW.b9_v_mzCDYXs_1_sqmuxa NOR3A C In - 4.455 - iice_inst_0.b3_SoW.b9_v_mzCDYXs_1_sqmuxa NOR3A Y Out 0.527 4.982 - b9_v_mzCDYXs_1_sqmuxa Net - - 1.829 - 11 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_1 AND2 B In - 6.811 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_1 AND2 Y Out 0.460 7.270 - DWACT_ADD_CI_0_TMP_0[0] Net - - 0.463 - 2 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_44 NOR2B A In - 7.733 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_44 NOR2B Y Out 0.384 8.116 - DWACT_ADD_CI_0_g_array_1_0[0] Net - - 0.646 - 3 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_43 NOR2B A In - 8.762 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_43 NOR2B Y Out 0.384 9.146 - DWACT_ADD_CI_0_g_array_2_0[0] Net - - 0.829 - 4 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_42 NOR2B A In - 9.975 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_42 NOR2B Y Out 0.384 10.358 - DWACT_ADD_CI_0_g_array_11_0[0] Net - - 0.463 - 2 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_50 NOR2B A In - 10.821 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_50 NOR2B Y Out 0.384 11.204 - DWACT_ADD_CI_0_g_array_12_2_0[0] Net - - 0.275 - 1 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_34 XOR2 B In - 11.479 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_34 XOR2 Y Out 0.681 12.160 - I_34_0 Net - - 0.275 - 1 iice_inst_0.b3_SoW.b8_vFsG_vuY.b9_v_mzCDYXs_5[7] OA1A C In - 12.435 - iice_inst_0.b3_SoW.b8_vFsG_vuY.b9_v_mzCDYXs_5[7] OA1A Y Out 0.312 12.746 - b9_v_mzCDYXs_5[7] Net - - 0.275 - 1 iice_inst_0.b3_SoW.b9_v_mzCDYXs[7] DFN1 D In - 13.021 - ===================================================================================================================== Total path delay (propagation time + setup) of 13.331 is 5.712(42.8%) logic and 7.619(57.2%) route. ==================================== Detailed Report for Clock: jtag_interface|b7_oSD_3vW_inferred_clock ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------------------------------------------ comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[0] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[0] 0.476 998.357 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[1] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[1] 0.476 998.651 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[2] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[2] 0.476 998.651 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[3] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[3] 0.476 998.651 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[4] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[4] 0.476 998.651 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[5] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 Q b9_OvyH3_saL[5] 0.476 998.651 ====================================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ----------------------------------------------------------------------------------------------------------------------------------------------------------- comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw jtag_interface|b7_oSD_3vW_inferred_clock UJTAG UTDO b6_PLF_Bq 1000.000 998.357 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[0] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 D b9_OvyH3_saL[1] 999.590 998.651 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[1] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 D b9_OvyH3_saL[2] 999.590 998.651 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[2] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 D b9_OvyH3_saL[3] 999.590 998.651 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[3] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 D b9_OvyH3_saL[4] 999.590 998.651 comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[4] jtag_interface|b7_oSD_3vW_inferred_clock DFN1E1 D b9_OvyH3_saL[5] 999.590 998.651 =========================================================================================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.000 = Required time: 1000.000 - Propagation time: 1.643 = Slack (non-critical) : 998.357 Number of logic level(s): 1 Starting point: comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[0] / Q Ending point: comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw / UTDO The start point is clocked by jtag_interface|b7_oSD_3vW_inferred_clock [rising] on pin CLK The end point is clocked by System [rising] Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) -------------------------------------------------------------------------------------------------------------- comm_block_inst.b7_Rcmi_ql.b9_OvyH3_saL[0] DFN1E1 Q Out 0.476 0.476 - b9_OvyH3_saL[0] Net - - 0.463 - 2 comm_block_inst.b7_Rcmi_ql.b3_PLF MX2 A In - 0.939 - comm_block_inst.b7_Rcmi_ql.b3_PLF MX2 Y Out 0.429 1.369 - b6_PLF_Bq Net - - 0.275 - 1 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw UJTAG UTDO In - 1.643 - ============================================================================================================== Total path delay (propagation time + setup) of 1.643 is 0.906(55.1%) logic and 0.738(44.9%) route. ==================================== Detailed Report for Clock: jtag_interface|identify_clk2_no_clk_buffer_needed ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ---------------------------------------------------------------------------------------------------------------------------------------------------------------------- comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[2] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b13_nvmFL_fx2rbuQ[1] 0.476 992.834 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[1] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b13_nvmFL_fx2rbuQ[0] 0.476 993.057 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[3] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b13_nvmFL_fx2rbuQ[2] 0.476 993.827 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[0] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b11_uRrc_WYOFjZ[0] 0.476 993.910 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[4] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b13_nvmFL_fx2rbuQ[3] 0.476 994.704 comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[5] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E0 Q b12_ORbIwXaEF_bd 0.476 995.466 ====================================================================================================================================================================== Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw jtag_interface|identify_clk2_no_clk_buffer_needed UJTAG UTDO b6_PLF_Bq 1000.000 992.834 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[0] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 E b15_nYhI39swMeEd_Mg 999.650 993.910 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[1] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 E b15_nYhI39swMeEd_Mg 999.650 993.910 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[2] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 E b15_nYhI39swMeEd_Mg 999.650 993.910 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[3] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 E b15_nYhI39swMeEd_Mg 999.650 993.910 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[4] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 E b15_nYhI39swMeEd_Mg 999.650 993.910 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[5] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 E b15_nYhI39swMeEd_Mg 999.650 993.910 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[6] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 E b15_nYhI39swMeEd_Mg 999.650 993.910 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[7] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 E b15_nYhI39swMeEd_Mg 999.650 993.910 iice_inst_0.b7_12mFLWM.b5_nUTGT.b11_nUTGT_khWqH.b3_nUT[8] jtag_interface|identify_clk2_no_clk_buffer_needed DFN1E1 E b15_nYhI39swMeEd_Mg 999.650 993.910 ==================================================================================================================================================================================== Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.000 = Required time: 1000.000 - Propagation time: 7.166 = Slack (non-critical) : 992.834 Number of logic level(s): 6 Starting point: comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[2] / Q Ending point: comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw / UTDO The start point is clocked by jtag_interface|identify_clk2_no_clk_buffer_needed [rising] on pin CLK The end point is clocked by System [rising] Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ---------------------------------------------------------------------------------------------------------------------------- comm_block_inst.b7_Rcmi_ql.b10_dZst39_EF3[2] DFN1E0 Q Out 0.476 0.476 - b13_nvmFL_fx2rbuQ[1] Net - - 1.741 - 10 iice_inst_0.b8_uKr_IFLY.b12_PLF_6lN_8tYv.b3_PLF_iv_i_a6_2_1 OR2A B In - 2.218 - iice_inst_0.b8_uKr_IFLY.b12_PLF_6lN_8tYv.b3_PLF_iv_i_a6_2_1 OR2A Y Out 0.474 2.692 - N_12_1 Net - - 0.646 - 3 iice_inst_0.b8_uKr_IFLY.b3_PLF_0 OA1B A In - 3.337 - iice_inst_0.b8_uKr_IFLY.b3_PLF_0 OA1B Y Out 0.662 4.000 - b3_PLF_0 Net - - 0.275 - 1 iice_inst_0.b8_uKr_IFLY.b3_PLF_2 NOR3C B In - 4.275 - iice_inst_0.b8_uKr_IFLY.b3_PLF_2 NOR3C Y Out 0.469 4.743 - b3_PLF_2 Net - - 0.275 - 1 iice_inst_0.b8_uKr_IFLY.b3_PLF NOR3C B In - 5.018 - iice_inst_0.b8_uKr_IFLY.b3_PLF NOR3C Y Out 0.469 5.487 - b3_PLF Net - - 0.275 - 1 comm_block_inst.b9_PLF_TJkrj MX2 A In - 5.762 - comm_block_inst.b9_PLF_TJkrj MX2 Y Out 0.429 6.191 - b9_PLF_TJkrj Net - - 0.275 - 1 comm_block_inst.b7_Rcmi_ql.b3_PLF MX2 B In - 6.466 - comm_block_inst.b7_Rcmi_ql.b3_PLF MX2 Y Out 0.425 6.891 - b6_PLF_Bq Net - - 0.275 - 1 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw UJTAG UTDO In - 7.166 - ============================================================================================================================ Total path delay (propagation time + setup) of 7.166 is 3.405(47.5%) logic and 3.762(52.5%) route. ==================================== Detailed Report for Clock: System ==================================== Starting Points with Worst Slack ******************************** Starting Arrival Instance Reference Type Pin Net Time Slack Clock ------------------------------------------------------------------------------------------------------------------------- comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG3 b6_uS_MrX[2] 0.000 980.108 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG5 b6_uS_MrX[4] 0.000 980.127 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG4 b6_uS_MrX[3] 0.000 980.292 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG2 b6_uS_MrX[1] 0.000 980.911 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG6 b3_1Um 0.000 981.067 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UIREG1 b6_uS_MrX[0] 0.000 981.607 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UDRCAP b7_nFG0rDY 0.000 982.177 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UDRSH b5_OvyH3 0.000 985.035 comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw System UJTAG UTDI b6_nv_0CC 0.000 996.764 ========================================================================================================================= Ending Points with Worst Slack ****************************** Starting Required Instance Reference Type Pin Net Time Slack Clock ---------------------------------------------------------------------------------------------------------------- iice_inst_0.b3_SoW.b9_v_mzCDYXs[7] System DFN1 D b9_v_mzCDYXs_5[7] 999.690 980.108 iice_inst_0.b3_SoW.b9_v_mzCDYXs[6] System DFN1 D b9_v_mzCDYXs_5[6] 999.690 980.767 iice_inst_0.b3_SoW.b9_v_mzCDYXs[5] System DFN1 D b9_v_mzCDYXs_5[5] 999.690 980.954 iice_inst_0.b3_SoW.b9_v_mzCDYXs[8] System DFN1 D b9_v_mzCDYXs_5[8] 999.690 980.954 iice_inst_0.b3_SoW.b9_v_mzCDYXs[4] System DFN1 D b9_v_mzCDYXs_5[4] 999.690 981.613 iice_inst_0.b3_SoW.b9_v_mzCDYXs[3] System DFN1 D b9_v_mzCDYXs_5[3] 999.690 982.167 iice_inst_0.b3_SoW.b9_v_mzCDYXs[2] System DFN1 D b9_v_mzCDYXs_5[2] 999.690 982.825 iice_inst_0.b3_SoW.b9_v_mzCDYXs[1] System DFN1 D b9_v_mzCDYXs_5[1] 999.690 983.855 iice_inst_0.b3_SoW.b9_v_mzCDYXs[0] System DFN1 D b9_v_mzCDYXs_5[0] 999.690 984.777 iice_inst_0.b3_SoW.b7_nYJ_BFM[0] System DFN1 D b7_nYJ_BFM_1[0] 999.590 987.856 ================================================================================================================ Worst Path Information View Worst Path in Analyst *********************** Path information for path number 1: Requested Period: 1000.000 - Setup time: 0.310 = Required time: 999.690 - Propagation time: 19.582 = Slack (non-critical) : 980.108 Number of logic level(s): 13 Starting point: comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw / UIREG3 Ending point: iice_inst_0.b3_SoW.b9_v_mzCDYXs[7] / D The start point is clocked by System [rising] The end point is clocked by jtag_interface|b3_PK3_inferred_clock [rising] on pin CLK Instance / Net Pin Pin Arrival No. of Name Type Name Dir Delay Time Fan Out(s) ------------------------------------------------------------------------------------------------------------------------ comm_block_inst.jtag_block.jtagi.b9_Rcmi_KsDw UJTAG UIREG3 Out 0.000 0.000 - b6_uS_MrX[2] Net - - 0.275 - 1 comm_block_inst.jtag_block.jtagi.b10_8Kz_fFfsjX_2_1 OR3 C In - 0.275 - comm_block_inst.jtag_block.jtagi.b10_8Kz_fFfsjX_2_1 OR3 Y Out 0.545 0.820 - b10_8Kz_fFfsjX_2_1 Net - - 0.463 - 2 comm_block_inst.jtag_block.jtagi.b9_nv_cLqgOF_0 OR3A B In - 1.282 - comm_block_inst.jtag_block.jtagi.b9_nv_cLqgOF_0 OR3A Y Out 0.527 1.810 - b9_nv_cLqgOF_0 Net - - 0.829 - 4 comm_block_inst.jtag_block.jtagi.b10_nv_ywKMm9X NOR3B C In - 2.639 - comm_block_inst.jtag_block.jtagi.b10_nv_ywKMm9X NOR3B Y Out 0.361 3.000 - b10_nv_ywKMm9X Net - - 2.697 - 33 I_78 CLKINT A In - 5.697 - I_78 CLKINT Y Out 0.131 5.828 - comm2iice_link_iice_0_a_0[7] Net - - 1.911 - 36 iice_inst_0.b3_SoW.b11_OFWNT9_X1eH.b6_yor0PD_0_sqmuxa OR2B A In - 7.739 - iice_inst_0.b3_SoW.b11_OFWNT9_X1eH.b6_yor0PD_0_sqmuxa OR2B Y Out 0.384 8.123 - b14_voSc3_sr2kFHQz Net - - 2.937 - 55 iice_inst_0.b3_SoW.b9_v_mzCDYXs_1_sqmuxa NOR3A A In - 11.060 - iice_inst_0.b3_SoW.b9_v_mzCDYXs_1_sqmuxa NOR3A Y Out 0.483 11.543 - b9_v_mzCDYXs_1_sqmuxa Net - - 1.829 - 11 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_1 AND2 B In - 13.371 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_1 AND2 Y Out 0.460 13.831 - DWACT_ADD_CI_0_TMP_0[0] Net - - 0.463 - 2 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_44 NOR2B A In - 14.293 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_44 NOR2B Y Out 0.384 14.677 - DWACT_ADD_CI_0_g_array_1_0[0] Net - - 0.646 - 3 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_43 NOR2B A In - 15.323 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_43 NOR2B Y Out 0.384 15.706 - DWACT_ADD_CI_0_g_array_2_0[0] Net - - 0.829 - 4 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_42 NOR2B A In - 16.535 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_42 NOR2B Y Out 0.384 16.919 - DWACT_ADD_CI_0_g_array_11_0[0] Net - - 0.463 - 2 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_50 NOR2B A In - 17.381 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_50 NOR2B Y Out 0.384 17.765 - DWACT_ADD_CI_0_g_array_12_2_0[0] Net - - 0.275 - 1 iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_34 XOR2 B In - 18.040 - iice_inst_0.b3_SoW.un1_b9_v_mzCDYXs.I_34 XOR2 Y Out 0.681 18.720 - I_34_0 Net - - 0.275 - 1 iice_inst_0.b3_SoW.b8_vFsG_vuY.b9_v_mzCDYXs_5[7] OA1A C In - 18.995 - iice_inst_0.b3_SoW.b8_vFsG_vuY.b9_v_mzCDYXs_5[7] OA1A Y Out 0.312 19.307 - b9_v_mzCDYXs_5[7] Net - - 0.275 - 1 iice_inst_0.b3_SoW.b9_v_mzCDYXs[7] DFN1 D In - 19.582 - ======================================================================================================================== Total path delay (propagation time + setup) of 19.892 is 5.726(28.8%) logic and 14.165(71.2%) route. ##### END OF TIMING REPORT #####] -------------------------------------------------------------------------------- Report for cell config_top.rtl Core Cell usage: cell count area count*area DFN1 283 1.0 283.0 MX2 235 1.0 235.0 DFN1E1 186 1.0 186.0 NOR2B 130 1.0 130.0 GND 91 0.0 0.0 VCC 91 0.0 0.0 XOR2 87 1.0 87.0 DFN1C1 80 1.0 80.0 XNOR2 67 1.0 67.0 DFN1E1C1 62 1.0 62.0 NOR2A 59 1.0 59.0 OR2B 59 1.0 59.0 AOI1B 58 1.0 58.0 NOR3C 56 1.0 56.0 NOR2 54 1.0 54.0 ZOR3I 52 1.0 52.0 OR2 45 1.0 45.0 OAI1 44 1.0 44.0 MX2C 43 1.0 43.0 DFN1E0 40 1.0 40.0 AND2 37 1.0 37.0 AX1B 36 1.0 36.0 NOR3A 30 1.0 30.0 NOR3 30 1.0 30.0 AO1 29 1.0 29.0 NOR3B 26 1.0 26.0 AO1B 24 1.0 24.0 AND3 22 1.0 22.0 OR2A 21 1.0 21.0 OR3A 19 1.0 19.0 OR3 19 1.0 19.0 OR3B 18 1.0 18.0 XO1 16 1.0 16.0 OA1B 13 1.0 13.0 OA1A 10 1.0 10.0 OR3C 10 1.0 10.0 DFN1P1 10 1.0 10.0 DFN0C1 8 1.0 8.0 INV 8 1.0 8.0 DFN1E1P1 8 1.0 8.0 AX1 7 1.0 7.0 RAM512X18 6 0.0 0.0 MAJ3 6 1.0 6.0 BUFF 5 1.0 5.0 AO1C 4 1.0 4.0 AO1D 4 1.0 4.0 AOI1 3 1.0 3.0 AO1A 3 1.0 3.0 AX1C 3 1.0 3.0 MX2A 3 1.0 3.0 AX1E 2 1.0 2.0 OA1C 2 1.0 2.0 CLKINT 2 0.0 0.0 NVM 2 0.0 0.0 XA1A 2 1.0 2.0 XNOR3 1 1.0 1.0 RCOSC 1 0.0 0.0 RAM4K9 1 0.0 0.0 PLL 1 0.0 0.0 MIN3 1 1.0 1.0 AO13 1 1.0 1.0 MX2B 1 1.0 1.0 XA1C 1 1.0 1.0 OA1 1 1.0 1.0 MIN3XI 1 1.0 1.0 ----- ---------- TOTAL 2280 2085.0 IO Cell usage: cell count CLKBUF 2 INBUF 2 BIBUF 1 UJTAG 1 ----- TOTAL 6 Mapper successful! Process took 0h:00m:11s realtime, 0h:00m:09s cputime # Fri Feb 09 13:54:54 2007 ###########################################################]