m255
13
cModel Technology
dD:\Actelprj\SPI_SRAM_CONFIG\simulation
Econfig_top
w1190760759
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
8D:/Actelprj/SPI_SRAM_CONFIG/designer/impl1/config_top_ba.vhd
FD:/Actelprj/SPI_SRAM_CONFIG/designer/impl1/config_top_ba.vhd
l0
L9
VmL4Pm0]U0nXF5YQ87ME<J3
OW;C;6.2g;35
31
o-93 -explicit -work postlayout -O0
Adef_arch
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work config_top mL4Pm0]U0nXF5YQ87ME<J3
l920
L20
V;W0QJWnZehLaj;A;dA=@S3
OW;C;6.2g;35
31
M1 ieee std_logic_1164
o-93 -explicit -work postlayout -O0
Estimulus
w1190759668
DP ieee numeric_bit K1ChclJ;R]bj:<QN8`za13
DP ieee math_real zjAF7SKfg_RPI0GT^n1N`1
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2
DP std textio K]Z^fghZ6B=BjnK5NomDT3
DP syncad_vhdl_lib tbdefinitions PMU4]dAG[[aiNNb<^FQc11
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
8D:/Actelprj/SPI_SRAM_CONFIG/stimulus/config_top_tbench_new.vhd
FD:/Actelprj/SPI_SRAM_CONFIG/stimulus/config_top_tbench_new.vhd
l0
L25
V8U1M1gR5X?CBJUW8egG7A2
OW;C;6.2g;35
31
o-93 -explicit -work postlayout -O0
Astimulator
DE syncad_vhdl_lib tb_clock_minmax aM]9B9_YHE>hN00bcbDcf1
DP ieee numeric_bit K1ChclJ;R]bj:<QN8`za13
DP ieee math_real zjAF7SKfg_RPI0GT^n1N`1
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2
DP std textio K]Z^fghZ6B=BjnK5NomDT3
DP syncad_vhdl_lib tbdefinitions PMU4]dAG[[aiNNb<^FQc11
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work stimulus 8U1M1gR5X?CBJUW8egG7A2
l54
L35
V5DQ:oLfTcAQmSG]To>^5c0
OW;C;6.2g;35
31
M7 ieee std_logic_1164
M6 syncad_vhdl_lib tbdefinitions
M5 std textio
M4 ieee std_logic_textio
M3 ieee std_logic_arith
M2 ieee math_real
M1 ieee numeric_bit
o-93 -explicit -work postlayout -O0
Etestbench
w1190759668
DP ieee numeric_bit K1ChclJ;R]bj:<QN8`za13
DP ieee math_real zjAF7SKfg_RPI0GT^n1N`1
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2
DP std textio K]Z^fghZ6B=BjnK5NomDT3
DP syncad_vhdl_lib tbdefinitions PMU4]dAG[[aiNNb<^FQc11
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
8D:/Actelprj/SPI_SRAM_CONFIG/stimulus/config_top_tbench_new.vhd
FD:/Actelprj/SPI_SRAM_CONFIG/stimulus/config_top_tbench_new.vhd
l0
L158
Va`mISab<CcMmEjWUE1:l?1
OW;C;6.2g;35
31
o-93 -explicit -work postlayout -O0
Atbgeneratedcode
DE work config_top mL4Pm0]U0nXF5YQ87ME<J3
DE work stimulus 8U1M1gR5X?CBJUW8egG7A2
DP ieee numeric_bit K1ChclJ;R]bj:<QN8`za13
DP ieee math_real zjAF7SKfg_RPI0GT^n1N`1
DP ieee std_logic_arith GJbAT?7@hRQU9IQ702DT]2
DP ieee std_logic_textio 8YS?iX`WD1REQG`ZRYQGB2
DP std textio K]Z^fghZ6B=BjnK5NomDT3
DP syncad_vhdl_lib tbdefinitions PMU4]dAG[[aiNNb<^FQc11
DP ieee std_logic_1164 GH1=`jDDBJ=`LM;:Ak`kf2
DE work testbench a`mISab<CcMmEjWUE1:l?1
l169
L160
ViRImn0Bz?@MkdB;KOzdQD0
OW;C;6.2g;35
31
M7 ieee std_logic_1164
M6 syncad_vhdl_lib tbdefinitions
M5 std textio
M4 ieee std_logic_textio
M3 ieee std_logic_arith
M2 ieee math_real
M1 ieee numeric_bit
o-93 -explicit -work postlayout -O0
