#  
# This is an automatically generated script file for loading the instrumented 
# design into Identify (used mostly for Identify testing purposes) 
# 
compile add -vhdl -work work  "D:/Libero72/Synplify/Synplify_85F/lib/proasic/fusion.vhd"
compile add -vhdl -work work  "D:/ProgrammingSRAM/sconfig/synthesis/rev_1_identify_4/instr_sources/smartgen/rc_osc/rc_osc.vhd"
compile add -vhdl -work work  "D:/ProgrammingSRAM/sconfig/synthesis/rev_1_identify_4/instr_sources/smartgen/PLL_60_40_10/PLL_60_40_10.vhd"
compile add -vhdl -work work  "D:/ProgrammingSRAM/sconfig/synthesis/rev_1_identify_4/instr_sources/smartgen/ram256x8/ram256x8.vhd"
compile add -vhdl -work work  "D:/ProgrammingSRAM/sconfig/synthesis/rev_1_identify_4/instr_sources/hdl/sconfig.vhd"
compile add -vhdl -work work  "D:/ProgrammingSRAM/sconfig/synthesis/rev_1_identify_4/instr_sources/smartgen/cfgnvm/cfgnvm.vhd"
compile add -vhdl -work work  "D:/ProgrammingSRAM/sconfig/synthesis/rev_1_identify_4/instr_sources/hdl/config_top.vhd"
compile add "D:/ProgrammingSRAM/sconfig/synthesis/rev_1_identify_4/instr_sources/syn_dics.vhd"
compile toplevel config_top
instrumentation new rev_1_identify_4
instrumentation load rev_1_identify_4
device family Fusion 
