#-- Synplicity, Inc.
#-- Version 9.4A1
#-- Project file D:\Appsnotes\2009\SPI_to_I2C\Review\Design_files\SPI_I2C\synthesis\run_options.txt
#-- Written on Wed Mar 25 16:47:05 2009


#add_file options
add_file -vhdl -lib work "D:/Appsnotes/2009/SPI_to_I2C/Review/Design_files/SPI_I2C/hdl/my_spi_slave_32.vhd"
add_file -vhdl -lib work "D:/Appsnotes/2009/SPI_to_I2C/Review/Design_files/SPI_I2C/hdl/TinyI2C_master.vhd"
add_file -vhdl -lib work "D:/Appsnotes/2009/SPI_to_I2C/Review/Design_files/SPI_I2C/hdl/Top_spi_i2c.vhd"


#implementation: "synthesis"
impl -add synthesis -type fpga

#device options
set_option -technology IGLOO+
set_option -part AGLP125V2
set_option -package CS281
set_option -speed_grade Std
set_option -part_companion ""

#compilation/mapping options
set_option -default_enum_encoding default
set_option -resource_sharing 1
set_option -use_fsm_explorer 0
set_option -top_module "work.Top_spi_i2c"

#map options
set_option -frequency 20.000
set_option -xst_mode 0
set_option -run_prop_extract 1
set_option -fanout_limit 24
set_option -globalthreshold 50
set_option -maxfan_hard 0
set_option -disable_io_insertion 0
set_option -retiming 0
set_option -report_path 4000
set_option -opcond COMWC
set_option -update_models_cp 0
set_option -preserve_registers 0


#sequential_optimizations options
set_option -symbolic_fsm_compiler 1

#simulation options
set_option -write_verilog 0
set_option -write_vhdl 0

#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_format "edif"
project -result_file "./Top_spi_i2c.edn"
impl -active "synthesis"
