----------------------------------------------------------------------
-- Created by SmartDesign Mon Nov 13 12:39:36 2017
-- Version: v11.8 SP2 11.8.2.4
----------------------------------------------------------------------

----------------------------------------------------------------------
-- Libraries
----------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;

library smartfusion2;
use smartfusion2.all;
----------------------------------------------------------------------
-- MC_System entity declaration
----------------------------------------------------------------------
entity MC_System is
    -- Port list
    port(
        -- Inputs
        AMBA_SLAVE_0_PRDATAS0  : in    std_logic_vector(31 downto 0);
        AMBA_SLAVE_0_PREADYS0  : in    std_logic;
        AMBA_SLAVE_0_PSLVERRS0 : in    std_logic;
        AMBA_SLAVE_1_PRDATAS1  : in    std_logic_vector(31 downto 0);
        AMBA_SLAVE_1_PREADYS1  : in    std_logic;
        AMBA_SLAVE_1_PSLVERRS1 : in    std_logic;
        DEVRST_N               : in    std_logic;
        USB_ULPI_DIR           : in    std_logic;
        USB_ULPI_NXT           : in    std_logic;
        USB_ULPI_XCLK          : in    std_logic;
        -- Outputs
        AMBA_SLAVE_0_PADDRS    : out   std_logic_vector(31 downto 0);
        AMBA_SLAVE_0_PENABLES  : out   std_logic;
        AMBA_SLAVE_0_PSELS0    : out   std_logic;
        AMBA_SLAVE_0_PWDATAS   : out   std_logic_vector(31 downto 0);
        AMBA_SLAVE_0_PWRITES   : out   std_logic;
        AMBA_SLAVE_1_PADDRS    : out   std_logic_vector(31 downto 0);
        AMBA_SLAVE_1_PENABLES  : out   std_logic;
        AMBA_SLAVE_1_PSELS1    : out   std_logic;
        AMBA_SLAVE_1_PWDATAS   : out   std_logic_vector(31 downto 0);
        AMBA_SLAVE_1_PWRITES   : out   std_logic;
        FAB_CCC_GL1            : out   std_logic;
        FIC_0_CLK              : out   std_logic;
        FIC_0_LOCK             : out   std_logic;
        GPIO_0_M2F             : out   std_logic;
        USB_ULPI_STP           : out   std_logic;
        -- Inouts
        USB_ULPI_DATA          : inout std_logic_vector(7 downto 0)
        );
end MC_System;
----------------------------------------------------------------------
-- MC_System architecture body
----------------------------------------------------------------------
architecture RTL of MC_System is
----------------------------------------------------------------------
-- Component declarations
----------------------------------------------------------------------
-- MC_System_sb
component MC_System_sb
    -- Port list
    port(
        -- Inputs
        AMBA_SLAVE_0_PRDATAS0  : in    std_logic_vector(31 downto 0);
        AMBA_SLAVE_0_PREADYS0  : in    std_logic;
        AMBA_SLAVE_0_PSLVERRS0 : in    std_logic;
        AMBA_SLAVE_1_PRDATAS1  : in    std_logic_vector(31 downto 0);
        AMBA_SLAVE_1_PREADYS1  : in    std_logic;
        AMBA_SLAVE_1_PSLVERRS1 : in    std_logic;
        DEVRST_N               : in    std_logic;
        FAB_RESET_N            : in    std_logic;
        USB_ULPI_DIR           : in    std_logic;
        USB_ULPI_NXT           : in    std_logic;
        USB_ULPI_XCLK          : in    std_logic;
        -- Outputs
        AMBA_SLAVE_0_PADDRS    : out   std_logic_vector(31 downto 0);
        AMBA_SLAVE_0_PENABLES  : out   std_logic;
        AMBA_SLAVE_0_PSELS0    : out   std_logic;
        AMBA_SLAVE_0_PWDATAS   : out   std_logic_vector(31 downto 0);
        AMBA_SLAVE_0_PWRITES   : out   std_logic;
        AMBA_SLAVE_1_PADDRS    : out   std_logic_vector(31 downto 0);
        AMBA_SLAVE_1_PENABLES  : out   std_logic;
        AMBA_SLAVE_1_PSELS1    : out   std_logic;
        AMBA_SLAVE_1_PWDATAS   : out   std_logic_vector(31 downto 0);
        AMBA_SLAVE_1_PWRITES   : out   std_logic;
        FAB_CCC_GL1            : out   std_logic;
        FAB_CCC_LOCK           : out   std_logic;
        FIC_0_CLK              : out   std_logic;
        FIC_0_LOCK             : out   std_logic;
        GPIO_0_M2F             : out   std_logic;
        INIT_DONE              : out   std_logic;
        MSS_READY              : out   std_logic;
        POWER_ON_RESET_N       : out   std_logic;
        USB_ULPI_STP           : out   std_logic;
        -- Inouts
        USB_ULPI_DATA          : inout std_logic_vector(7 downto 0)
        );
end component;
----------------------------------------------------------------------
-- Signal declarations
----------------------------------------------------------------------
signal AMBA_SLAVE_0_PADDR         : std_logic_vector(31 downto 0);
signal AMBA_SLAVE_0_PENABLE       : std_logic;
signal AMBA_SLAVE_0_PSELx         : std_logic;
signal AMBA_SLAVE_0_PWDATA        : std_logic_vector(31 downto 0);
signal AMBA_SLAVE_0_PWRITE        : std_logic;
signal AMBA_SLAVE_1_PADDR         : std_logic_vector(31 downto 0);
signal AMBA_SLAVE_1_PENABLE       : std_logic;
signal AMBA_SLAVE_1_PSELx         : std_logic;
signal AMBA_SLAVE_1_PWDATA        : std_logic_vector(31 downto 0);
signal AMBA_SLAVE_1_PWRITE        : std_logic;
signal FAB_CCC_GL1_net_0          : std_logic;
signal FIC_0_CLK_net_0            : std_logic;
signal FIC_0_LOCK_net_0           : std_logic;
signal GPIO_0_M2F_net_0           : std_logic;
signal USB_ULPI_STP_net_0         : std_logic;
signal USB_ULPI_STP_net_1         : std_logic;
signal GPIO_0_M2F_net_1           : std_logic;
signal FAB_CCC_GL1_net_1          : std_logic;
signal FIC_0_CLK_net_1            : std_logic;
signal AMBA_SLAVE_1_PSELx_net_0   : std_logic;
signal AMBA_SLAVE_1_PENABLE_net_0 : std_logic;
signal AMBA_SLAVE_1_PWRITE_net_0  : std_logic;
signal AMBA_SLAVE_0_PSELx_net_0   : std_logic;
signal AMBA_SLAVE_0_PENABLE_net_0 : std_logic;
signal AMBA_SLAVE_0_PWRITE_net_0  : std_logic;
signal FIC_0_LOCK_net_1           : std_logic;
signal AMBA_SLAVE_1_PADDR_net_0   : std_logic_vector(31 downto 0);
signal AMBA_SLAVE_1_PWDATA_net_0  : std_logic_vector(31 downto 0);
signal AMBA_SLAVE_0_PADDR_net_0   : std_logic_vector(31 downto 0);
signal AMBA_SLAVE_0_PWDATA_net_0  : std_logic_vector(31 downto 0);
----------------------------------------------------------------------
-- TiedOff Signals
----------------------------------------------------------------------
signal VCC_net                    : std_logic;

begin
----------------------------------------------------------------------
-- Constant assignments
----------------------------------------------------------------------
 VCC_net <= '1';
----------------------------------------------------------------------
-- Top level output port assignments
----------------------------------------------------------------------
 USB_ULPI_STP_net_1                <= USB_ULPI_STP_net_0;
 USB_ULPI_STP                      <= USB_ULPI_STP_net_1;
 GPIO_0_M2F_net_1                  <= GPIO_0_M2F_net_0;
 GPIO_0_M2F                        <= GPIO_0_M2F_net_1;
 FAB_CCC_GL1_net_1                 <= FAB_CCC_GL1_net_0;
 FAB_CCC_GL1                       <= FAB_CCC_GL1_net_1;
 FIC_0_CLK_net_1                   <= FIC_0_CLK_net_0;
 FIC_0_CLK                         <= FIC_0_CLK_net_1;
 AMBA_SLAVE_1_PSELx_net_0          <= AMBA_SLAVE_1_PSELx;
 AMBA_SLAVE_1_PSELS1               <= AMBA_SLAVE_1_PSELx_net_0;
 AMBA_SLAVE_1_PENABLE_net_0        <= AMBA_SLAVE_1_PENABLE;
 AMBA_SLAVE_1_PENABLES             <= AMBA_SLAVE_1_PENABLE_net_0;
 AMBA_SLAVE_1_PWRITE_net_0         <= AMBA_SLAVE_1_PWRITE;
 AMBA_SLAVE_1_PWRITES              <= AMBA_SLAVE_1_PWRITE_net_0;
 AMBA_SLAVE_0_PSELx_net_0          <= AMBA_SLAVE_0_PSELx;
 AMBA_SLAVE_0_PSELS0               <= AMBA_SLAVE_0_PSELx_net_0;
 AMBA_SLAVE_0_PENABLE_net_0        <= AMBA_SLAVE_0_PENABLE;
 AMBA_SLAVE_0_PENABLES             <= AMBA_SLAVE_0_PENABLE_net_0;
 AMBA_SLAVE_0_PWRITE_net_0         <= AMBA_SLAVE_0_PWRITE;
 AMBA_SLAVE_0_PWRITES              <= AMBA_SLAVE_0_PWRITE_net_0;
 FIC_0_LOCK_net_1                  <= FIC_0_LOCK_net_0;
 FIC_0_LOCK                        <= FIC_0_LOCK_net_1;
 AMBA_SLAVE_1_PADDR_net_0          <= AMBA_SLAVE_1_PADDR;
 AMBA_SLAVE_1_PADDRS(31 downto 0)  <= AMBA_SLAVE_1_PADDR_net_0;
 AMBA_SLAVE_1_PWDATA_net_0         <= AMBA_SLAVE_1_PWDATA;
 AMBA_SLAVE_1_PWDATAS(31 downto 0) <= AMBA_SLAVE_1_PWDATA_net_0;
 AMBA_SLAVE_0_PADDR_net_0          <= AMBA_SLAVE_0_PADDR;
 AMBA_SLAVE_0_PADDRS(31 downto 0)  <= AMBA_SLAVE_0_PADDR_net_0;
 AMBA_SLAVE_0_PWDATA_net_0         <= AMBA_SLAVE_0_PWDATA;
 AMBA_SLAVE_0_PWDATAS(31 downto 0) <= AMBA_SLAVE_0_PWDATA_net_0;
----------------------------------------------------------------------
-- Component instances
----------------------------------------------------------------------
-- MC_System_sb_0
MC_System_sb_0 : MC_System_sb
    port map( 
        -- Inputs
        USB_ULPI_DIR           => USB_ULPI_DIR,
        USB_ULPI_NXT           => USB_ULPI_NXT,
        USB_ULPI_XCLK          => USB_ULPI_XCLK,
        FAB_RESET_N            => VCC_net,
        AMBA_SLAVE_0_PREADYS0  => AMBA_SLAVE_0_PREADYS0,
        AMBA_SLAVE_0_PSLVERRS0 => AMBA_SLAVE_0_PSLVERRS0,
        AMBA_SLAVE_1_PREADYS1  => AMBA_SLAVE_1_PREADYS1,
        AMBA_SLAVE_1_PSLVERRS1 => AMBA_SLAVE_1_PSLVERRS1,
        DEVRST_N               => DEVRST_N,
        AMBA_SLAVE_0_PRDATAS0  => AMBA_SLAVE_0_PRDATAS0,
        AMBA_SLAVE_1_PRDATAS1  => AMBA_SLAVE_1_PRDATAS1,
        -- Outputs
        USB_ULPI_STP           => USB_ULPI_STP_net_0,
        POWER_ON_RESET_N       => OPEN,
        INIT_DONE              => OPEN,
        AMBA_SLAVE_0_PSELS0    => AMBA_SLAVE_0_PSELx,
        AMBA_SLAVE_0_PENABLES  => AMBA_SLAVE_0_PENABLE,
        AMBA_SLAVE_0_PWRITES   => AMBA_SLAVE_0_PWRITE,
        AMBA_SLAVE_1_PSELS1    => AMBA_SLAVE_1_PSELx,
        AMBA_SLAVE_1_PENABLES  => AMBA_SLAVE_1_PENABLE,
        AMBA_SLAVE_1_PWRITES   => AMBA_SLAVE_1_PWRITE,
        FIC_0_CLK              => FIC_0_CLK_net_0,
        FIC_0_LOCK             => FIC_0_LOCK_net_0,
        FAB_CCC_GL1            => FAB_CCC_GL1_net_0,
        FAB_CCC_LOCK           => OPEN,
        MSS_READY              => OPEN,
        GPIO_0_M2F             => GPIO_0_M2F_net_0,
        AMBA_SLAVE_0_PADDRS    => AMBA_SLAVE_0_PADDR,
        AMBA_SLAVE_0_PWDATAS   => AMBA_SLAVE_0_PWDATA,
        AMBA_SLAVE_1_PADDRS    => AMBA_SLAVE_1_PADDR,
        AMBA_SLAVE_1_PWDATAS   => AMBA_SLAVE_1_PWDATA,
        -- Inouts
        USB_ULPI_DATA          => USB_ULPI_DATA 
        );

end RTL;
