#add_file options
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Microsemi/SolutionCore/BLDC_ESTIMATOR/4.2.0/Encrypted/bldc_estimator.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Microsemi/SolutionCore/FOC_TRANSFORMS/4.1.1/Encrypted/FOC_Transforms.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Microsemi/SolutionCore/OLMNG/4.1.1/Encrypted/olmng.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Microsemi/SolutionCore/PWM3PH/4.1.2/Encrypted/PWM3ph.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Microsemi/SolutionCore/PWM_SCALING/4.1.0/Encrypted/pwm_scaling.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Microsemi/SolutionCore/RATE_LIMITER/4.1.0/Encrypted/rate_limiter.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Microsemi/SolutionCore/SEQ_CONTROLLER/4.1.1/Encrypted/seq_controller.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Microsemi/SolutionCore/SPEED_ID_IQ_PI/4.1.0/Encrypted/speed_id_iq_pi.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Microsemi/SolutionCore/SVM/4.1.0/Encrypted/svm.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/hdl/adc_interface_795x.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/hdl/apb3_if.vhd"
add_file -lib ADC_SCALING_LIB -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Microsemi/SolutionCore/ADC_SCALING/4.2.0/Encrypted/adc_scaling.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/work/Bldc_Axis/Bldc_Axis.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Actel/DirectCore/CoreResetP/7.0.104/rtl/vhdl/core/coreresetp_pcie_hotreset.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Actel/DirectCore/CoreResetP/7.0.104/rtl/vhdl/core/coreresetp.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/work/MC_System_sb/CCC_0/MC_System_sb_CCC_0_FCCC.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Actel/SgCore/OSC/1.0.103/osc_comps.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/work/MC_System_sb/FABOSC_0/MC_System_sb_FABOSC_0_OSC.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/work/MC_System_sb_MSS/MC_System_sb_MSS_syn.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/work/MC_System_sb_MSS/MC_System_sb_MSS.vhd"
add_file -lib COREAPB3_LIB -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Actel/DirectCore/CoreAPB3/4.1.100/rtl/vhdl/core/coreapb3_muxptob3.vhd"
add_file -lib COREAPB3_LIB -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Actel/DirectCore/CoreAPB3/4.1.100/rtl/vhdl/core/coreapb3_iaddr_reg.vhd"
add_file -lib COREAPB3_LIB -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Actel/DirectCore/CoreAPB3/4.1.100/rtl/vhdl/core/coreapb3.vhd"
add_file -lib COREAPB3_LIB -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Actel/DirectCore/CoreAPB3/4.1.100/rtl/vhdl/core/components.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/work/MC_System_sb/MC_System_sb.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/work/MC_System/MC_System.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/Microsemi/SolutionCore/STEPPER_THETA/4.1.0/Encrypted/stepper_theta.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/hdl/apb3_if_st.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/work/Stepper_Axis/Stepper_Axis.vhd"
add_file -vhdl "F:/SVN/MotorControl/Release/WebRelease/LiberoProjects/SK1ABLSLST10/LiberoProject/SK2ABLSLST10_5_1/component/work/MC_System_top/MC_System_top.vhd"



#project files


#implementation: "synthesis"
impl -add synthesis -type fpga

#
#implementation attributes

set_option -vlog_std v2001

set_option -vhdl2008 1

#device options
set_option -technology SmartFusion2
set_option -part M2S010
set_option -package FBGA484
set_option -speed_grade -1
#compilation/mapping options
set_option -use_fsm_explorer 0
# hdl_compiler_options
set_option -distributed_compile 0

# mapper_without_write_options
set_option -frequency 100.000
set_option -srs_instrumentation 1

set_option -top_module work.MC_System_top

# mapper_options
set_option -write_verilog 0
set_option -write_vhdl 0

# actel_options
set_option -rw_check_on_ram 0

# Microsemi G4
set_option -run_prop_extract 1
set_option -maxfan 10000
set_option -clock_globalthreshold 2
set_option -async_globalthreshold 12
set_option -globalthreshold 5000
set_option -low_power_ram_decomp 0
set_option -seqshift_to_uram 0
set_option -opcond COMTC
set_option -retiming 0
set_option -report_path 4000
set_option -update_models_cp 0
set_option -preserve_registers 0
# NFilter
set_option -no_sequential_opt 0

# sequential_optimization_options
set_option -symbolic_fsm_compiler 1

# Compiler Options
set_option -compiler_compatible 0
set_option -resource_sharing 1

# Compiler Options
set_option -auto_infer_blackbox 0

# Compiler Options
#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_file "./MC_System_top_1.vm"
impl -active "synthesis"
