Implementation;Generate BitStream;RootName:MC_System_top
Implementation;Generate BitStream||(null)||Please refer to the log file for details||MC_System_top_generateBitstream.log;liberoaction://open_report/file/MC_System_top_generateBitstream.log||(null);(null)
HelpInfo,F:\Microsemi\Libero_SoC_v11.8\SynplifyPro\lib\html,fpgahelp.qhc,errormessages.mp,F:\Microsemi\Libero_SoC_v11.8\SynplifyPro\bin\mbin\assistant
Implementation;Synthesis;RootName:MC_System_top
Implementation;Synthesis|| CL271 ||@W:Pruning unused bits 7 to 3 of s_sys_clk_count_4(7 downto 0). If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.||MC_System_top_1.srr(51);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/51||adc_interface_795x.vhd(539);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/539
Implementation;Synthesis|| CL190 ||@W:Optimizing register bit s_spi_mosi(0) to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(53);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/53||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL190 ||@W:Optimizing register bit s_spi_mosi(1) to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(54);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/54||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL190 ||@W:Optimizing register bit s_spi_mosi(2) to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(55);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/55||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL190 ||@W:Optimizing register bit s_spi_mosi(3) to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(56);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/56||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL190 ||@W:Optimizing register bit s_spi_mosi(4) to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(57);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/57||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL190 ||@W:Optimizing register bit s_spi_mosi(5) to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(58);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/58||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL190 ||@W:Optimizing register bit s_spi_mosi(13) to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(59);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/59||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL190 ||@W:Optimizing register bit s_spi_mosi(14) to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(60);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/60||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL190 ||@W:Optimizing register bit s_spi_mosi(15) to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(61);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/61||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL279 ||@W:Pruning register bits 15 to 13 of s_spi_mosi(15 downto 0). If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.||MC_System_top_1.srr(62);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/62||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL279 ||@W:Pruning register bits 5 to 0 of s_spi_mosi(15 downto 0). If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.||MC_System_top_1.srr(63);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/63||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL240 ||@W:Signal XTLOSC_O2F is floating; a simulation mismatch is possible.||MC_System_top_1.srr(87);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/87||MC_System_sb_FABOSC_0_OSC.vhd(16);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\work\MC_System_sb\FABOSC_0\MC_System_sb_FABOSC_0_OSC.vhd'/linenumber/16
Implementation;Synthesis|| CL240 ||@W:Signal XTLOSC_CCC is floating; a simulation mismatch is possible.||MC_System_top_1.srr(88);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/88||MC_System_sb_FABOSC_0_OSC.vhd(15);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\work\MC_System_sb\FABOSC_0\MC_System_sb_FABOSC_0_OSC.vhd'/linenumber/15
Implementation;Synthesis|| CL240 ||@W:Signal RCOSC_1MHZ_O2F is floating; a simulation mismatch is possible.||MC_System_top_1.srr(89);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/89||MC_System_sb_FABOSC_0_OSC.vhd(14);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\work\MC_System_sb\FABOSC_0\MC_System_sb_FABOSC_0_OSC.vhd'/linenumber/14
Implementation;Synthesis|| CL240 ||@W:Signal RCOSC_1MHZ_CCC is floating; a simulation mismatch is possible.||MC_System_top_1.srr(90);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/90||MC_System_sb_FABOSC_0_OSC.vhd(13);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\work\MC_System_sb\FABOSC_0\MC_System_sb_FABOSC_0_OSC.vhd'/linenumber/13
Implementation;Synthesis|| CD434 ||@W:Signal soft_ext_reset_out in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(92);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/92||coreresetp.vhd(477);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/477
Implementation;Synthesis|| CD434 ||@W:Signal soft_reset_f2m in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(93);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/93||coreresetp.vhd(478);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/478
Implementation;Synthesis|| CD434 ||@W:Signal soft_m3_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(94);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/94||coreresetp.vhd(479);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/479
Implementation;Synthesis|| CD434 ||@W:Signal soft_mddr_ddr_axi_s_core_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(95);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/95||coreresetp.vhd(480);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/480
Implementation;Synthesis|| CD434 ||@W:Signal soft_fddr_core_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(96);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/96||coreresetp.vhd(481);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/481
Implementation;Synthesis|| CD434 ||@W:Signal soft_sdif0_phy_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(97);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/97||coreresetp.vhd(482);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/482
Implementation;Synthesis|| CD434 ||@W:Signal soft_sdif0_core_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(98);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/98||coreresetp.vhd(483);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/483
Implementation;Synthesis|| CD434 ||@W:Signal soft_sdif1_phy_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(99);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/99||coreresetp.vhd(484);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/484
Implementation;Synthesis|| CD434 ||@W:Signal soft_sdif1_core_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(100);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/100||coreresetp.vhd(485);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/485
Implementation;Synthesis|| CD434 ||@W:Signal soft_sdif2_phy_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(101);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/101||coreresetp.vhd(486);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/486
Implementation;Synthesis|| CD434 ||@W:Signal soft_sdif2_core_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(102);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/102||coreresetp.vhd(487);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/487
Implementation;Synthesis|| CD434 ||@W:Signal soft_sdif3_phy_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(103);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/103||coreresetp.vhd(488);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/488
Implementation;Synthesis|| CD434 ||@W:Signal soft_sdif3_core_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(104);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/104||coreresetp.vhd(489);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/489
Implementation;Synthesis|| CD434 ||@W:Signal soft_sdif0_0_core_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(105);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/105||coreresetp.vhd(490);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/490
Implementation;Synthesis|| CD434 ||@W:Signal soft_sdif0_1_core_reset in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(106);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/106||coreresetp.vhd(491);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/491
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_ddr_2(13 downto 0). Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(108);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/108||coreresetp.vhd(1519);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1519
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif3_1(12 downto 0). Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(109);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/109||coreresetp.vhd(1495);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1495
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif2_1(12 downto 0). Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(110);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/110||coreresetp.vhd(1471);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1471
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif1_1(12 downto 0). Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(111);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/111||coreresetp.vhd(1447);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1447
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif0_2(12 downto 0). Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(112);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/112||coreresetp.vhd(1423);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1423
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_ddr_enable_rcosc_2. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(113);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/113||coreresetp.vhd(1395);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1395
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_ddr_enable_q1_2. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(114);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/114||coreresetp.vhd(1395);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1395
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif3_enable_rcosc_2. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(115);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/115||coreresetp.vhd(1395);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1395
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif2_enable_rcosc_2. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(116);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/116||coreresetp.vhd(1395);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1395
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif1_enable_rcosc_2. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(117);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/117||coreresetp.vhd(1395);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1395
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif0_enable_rcosc_2. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(118);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/118||coreresetp.vhd(1395);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1395
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif3_enable_q1_2. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(119);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/119||coreresetp.vhd(1395);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1395
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif2_enable_q1_2. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(120);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/120||coreresetp.vhd(1395);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1395
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif1_enable_q1_2. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(121);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/121||coreresetp.vhd(1395);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1395
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif0_enable_q1_2. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(122);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/122||coreresetp.vhd(1395);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1395
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif3_enable_3. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(123);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/123||coreresetp.vhd(1311);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1311
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif2_enable_3. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(124);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/124||coreresetp.vhd(1252);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1252
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif1_enable_3. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(125);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/125||coreresetp.vhd(1193);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1193
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_sdif0_enable_3. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(126);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/126||coreresetp.vhd(1134);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1134
Implementation;Synthesis|| CL169 ||@W:Pruning unused register count_ddr_enable_3. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(127);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/127||coreresetp.vhd(1059);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1059
Implementation;Synthesis|| CL177 ||@W:Sharing sequential element M3_RESET_N_int. Add a syn_preserve attribute to the element to prevent sharing.||MC_System_top_1.srr(128);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/128||coreresetp.vhd(1331);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1331
Implementation;Synthesis|| CL177 ||@W:Sharing sequential element sdif2_spll_lock_q1. Add a syn_preserve attribute to the element to prevent sharing.||MC_System_top_1.srr(129);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/129||coreresetp.vhd(936);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/936
Implementation;Synthesis|| CL177 ||@W:Sharing sequential element sdif1_spll_lock_q1. Add a syn_preserve attribute to the element to prevent sharing.||MC_System_top_1.srr(130);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/130||coreresetp.vhd(936);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/936
Implementation;Synthesis|| CL177 ||@W:Sharing sequential element sdif0_spll_lock_q1. Add a syn_preserve attribute to the element to prevent sharing.||MC_System_top_1.srr(131);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/131||coreresetp.vhd(936);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/936
Implementation;Synthesis|| CL177 ||@W:Sharing sequential element fpll_lock_q1. Add a syn_preserve attribute to the element to prevent sharing.||MC_System_top_1.srr(132);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/132||coreresetp.vhd(936);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/936
Implementation;Synthesis|| CL190 ||@W:Optimizing register bit EXT_RESET_OUT_int to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(133);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/133||coreresetp.vhd(1376);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1376
Implementation;Synthesis|| CL169 ||@W:Pruning unused register release_ext_reset. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(134);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/134||coreresetp.vhd(1059);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1059
Implementation;Synthesis|| CL169 ||@W:Pruning unused register EXT_RESET_OUT_int. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(135);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/135||coreresetp.vhd(1376);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1376
Implementation;Synthesis|| CL169 ||@W:Pruning unused register sm2_state(2 downto 0). Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(136);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/136||coreresetp.vhd(1376);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1376
Implementation;Synthesis|| CL169 ||@W:Pruning unused register sm2_areset_n_q1. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(137);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/137||coreresetp.vhd(792);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/792
Implementation;Synthesis|| CL169 ||@W:Pruning unused register sm2_areset_n_clk_base. Make sure that there are no unused intermediate registers.||MC_System_top_1.srr(138);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/138||coreresetp.vhd(792);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/792
Implementation;Synthesis|| CD434 ||@W:Signal infill in the sensitivity list is not used in the process. Make sure all variables in the sensitivity list are referenced in the process.||MC_System_top_1.srr(141);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/141||coreapb3.vhd(1453);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\core\coreapb3.vhd'/linenumber/1453
Implementation;Synthesis|| CD638 ||@W:Signal ia_prdata is undriven. Either assign the signal a value or remove the signal declaration.||MC_System_top_1.srr(142);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/142||coreapb3.vhd(616);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vhdl\core\coreapb3.vhd'/linenumber/616
Implementation;Synthesis|| CL246 ||@W:Input port bits 31 to 12 of paddr_i(31 downto 0) are unused. Assign logic for all port bits or change the input port size.||MC_System_top_1.srr(177);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/177||apb3_if.vhd(63);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\apb3_if.vhd'/linenumber/63
Implementation;Synthesis|| CL246 ||@W:Input port bits 31 to 18 of pwdata_i(31 downto 0) are unused. Assign logic for all port bits or change the input port size.||MC_System_top_1.srr(178);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/178||apb3_if.vhd(65);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\apb3_if.vhd'/linenumber/65
Implementation;Synthesis|| CL177 ||@W:Sharing sequential element sdif0_spll_lock_q2. Add a syn_preserve attribute to the element to prevent sharing.||MC_System_top_1.srr(255);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/255||coreresetp.vhd(936);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/936
Implementation;Synthesis|| CL177 ||@W:Sharing sequential element fpll_lock_q2. Add a syn_preserve attribute to the element to prevent sharing.||MC_System_top_1.srr(256);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/256||coreresetp.vhd(936);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/936
Implementation;Synthesis|| CL177 ||@W:Sharing sequential element sdif1_spll_lock_q2. Add a syn_preserve attribute to the element to prevent sharing.||MC_System_top_1.srr(257);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/257||coreresetp.vhd(936);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/936
Implementation;Synthesis|| CL177 ||@W:Sharing sequential element sdif2_spll_lock_q2. Add a syn_preserve attribute to the element to prevent sharing.||MC_System_top_1.srr(258);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/258||coreresetp.vhd(936);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/936
Implementation;Synthesis|| CL279 ||@W:Pruning register bits 12 to 11 of s_spi_mosi(12 downto 6). If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level.||MC_System_top_1.srr(340);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/340||adc_interface_795x.vhd(197);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\adc_interface_795x.vhd'/linenumber/197
Implementation;Synthesis|| CL246 ||@W:Input port bits 31 to 12 of paddr_i(31 downto 0) are unused. Assign logic for all port bits or change the input port size.||MC_System_top_1.srr(347);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/347||apb3_if_st.vhd(60);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\apb3_if_st.vhd'/linenumber/60
Implementation;Synthesis|| CL246 ||@W:Input port bits 31 to 24 of pwdata_i(31 downto 0) are unused. Assign logic for all port bits or change the input port size.||MC_System_top_1.srr(348);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/348||apb3_if_st.vhd(62);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\hdl\apb3_if_st.vhd'/linenumber/62
Implementation;Synthesis|| BN132 ||@W:Removing sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.MDDR_DDR_AXI_S_CORE_RESET_N_int because it is equivalent to instance MC_System_0.MC_System_sb_0.CORERESETP_0.FDDR_CORE_RESET_N_int. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(447);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/447||coreresetp.vhd(1059);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1059
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF0_PERST_N_q1 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(448);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/448||coreresetp.vhd(703);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/703
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF1_PERST_N_q1 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(449);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/449||coreresetp.vhd(719);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/719
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF2_PERST_N_q1 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(450);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/450||coreresetp.vhd(735);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/735
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF3_PERST_N_q1 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(451);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/451||coreresetp.vhd(751);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/751
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.sm1_areset_n_q1 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(452);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/452||coreresetp.vhd(781);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/781
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF0_PERST_N_q2 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(453);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/453||coreresetp.vhd(703);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/703
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF1_PERST_N_q2 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(454);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/454||coreresetp.vhd(719);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/719
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF2_PERST_N_q2 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(455);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/455||coreresetp.vhd(735);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/735
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF3_PERST_N_q2 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(456);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/456||coreresetp.vhd(751);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/751
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.sm1_areset_n_clk_base is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(457);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/457||coreresetp.vhd(781);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/781
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF0_PERST_N_q3 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(458);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/458||coreresetp.vhd(703);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/703
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF1_PERST_N_q3 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(459);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/459||coreresetp.vhd(719);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/719
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF2_PERST_N_q3 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(460);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/460||coreresetp.vhd(735);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/735
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.SDIF3_PERST_N_q3 is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(461);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/461||coreresetp.vhd(751);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/751
Implementation;Synthesis|| MO129 ||@W:Sequential instance MC_System_0.MC_System_sb_0.CORERESETP_0.RESET_N_F2M_int is reduced to a combinational gate by constant propagation.||MC_System_top_1.srr(462);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/462||coreresetp.vhd(1331);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreresetp\7.0.104\rtl\vhdl\core\coreresetp.vhd'/linenumber/1331
Implementation;Synthesis|| MT530 ||@W:Found inferred clock MC_System_sb_CCC_0_FCCC|GL1_net_inferred_clock which controls 1727 sequential elements including Stepper_Axis_0.adc_interface_795x_0.spi_engine_inst.s_sck_count[5:0]. This clock has no specified timing constraint which may adversely impact design performance. ||MC_System_top_1.srr(583);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/583||adc_interface_795x.vhd(632);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/632
Implementation;Synthesis|| MT530 ||@W:Found inferred clock MC_System_sb_CCC_0_FCCC|GL0_net_inferred_clock which controls 3491 sequential elements including Bldc_Axis_0.adc_interface_795x_0.spi_engine_inst.s_sck_count[5:0]. This clock has no specified timing constraint which may adversely impact design performance. ||MC_System_top_1.srr(584);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/584||adc_interface_795x.vhd(632);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/632
Implementation;Synthesis|| BN114 ||@W:Removing instance SYSRESET_POR (in view: work.MC_System_sb(rtl)) of black box view:ACG4.SYSRESET(PRIM) because it does not drive other instances.||MC_System_top_1.srr(752);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/752||mc_system_sb.vhd(674);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\work\mc_system_sb\mc_system_sb.vhd'/linenumber/674
Implementation;Synthesis|| FA239 ||@W:ROM CoreAPB3_0.iPSELS_raw_5[1:0] (in view: work.MC_System_sb(rtl)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance.||MC_System_top_1.srr(757);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/757||coreapb3.vhd(648);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreapb3\4.1.100\rtl\vhdl\core\coreapb3.vhd'/linenumber/648
Implementation;Synthesis|| FA239 ||@W:ROM CoreAPB3_0.iPSELS_raw_5[1:0] (in view: work.MC_System_sb(rtl)) mapped in logic. To map to a technology ROM, apply attribute syn_romstyle on this instance.||MC_System_top_1.srr(758);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/758||coreapb3.vhd(648);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\actel\directcore\coreapb3\4.1.100\rtl\vhdl\core\coreapb3.vhd'/linenumber/648
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[15] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(772);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/772||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[14] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(773);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/773||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[13] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(774);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/774||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[12] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(775);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/775||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[11] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(776);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/776||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[10] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(777);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/777||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[9] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(778);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/778||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[8] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(779);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/779||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[7] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(780);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/780||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[6] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(781);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/781||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[5] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(782);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/782||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[4] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(783);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/783||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[3] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(784);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/784||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[2] (in view view:work.adc_interface_795x_0(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(785);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/785||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| BN132 ||@W:Removing instance Bldc_Axis_0.adc_interface_795x_0.s_channel_sel[1] because it is equivalent to instance Bldc_Axis_0.adc_interface_795x_0.s_channel_sel[0]. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(786);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/786||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[0] (in view view:work.spi_engine_0(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(787);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/787||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[1] (in view view:work.spi_engine_0(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(788);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/788||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[2] (in view view:work.spi_engine_0(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(789);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/789||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[3] (in view view:work.spi_engine_0(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(790);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/790||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[4] (in view view:work.spi_engine_0(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(791);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/791||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[5] (in view view:work.spi_engine_0(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(792);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/792||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[15] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(868);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/868||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[14] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(869);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/869||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[13] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(870);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/870||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[12] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(871);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/871||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[11] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(872);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/872||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[10] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(873);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/873||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[9] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(874);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/874||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[8] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(875);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/875||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[7] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(876);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/876||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[6] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(877);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/877||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[5] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(878);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/878||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[4] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(879);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/879||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[3] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(880);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/880||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_channel_sel[1] (in view view:work.adc_interface_795x_1(adc_interface)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(881);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/881||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| BN132 ||@W:Removing instance Stepper_Axis_0.adc_interface_795x_0.s_channel_sel[2] because it is equivalent to instance Stepper_Axis_0.adc_interface_795x_0.s_channel_sel[0]. To keep the instance, apply constraint syn_preserve=1 on the instance.||MC_System_top_1.srr(882);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/882||adc_interface_795x.vhd(368);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/368
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[0] (in view view:work.spi_engine_1(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(883);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/883||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[1] (in view view:work.spi_engine_1(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(884);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/884||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[2] (in view view:work.spi_engine_1(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(885);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/885||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[3] (in view view:work.spi_engine_1(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(886);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/886||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[4] (in view view:work.spi_engine_1(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(887);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/887||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MO160 ||@W:Register bit s_sdo_reg[5] (in view view:work.spi_engine_1(spi_engine)) is always 0. To keep the instance, apply syn_preserve=1 on the instance.||MC_System_top_1.srr(888);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/888||adc_interface_795x.vhd(584);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\hdl\adc_interface_795x.vhd'/linenumber/584
Implementation;Synthesis|| MT246 ||@W:Blackbox CCC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) ||MC_System_top_1.srr(1021);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/1021||mc_system_sb_ccc_0_fccc.vhd(110);liberoaction://cross_probe/hdl/file/'f:\svn\motorcontrol\release\webrelease\liberoprojects\sk1ablslst10\liberoproject\sk2ablslst10\sk2ablslst10_5_1\component\work\mc_system_sb\ccc_0\mc_system_sb_ccc_0_fccc.vhd'/linenumber/110
Implementation;Synthesis|| MT420 ||@W:Found inferred clock MC_System_sb_CCC_0_FCCC|GL0_net_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:MC_System_0.MC_System_sb_0.CCC_0.GL0_net"||MC_System_top_1.srr(1022);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/1022||null;null
Implementation;Synthesis|| MT420 ||@W:Found inferred clock MC_System_sb_CCC_0_FCCC|GL1_net_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:MC_System_0.MC_System_sb_0.CCC_0.GL1_net"||MC_System_top_1.srr(1023);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/1023||null;null
Implementation;Synthesis|| MT320 ||@N: This timing report is an estimate of place and route data. For final timing results, use the FPGA vendor place and route report.||MC_System_top_1.srr(1036);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/1036||null;null
Implementation;Synthesis|| MT322 ||@N: Clock constraints include only register-to-register paths associated with each individual clock.||MC_System_top_1.srr(1038);liberoaction://cross_probe/hdl/file/'F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLSLST10\LiberoProject\SK2ABLSLST10\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr'/linenumber/1038||null;null
Implementation;Compile;RootName:MC_System_top
Implementation;Compile||(null)||Please refer to the log file for details about 12 Warning(s) , 7 Info(s)||MC_System_top_compile_log.log;liberoaction://open_report/file/MC_System_top_compile_log.log||(null);(null)
Implementation;Place and Route;RootName:MC_System_top
Implementation;Place and Route||(null)||Please refer to the log file for details about 1 Info(s)||MC_System_top_layout_log.log;liberoaction://open_report/file/MC_System_top_layout_log.log||(null);(null)
Implementation;Generate Bitstream;RootName:MC_System_top
Implementation;Generate Bitstream||(null)||Please refer to the log file for details||MC_System_top_generateBitstream.log;liberoaction://open_report/file/MC_System_top_generateBitstream.log||(null);(null)
