----------------------------------------------------------------------
-- Created by SmartDesign Fri Dec 01 17:23:14 2017
-- Version: v11.8 SP2 11.8.2.4
----------------------------------------------------------------------

----------------------------------------------------------------------
-- Libraries
----------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;

library smartfusion2;
use smartfusion2.all;
library ADC_SCALING_LIB;
use ADC_SCALING_LIB.all;
----------------------------------------------------------------------
-- Stepper_Axis entity declaration
----------------------------------------------------------------------
entity Stepper_Axis is
    -- Port list
    port(
        -- Inputs
        adc_sdi_i   : in  std_logic;
        paddr_i_0   : in  std_logic_vector(31 downto 0);
        penable_i_0 : in  std_logic;
        psel_i_0    : in  std_logic;
        pwdata_i_0  : in  std_logic_vector(31 downto 0);
        pwrite_i_0  : in  std_logic;
        reset_i     : in  std_logic;
        sys_clk_i   : in  std_logic;
        -- Outputs
        adc_cs_o    : out std_logic;
        adc_sck_o   : out std_logic;
        adc_sdo_o   : out std_logic;
        prdata_o_0  : out std_logic_vector(31 downto 0);
        pready_o_0  : out std_logic;
        pslverr_o_0 : out std_logic;
        pwm_uh      : out std_logic;
        pwm_ul      : out std_logic;
        pwm_vh      : out std_logic;
        pwm_vl      : out std_logic;
        pwm_wh      : out std_logic;
        pwm_wl      : out std_logic
        );
end Stepper_Axis;
----------------------------------------------------------------------
-- Stepper_Axis architecture body
----------------------------------------------------------------------
architecture RTL of Stepper_Axis is
----------------------------------------------------------------------
-- Component declarations
----------------------------------------------------------------------
-- adc_interface_795x
component adc_interface_795x
    -- Port list
    port(
        -- Inputs
        channels_to_sample_i : in  std_logic_vector(15 downto 0);
        reset_i              : in  std_logic;
        sdi_i                : in  std_logic;
        start_i              : in  std_logic;
        sys_clk_i            : in  std_logic;
        -- Outputs
        cs_o                 : out std_logic;
        done_o               : out std_logic;
        result_ch0_o         : out std_logic_vector(11 downto 0);
        result_ch10_o        : out std_logic_vector(11 downto 0);
        result_ch11_o        : out std_logic_vector(11 downto 0);
        result_ch12_o        : out std_logic_vector(11 downto 0);
        result_ch13_o        : out std_logic_vector(11 downto 0);
        result_ch14_o        : out std_logic_vector(11 downto 0);
        result_ch15_o        : out std_logic_vector(11 downto 0);
        result_ch1_o         : out std_logic_vector(11 downto 0);
        result_ch2_o         : out std_logic_vector(11 downto 0);
        result_ch3_o         : out std_logic_vector(11 downto 0);
        result_ch4_o         : out std_logic_vector(11 downto 0);
        result_ch5_o         : out std_logic_vector(11 downto 0);
        result_ch6_o         : out std_logic_vector(11 downto 0);
        result_ch7_o         : out std_logic_vector(11 downto 0);
        result_ch8_o         : out std_logic_vector(11 downto 0);
        result_ch9_o         : out std_logic_vector(11 downto 0);
        sck_o                : out std_logic;
        sdo_o                : out std_logic
        );
end component;
-- ADC_SCALING   -   Microsemi:SolutionCore:ADC_SCALING:4.2.0
component ADC_SCALING
    generic( 
        g_ADC_RESULTS_WIDTH : integer := 12 ;
        g_DEBUG             : integer := 0 ;
        g_NO_MCYCLE_PATH    : integer := 2 ;
        g_SIGNED            : integer := 0 
        );
    -- Port list
    port(
        -- Inputs
        adc_result_ch0_i     : in  std_logic_vector(11 downto 0);
        adc_result_ch1_i     : in  std_logic_vector(11 downto 0);
        adc_results_rdy_i    : in  std_logic;
        adc_scale_val_i      : in  std_logic_vector(17 downto 0);
        fault_threshold_i    : in  std_logic_vector(17 downto 0);
        reset_i              : in  std_logic;
        sys_clk_i            : in  std_logic;
        -- Outputs
        calib_done_o         : out std_logic;
        done_o               : out std_logic;
        ia_adc_o             : out std_logic_vector(17 downto 0);
        ib_adc_o             : out std_logic_vector(17 downto 0);
        over_current_fault_o : out std_logic
        );
end component;
-- apb3_if_st
-- using entity instantiation for component apb3_if_st
-- FOC_TRANSFORMS   -   Microsemi:SolutionCore:FOC_TRANSFORMS:4.1.1
component FOC_TRANSFORMS
    generic( 
        g_NO_MCYCLE_PATH : integer := 2 
        );
    -- Port list
    port(
        -- Inputs
        ia_i            : in  std_logic_vector(17 downto 0);
        ialpha_i        : in  std_logic_vector(17 downto 0);
        ib_i            : in  std_logic_vector(17 downto 0);
        ibeta_i         : in  std_logic_vector(17 downto 0);
        reset_i         : in  std_logic;
        start_clarke_i  : in  std_logic;
        start_iclarke_i : in  std_logic;
        start_ipark_i   : in  std_logic;
        start_park_i    : in  std_logic;
        sys_clk_i       : in  std_logic;
        theta_i         : in  std_logic_vector(17 downto 0);
        valpha_i        : in  std_logic_vector(17 downto 0);
        vbeta_i         : in  std_logic_vector(17 downto 0);
        vd_i            : in  std_logic_vector(17 downto 0);
        vq_i            : in  std_logic_vector(17 downto 0);
        -- Outputs
        clarke_done_o   : out std_logic;
        ialpha_o        : out std_logic_vector(17 downto 0);
        ibeta_o         : out std_logic_vector(17 downto 0);
        iclarke_done_o  : out std_logic;
        id_o            : out std_logic_vector(17 downto 0);
        ipark_done_o    : out std_logic;
        iq_o            : out std_logic_vector(17 downto 0);
        park_done_o     : out std_logic;
        va_o            : out std_logic_vector(17 downto 0);
        valpha_o        : out std_logic_vector(17 downto 0);
        vb_o            : out std_logic_vector(17 downto 0);
        vbeta_o         : out std_logic_vector(17 downto 0);
        vc_o            : out std_logic_vector(17 downto 0)
        );
end component;
-- PWM3PH   -   Microsemi:SolutionCore:PWM3PH:4.1.2
component PWM3PH
    -- Port list
    port(
        -- Inputs
        dead_time_i    : in  std_logic_vector(17 downto 0);
        delay_time_i   : in  std_logic_vector(17 downto 0);
        en_dual_trig_i : in  std_logic;
        en_pwm_i       : in  std_logic;
        pwm_period_i   : in  std_logic_vector(17 downto 0);
        reset_i        : in  std_logic;
        sys_clk_i      : in  std_logic;
        va_i           : in  std_logic_vector(17 downto 0);
        vb_i           : in  std_logic_vector(17 downto 0);
        vc_i           : in  std_logic_vector(17 downto 0);
        -- Outputs
        PWM_AH_o       : out std_logic;
        PWM_AL_o       : out std_logic;
        PWM_BH_o       : out std_logic;
        PWM_BL_o       : out std_logic;
        PWM_CH_o       : out std_logic;
        PWM_CL_o       : out std_logic;
        midmatch_o     : out std_logic
        );
end component;
-- PWM_SCALING   -   Microsemi:SolutionCore:PWM_SCALING:4.1.0
component PWM_SCALING
    generic( 
        g_NO_MCYCLE_PATH : integer := 2 
        );
    -- Port list
    port(
        -- Inputs
        pwm_gain_i   : in  std_logic_vector(17 downto 0);
        pwm_period_i : in  std_logic_vector(17 downto 0);
        reset_i      : in  std_logic;
        start_i      : in  std_logic;
        sys_clk_i    : in  std_logic;
        va_i         : in  std_logic_vector(17 downto 0);
        vb_i         : in  std_logic_vector(17 downto 0);
        vc_i         : in  std_logic_vector(17 downto 0);
        -- Outputs
        Va_o         : out std_logic_vector(17 downto 0);
        Vb_o         : out std_logic_vector(17 downto 0);
        Vc_o         : out std_logic_vector(17 downto 0);
        done_o       : out std_logic
        );
end component;
-- SEQ_CONTROLLER   -   Microsemi:SolutionCore:SEQ_CONTROLLER:4.1.1
component SEQ_CONTROLLER
    generic( 
        g_DEBUG : integer := 0 
        );
    -- Port list
    port(
        -- Inputs
        calib_done_i    : in  std_logic;
        config_reg_i    : in  std_logic_vector(3 downto 0);
        fault_clear_i   : in  std_logic;
        fault_i         : in  std_logic;
        foc_done_i      : in  std_logic;
        max_ar_i        : in  std_logic_vector(3 downto 0);
        pwm_midmatch_i  : in  std_logic;
        reset_i         : in  std_logic;
        speed_cl_i      : in  std_logic_vector(17 downto 0);
        speed_ref_i     : in  std_logic_vector(17 downto 0);
        start_motor_i   : in  std_logic;
        stop_motor_i    : in  std_logic;
        sys_clk_i       : in  std_logic;
        vq_i            : in  std_logic_vector(17 downto 0);
        -- Outputs
        adc_start_o     : out std_logic;
        cl_status_o     : out std_logic;
        en_idq_pi_o     : out std_logic;
        en_pwm_o        : out std_logic;
        motor_stopped_o : out std_logic;
        reset_rl_o      : out std_logic;
        sensor_reset_o  : out std_logic;
        soft_stop_o     : out std_logic;
        state_o         : out std_logic_vector(3 downto 0)
        );
end component;
-- SPEED_ID_IQ_PI   -   Microsemi:SolutionCore:SPEED_ID_IQ_PI:4.1.0
component SPEED_ID_IQ_PI
    generic( 
        g_NO_MCYCLE_PATH : integer := 2 
        );
    -- Port list
    port(
        -- Inputs
        clear_buffer_i       : in  std_logic;
        id_init_i            : in  std_logic_vector(17 downto 0);
        id_pi_act_input_i    : in  std_logic_vector(17 downto 0);
        id_pi_ki_i           : in  std_logic_vector(17 downto 0);
        id_pi_kp_i           : in  std_logic_vector(17 downto 0);
        id_pi_ref_input_i    : in  std_logic_vector(17 downto 0);
        id_pi_start_i        : in  std_logic;
        idq_en_i             : in  std_logic;
        idq_pi_ymax_i        : in  std_logic_vector(17 downto 0);
        idq_pi_ymin_i        : in  std_logic_vector(17 downto 0);
        iq_init_i            : in  std_logic_vector(17 downto 0);
        iq_pi_act_input_i    : in  std_logic_vector(17 downto 0);
        iq_pi_ki_i           : in  std_logic_vector(17 downto 0);
        iq_pi_kp_i           : in  std_logic_vector(17 downto 0);
        iq_pi_ref_input_i    : in  std_logic_vector(17 downto 0);
        iq_pi_start_i        : in  std_logic;
        reset_i              : in  std_logic;
        speed_en_i           : in  std_logic;
        speed_init_i         : in  std_logic_vector(17 downto 0);
        speed_pi_act_input_i : in  std_logic_vector(17 downto 0);
        speed_pi_ki_i        : in  std_logic_vector(17 downto 0);
        speed_pi_kp_i        : in  std_logic_vector(17 downto 0);
        speed_pi_ref_input_i : in  std_logic_vector(17 downto 0);
        speed_pi_start_i     : in  std_logic;
        speed_pi_ymax_i      : in  std_logic_vector(17 downto 0);
        speed_pi_ymin_i      : in  std_logic_vector(17 downto 0);
        sys_clk_i            : in  std_logic;
        -- Outputs
        id_pi_done_o         : out std_logic;
        id_pi_output_o       : out std_logic_vector(17 downto 0);
        iq_pi_done_o         : out std_logic;
        iq_pi_output_o       : out std_logic_vector(17 downto 0);
        speed_pi_done_o      : out std_logic;
        speed_pi_output_o    : out std_logic_vector(17 downto 0)
        );
end component;
-- STEPPER_THETA   -   Microsemi:SolutionCore:STEPPER_THETA:4.1.0
component STEPPER_THETA
    -- Port list
    port(
        -- Inputs
        clear_buffer_i : in  std_logic;
        cmd_step_no_i  : in  std_logic_vector(23 downto 0);
        enable_i       : in  std_logic;
        mode_i         : in  std_logic;
        rate_limit_i   : in  std_logic_vector(17 downto 0);
        reset_i        : in  std_logic;
        slew_cnt_i     : in  std_logic_vector(17 downto 0);
        sys_clk_i      : in  std_logic;
        -- Outputs
        step_count_o   : out std_logic_vector(23 downto 0);
        theta_output_o : out std_logic_vector(17 downto 0)
        );
end component;
----------------------------------------------------------------------
-- Signal declarations
----------------------------------------------------------------------
signal adc_cs_o_0                             : std_logic;
signal adc_interface_795x_0_done_o            : std_logic;
signal adc_interface_795x_0_result_ch0_o      : std_logic_vector(11 downto 0);
signal adc_interface_795x_0_result_ch1_o      : std_logic_vector(11 downto 0);
signal adc_interface_795x_0_result_ch2_o      : std_logic_vector(11 downto 0);
signal adc_interface_795x_0_result_ch3_o      : std_logic_vector(11 downto 0);
signal ADC_SCALING_0_calib_done_o             : std_logic;
signal ADC_SCALING_0_done_o                   : std_logic;
signal ADC_SCALING_0_ia_adc_o                 : std_logic_vector(17 downto 0);
signal ADC_SCALING_0_ib_adc_o                 : std_logic_vector(17 downto 0);
signal ADC_SCALING_0_over_current_fault_o     : std_logic;
signal adc_sck_o_0                            : std_logic;
signal adc_sdo_o_0                            : std_logic;
signal apb3_if_st_0_adc_oc_thresh_o           : std_logic_vector(17 downto 0);
signal apb3_if_st_0_adc_scale_val_o           : std_logic_vector(17 downto 0);
signal apb3_if_st_0_id_ref_val_o              : std_logic_vector(17 downto 0);
signal apb3_if_st_0_idq_pi_ki_o               : std_logic_vector(17 downto 0);
signal apb3_if_st_0_idq_pi_kp_o               : std_logic_vector(17 downto 0);
signal apb3_if_st_0_olmng_dv_o                : std_logic_vector(17 downto 0);
signal apb3_if_st_0_pwm_dead_time_val_o       : std_logic_vector(17 downto 0);
signal apb3_if_st_0_pwm_delay_time_val_o      : std_logic_vector(17 downto 0);
signal apb3_if_st_0_pwm_period_val_o          : std_logic_vector(17 downto 0);
signal apb3_if_st_0_seq_cntl_config_o         : std_logic_vector(3 downto 0);
signal apb3_if_st_0_start_motor_o             : std_logic;
signal apb3_if_st_0_stop_motor_o              : std_logic;
signal apb3_if_st_0_theta_gen_cmd_step_no_o_0 : std_logic_vector(23 downto 0);
signal apb3_if_st_0_theta_gen_mode_o          : std_logic;
signal apb3_if_st_0_theta_gen_rate_limit_o    : std_logic_vector(17 downto 0);
signal apb3_if_st_0_theta_gen_slew_count_o    : std_logic_vector(17 downto 0);
signal FOC_TRANSFORMS_0_id_o                  : std_logic_vector(17 downto 0);
signal FOC_TRANSFORMS_0_iq_o                  : std_logic_vector(17 downto 0);
signal FOC_TRANSFORMS_0_park_done_o           : std_logic;
signal FOC_TRANSFORMS_0_vbeta_o               : std_logic_vector(17 downto 0);
signal FOC_TRANSFORMS_1_ipark_done_o          : std_logic;
signal FOC_TRANSFORMS_1_valpha_o              : std_logic_vector(17 downto 0);
signal PWM3PH_0_midmatch_o                    : std_logic;
signal PWM_SCALING_0_done_o                   : std_logic;
signal PWM_SCALING_0_Va_o                     : std_logic_vector(17 downto 0);
signal PWM_SCALING_0_Vb_o                     : std_logic_vector(17 downto 0);
signal pwm_uh_0                               : std_logic;
signal pwm_ul_0                               : std_logic;
signal pwm_vh_0                               : std_logic;
signal pwm_vl_0                               : std_logic;
signal pwm_wl_1                               : std_logic;
signal SEQ_CONTROLLER_0_adc_start_o           : std_logic;
signal SEQ_CONTROLLER_1_en_idq_pi_o           : std_logic;
signal SEQ_CONTROLLER_1_motor_stopped_o       : std_logic;
signal SEQ_CONTROLLER_1_state_o_0             : std_logic_vector(3 downto 0);
signal SPEED_ID_IQ_PI_1_id_pi_done_o          : std_logic;
signal SPEED_ID_IQ_PI_1_id_pi_output_o        : std_logic_vector(17 downto 0);
signal SPEED_ID_IQ_PI_1_iq_pi_done_o          : std_logic;
signal SPEED_ID_IQ_PI_1_iq_pi_output_o        : std_logic_vector(17 downto 0);
signal STEPPER_APB_IF_PRDATA                  : std_logic_vector(31 downto 0);
signal STEPPER_APB_IF_PREADY                  : std_logic;
signal STEPPER_APB_IF_PSLVERR                 : std_logic;
signal STEPPER_THETA_0_theta_output_o         : std_logic_vector(17 downto 0);
signal STEPPER_THETA_1_step_count_o           : std_logic_vector(23 downto 0);
signal adc_sck_o_0_net_0                      : std_logic;
signal adc_sdo_o_0_net_0                      : std_logic;
signal adc_cs_o_0_net_0                       : std_logic;
signal pwm_wl_1_net_0                         : std_logic;
signal pwm_wl_1_net_1                         : std_logic;
signal pwm_uh_0_net_0                         : std_logic;
signal pwm_ul_0_net_0                         : std_logic;
signal pwm_vh_0_net_0                         : std_logic;
signal pwm_vl_0_net_0                         : std_logic;
signal STEPPER_APB_IF_PREADY_net_0            : std_logic;
signal STEPPER_APB_IF_PSLVERR_net_0           : std_logic;
signal STEPPER_APB_IF_PRDATA_net_0            : std_logic_vector(31 downto 0);
----------------------------------------------------------------------
-- TiedOff Signals
----------------------------------------------------------------------
signal channels_to_sample_i_const_net_0       : std_logic_vector(15 downto 0);
signal GND_net                                : std_logic;
signal ia_i_const_net_0                       : std_logic_vector(17 downto 0);
signal ib_i_const_net_0                       : std_logic_vector(17 downto 0);
signal valpha_i_const_net_0                   : std_logic_vector(17 downto 0);
signal vbeta_i_const_net_0                    : std_logic_vector(17 downto 0);
signal vc_i_const_net_0                       : std_logic_vector(17 downto 0);
signal vc_i_const_net_1                       : std_logic_vector(17 downto 0);
signal speed_ref_i_const_net_0                : std_logic_vector(17 downto 0);
signal speed_cl_i_const_net_0                 : std_logic_vector(17 downto 0);
signal vq_i_const_net_0                       : std_logic_vector(17 downto 0);
signal max_ar_i_const_net_0                   : std_logic_vector(3 downto 0);
signal speed_init_i_const_net_0               : std_logic_vector(17 downto 0);
signal iq_init_i_const_net_0                  : std_logic_vector(17 downto 0);
signal speed_pi_ref_input_i_const_net_0       : std_logic_vector(17 downto 0);
signal speed_pi_act_input_i_const_net_0       : std_logic_vector(17 downto 0);
signal speed_pi_kp_i_const_net_0              : std_logic_vector(17 downto 0);
signal speed_pi_ki_i_const_net_0              : std_logic_vector(17 downto 0);
signal speed_pi_ymax_i_const_net_0            : std_logic_vector(17 downto 0);
signal speed_pi_ymin_i_const_net_0            : std_logic_vector(17 downto 0);
signal idq_pi_ymax_i_const_net_0              : std_logic_vector(17 downto 0);
signal idq_pi_ymin_i_const_net_0              : std_logic_vector(17 downto 0);
signal iq_pi_ref_input_i_const_net_0          : std_logic_vector(17 downto 0);

begin
----------------------------------------------------------------------
-- Constant assignments
----------------------------------------------------------------------
 channels_to_sample_i_const_net_0 <= B"0000000000000101";
 GND_net                          <= '0';
 ia_i_const_net_0                 <= B"000000000000000000";
 ib_i_const_net_0                 <= B"000000000000000000";
 valpha_i_const_net_0             <= B"000000000000000000";
 vbeta_i_const_net_0              <= B"000000000000000000";
 vc_i_const_net_0                 <= B"000000000000000000";
 vc_i_const_net_1                 <= B"000000000000000000";
 speed_ref_i_const_net_0          <= B"000000000000000000";
 speed_cl_i_const_net_0           <= B"000000000000000000";
 vq_i_const_net_0                 <= B"000000000000000000";
 max_ar_i_const_net_0             <= B"0000";
 speed_init_i_const_net_0         <= B"000000000000000000";
 iq_init_i_const_net_0            <= B"000000000000000000";
 speed_pi_ref_input_i_const_net_0 <= B"000000000000000000";
 speed_pi_act_input_i_const_net_0 <= B"000000000000000000";
 speed_pi_kp_i_const_net_0        <= B"000000000000000000";
 speed_pi_ki_i_const_net_0        <= B"000000000000000000";
 speed_pi_ymax_i_const_net_0      <= B"000000000000000000";
 speed_pi_ymin_i_const_net_0      <= B"000000000000000000";
 idq_pi_ymax_i_const_net_0        <= B"010000000000000000";
 idq_pi_ymin_i_const_net_0        <= B"110000000000000000";
 iq_pi_ref_input_i_const_net_0    <= B"000000000000000000";
----------------------------------------------------------------------
-- Top level output port assignments
----------------------------------------------------------------------
 adc_sck_o_0_net_0            <= adc_sck_o_0;
 adc_sck_o                    <= adc_sck_o_0_net_0;
 adc_sdo_o_0_net_0            <= adc_sdo_o_0;
 adc_sdo_o                    <= adc_sdo_o_0_net_0;
 adc_cs_o_0_net_0             <= adc_cs_o_0;
 adc_cs_o                     <= adc_cs_o_0_net_0;
 pwm_wl_1_net_0               <= pwm_wl_1;
 pwm_wl                       <= pwm_wl_1_net_0;
 pwm_wl_1_net_1               <= pwm_wl_1;
 pwm_wh                       <= pwm_wl_1_net_1;
 pwm_uh_0_net_0               <= pwm_uh_0;
 pwm_uh                       <= pwm_uh_0_net_0;
 pwm_ul_0_net_0               <= pwm_ul_0;
 pwm_ul                       <= pwm_ul_0_net_0;
 pwm_vh_0_net_0               <= pwm_vh_0;
 pwm_vh                       <= pwm_vh_0_net_0;
 pwm_vl_0_net_0               <= pwm_vl_0;
 pwm_vl                       <= pwm_vl_0_net_0;
 STEPPER_APB_IF_PREADY_net_0  <= STEPPER_APB_IF_PREADY;
 pready_o_0                   <= STEPPER_APB_IF_PREADY_net_0;
 STEPPER_APB_IF_PSLVERR_net_0 <= STEPPER_APB_IF_PSLVERR;
 pslverr_o_0                  <= STEPPER_APB_IF_PSLVERR_net_0;
 STEPPER_APB_IF_PRDATA_net_0  <= STEPPER_APB_IF_PRDATA;
 prdata_o_0(31 downto 0)      <= STEPPER_APB_IF_PRDATA_net_0;
----------------------------------------------------------------------
-- Component instances
----------------------------------------------------------------------
-- adc_interface_795x_0
adc_interface_795x_0 : adc_interface_795x
    port map( 
        -- Inputs
        reset_i              => reset_i,
        sys_clk_i            => sys_clk_i,
        start_i              => SEQ_CONTROLLER_0_adc_start_o,
        sdi_i                => adc_sdi_i,
        channels_to_sample_i => channels_to_sample_i_const_net_0,
        -- Outputs
        sdo_o                => adc_sdo_o_0,
        cs_o                 => adc_cs_o_0,
        sck_o                => adc_sck_o_0,
        done_o               => adc_interface_795x_0_done_o,
        result_ch0_o         => adc_interface_795x_0_result_ch0_o,
        result_ch1_o         => adc_interface_795x_0_result_ch1_o,
        result_ch2_o         => adc_interface_795x_0_result_ch2_o,
        result_ch3_o         => adc_interface_795x_0_result_ch3_o,
        result_ch4_o         => OPEN,
        result_ch5_o         => OPEN,
        result_ch6_o         => OPEN,
        result_ch7_o         => OPEN,
        result_ch8_o         => OPEN,
        result_ch9_o         => OPEN,
        result_ch10_o        => OPEN,
        result_ch11_o        => OPEN,
        result_ch12_o        => OPEN,
        result_ch13_o        => OPEN,
        result_ch14_o        => OPEN,
        result_ch15_o        => OPEN 
        );
-- ADC_SCALING_0   -   Microsemi:SolutionCore:ADC_SCALING:4.2.0
ADC_SCALING_0 : ADC_SCALING
    generic map( 
        g_ADC_RESULTS_WIDTH => ( 12 ),
        g_DEBUG             => ( 0 ),
        g_NO_MCYCLE_PATH    => ( 2 ),
        g_SIGNED            => ( 0 )
        )
    port map( 
        -- Inputs
        reset_i              => reset_i,
        sys_clk_i            => sys_clk_i,
        adc_results_rdy_i    => adc_interface_795x_0_done_o,
        adc_scale_val_i      => apb3_if_st_0_adc_scale_val_o,
        adc_result_ch0_i     => adc_interface_795x_0_result_ch0_o,
        adc_result_ch1_i     => adc_interface_795x_0_result_ch2_o,
        fault_threshold_i    => apb3_if_st_0_adc_oc_thresh_o,
        -- Outputs
        done_o               => ADC_SCALING_0_done_o,
        calib_done_o         => ADC_SCALING_0_calib_done_o,
        over_current_fault_o => ADC_SCALING_0_over_current_fault_o,
        ia_adc_o             => ADC_SCALING_0_ia_adc_o,
        ib_adc_o             => ADC_SCALING_0_ib_adc_o 
        );
-- apb3_if_st_0
apb3_if_st_0 : entity work.apb3_if_st
    generic map( 
        g_ADC_CONFIG_REG_WIDTH => ( 6 ),
        g_APB3_IF_DATA_WIDTH   => ( 32 ),
        g_CONST_WIDTH          => ( 12 ),
        g_STD_IO_WIDTH         => ( 18 )
        )
    port map( 
        -- Inputs
        preset_i                => reset_i,
        pclk_i                  => sys_clk_i,
        psel_i                  => psel_i_0,
        pwrite_i                => pwrite_i_0,
        penable_i               => penable_i_0,
        paddr_i                 => paddr_i_0,
        pwdata_i                => pwdata_i_0,
        ia_clarke_in_i          => ADC_SCALING_0_ia_adc_o,
        ib_clarke_in_i          => ADC_SCALING_0_ib_adc_o,
        id_park_output_i        => FOC_TRANSFORMS_0_id_o,
        iq_park_output_i        => FOC_TRANSFORMS_0_iq_o,
        valpha_ipark_output_i   => FOC_TRANSFORMS_1_valpha_o,
        vbeta_ipark_output_i    => FOC_TRANSFORMS_0_vbeta_o,
        id_pi_out_i             => SPEED_ID_IQ_PI_1_id_pi_output_o,
        iq_pi_out_i             => SPEED_ID_IQ_PI_1_iq_pi_output_o,
        step_cnt_i              => STEPPER_THETA_1_step_count_o,
        theta_out_i             => STEPPER_THETA_0_theta_output_o,
        state_i                 => SEQ_CONTROLLER_1_state_o_0,
        adc_ch0_val_i           => adc_interface_795x_0_result_ch0_o,
        adc_ch1_val_i           => adc_interface_795x_0_result_ch1_o,
        adc_ch2_val_i           => adc_interface_795x_0_result_ch2_o,
        adc_ch3_val_i           => adc_interface_795x_0_result_ch3_o,
        -- Outputs
        pready_o                => STEPPER_APB_IF_PREADY,
        pslverr_o               => STEPPER_APB_IF_PSLVERR,
        start_motor_o           => apb3_if_st_0_start_motor_o,
        stop_motor_o            => apb3_if_st_0_stop_motor_o,
        theta_gen_mode_o        => apb3_if_st_0_theta_gen_mode_o,
        prdata_o                => STEPPER_APB_IF_PRDATA,
        idq_pi_kp_o             => apb3_if_st_0_idq_pi_kp_o,
        idq_pi_ki_o             => apb3_if_st_0_idq_pi_ki_o,
        seq_cntl_config_o       => apb3_if_st_0_seq_cntl_config_o,
        olmng_dv_o              => apb3_if_st_0_olmng_dv_o,
        adc_scale_val_o         => apb3_if_st_0_adc_scale_val_o,
        adc_oc_thresh_o         => apb3_if_st_0_adc_oc_thresh_o,
        pwm_period_val_o        => apb3_if_st_0_pwm_period_val_o,
        adc_control_reg_val_o   => OPEN,
        pwm_dead_time_val_o     => apb3_if_st_0_pwm_dead_time_val_o,
        pwm_delay_time_val_o    => apb3_if_st_0_pwm_delay_time_val_o,
        adc_channel_ch0_o       => OPEN,
        adc_channel_ch1_o       => OPEN,
        adc_channel_ch2_o       => OPEN,
        adc_channel_ch3_o       => OPEN,
        theta_gen_slew_count_o  => apb3_if_st_0_theta_gen_slew_count_o,
        theta_gen_rate_limit_o  => apb3_if_st_0_theta_gen_rate_limit_o,
        theta_gen_cmd_step_no_o => apb3_if_st_0_theta_gen_cmd_step_no_o_0,
        id_ref_val_o            => apb3_if_st_0_id_ref_val_o 
        );
-- FOC_TRANSFORMS_0   -   Microsemi:SolutionCore:FOC_TRANSFORMS:4.1.1
FOC_TRANSFORMS_0 : FOC_TRANSFORMS
    generic map( 
        g_NO_MCYCLE_PATH => ( 2 )
        )
    port map( 
        -- Inputs
        reset_i         => reset_i,
        sys_clk_i       => sys_clk_i,
        start_clarke_i  => GND_net,
        start_park_i    => ADC_SCALING_0_done_o,
        start_ipark_i   => SPEED_ID_IQ_PI_1_id_pi_done_o,
        start_iclarke_i => GND_net,
        ia_i            => ia_i_const_net_0,
        ib_i            => ib_i_const_net_0,
        ialpha_i        => ADC_SCALING_0_ia_adc_o,
        ibeta_i         => ADC_SCALING_0_ib_adc_o,
        vd_i            => SPEED_ID_IQ_PI_1_id_pi_output_o,
        vq_i            => SPEED_ID_IQ_PI_1_iq_pi_output_o,
        valpha_i        => valpha_i_const_net_0,
        vbeta_i         => vbeta_i_const_net_0,
        theta_i         => STEPPER_THETA_0_theta_output_o,
        -- Outputs
        clarke_done_o   => OPEN,
        park_done_o     => FOC_TRANSFORMS_0_park_done_o,
        ipark_done_o    => FOC_TRANSFORMS_1_ipark_done_o,
        iclarke_done_o  => OPEN,
        ialpha_o        => OPEN,
        ibeta_o         => OPEN,
        id_o            => FOC_TRANSFORMS_0_id_o,
        iq_o            => FOC_TRANSFORMS_0_iq_o,
        valpha_o        => FOC_TRANSFORMS_1_valpha_o,
        vbeta_o         => FOC_TRANSFORMS_0_vbeta_o,
        va_o            => OPEN,
        vb_o            => OPEN,
        vc_o            => OPEN 
        );
-- PWM3PH_0   -   Microsemi:SolutionCore:PWM3PH:4.1.2
PWM3PH_0 : PWM3PH
    port map( 
        -- Inputs
        reset_i        => reset_i,
        sys_clk_i      => sys_clk_i,
        en_pwm_i       => pwm_wl_1,
        en_dual_trig_i => GND_net,
        va_i           => PWM_SCALING_0_Va_o,
        vb_i           => PWM_SCALING_0_Vb_o,
        vc_i           => vc_i_const_net_0,
        pwm_period_i   => apb3_if_st_0_pwm_period_val_o,
        dead_time_i    => apb3_if_st_0_pwm_dead_time_val_o,
        delay_time_i   => apb3_if_st_0_pwm_delay_time_val_o,
        -- Outputs
        midmatch_o     => PWM3PH_0_midmatch_o,
        PWM_AH_o       => pwm_uh_0,
        PWM_BH_o       => pwm_vh_0,
        PWM_CH_o       => OPEN,
        PWM_AL_o       => pwm_ul_0,
        PWM_BL_o       => pwm_vl_0,
        PWM_CL_o       => OPEN 
        );
-- PWM_SCALING_0   -   Microsemi:SolutionCore:PWM_SCALING:4.1.0
PWM_SCALING_0 : PWM_SCALING
    generic map( 
        g_NO_MCYCLE_PATH => ( 2 )
        )
    port map( 
        -- Inputs
        reset_i      => reset_i,
        sys_clk_i    => sys_clk_i,
        start_i      => FOC_TRANSFORMS_1_ipark_done_o,
        va_i         => FOC_TRANSFORMS_1_valpha_o,
        vb_i         => FOC_TRANSFORMS_0_vbeta_o,
        vc_i         => vc_i_const_net_1,
        pwm_period_i => apb3_if_st_0_pwm_period_val_o,
        pwm_gain_i   => apb3_if_st_0_pwm_period_val_o,
        -- Outputs
        done_o       => PWM_SCALING_0_done_o,
        Va_o         => PWM_SCALING_0_Va_o,
        Vb_o         => PWM_SCALING_0_Vb_o,
        Vc_o         => OPEN 
        );
-- SEQ_CONTROLLER_0   -   Microsemi:SolutionCore:SEQ_CONTROLLER:4.1.1
SEQ_CONTROLLER_0 : SEQ_CONTROLLER
    generic map( 
        g_DEBUG => ( 0 )
        )
    port map( 
        -- Inputs
        reset_i         => reset_i,
        sys_clk_i       => sys_clk_i,
        fault_i         => ADC_SCALING_0_over_current_fault_o,
        start_motor_i   => apb3_if_st_0_start_motor_o,
        stop_motor_i    => apb3_if_st_0_stop_motor_o,
        fault_clear_i   => apb3_if_st_0_stop_motor_o,
        calib_done_i    => ADC_SCALING_0_calib_done_o,
        pwm_midmatch_i  => PWM3PH_0_midmatch_o,
        foc_done_i      => PWM_SCALING_0_done_o,
        speed_ref_i     => speed_ref_i_const_net_0,
        speed_cl_i      => speed_cl_i_const_net_0,
        vq_i            => vq_i_const_net_0,
        max_ar_i        => max_ar_i_const_net_0,
        config_reg_i    => apb3_if_st_0_seq_cntl_config_o,
        -- Outputs
        adc_start_o     => SEQ_CONTROLLER_0_adc_start_o,
        cl_status_o     => OPEN,
        en_idq_pi_o     => SEQ_CONTROLLER_1_en_idq_pi_o,
        en_pwm_o        => pwm_wl_1,
        motor_stopped_o => SEQ_CONTROLLER_1_motor_stopped_o,
        reset_rl_o      => OPEN,
        soft_stop_o     => OPEN,
        sensor_reset_o  => OPEN,
        state_o         => SEQ_CONTROLLER_1_state_o_0 
        );
-- SPEED_ID_IQ_PI_0   -   Microsemi:SolutionCore:SPEED_ID_IQ_PI:4.1.0
SPEED_ID_IQ_PI_0 : SPEED_ID_IQ_PI
    generic map( 
        g_NO_MCYCLE_PATH => ( 2 )
        )
    port map( 
        -- Inputs
        reset_i              => reset_i,
        sys_clk_i            => sys_clk_i,
        clear_buffer_i       => SEQ_CONTROLLER_1_motor_stopped_o,
        speed_en_i           => GND_net,
        idq_en_i             => SEQ_CONTROLLER_1_en_idq_pi_o,
        speed_pi_start_i     => GND_net,
        id_pi_start_i        => SPEED_ID_IQ_PI_1_iq_pi_done_o,
        iq_pi_start_i        => FOC_TRANSFORMS_0_park_done_o,
        speed_init_i         => speed_init_i_const_net_0,
        id_init_i            => apb3_if_st_0_olmng_dv_o,
        iq_init_i            => iq_init_i_const_net_0,
        speed_pi_ref_input_i => speed_pi_ref_input_i_const_net_0,
        speed_pi_act_input_i => speed_pi_act_input_i_const_net_0,
        speed_pi_kp_i        => speed_pi_kp_i_const_net_0,
        speed_pi_ki_i        => speed_pi_ki_i_const_net_0,
        speed_pi_ymax_i      => speed_pi_ymax_i_const_net_0,
        speed_pi_ymin_i      => speed_pi_ymin_i_const_net_0,
        id_pi_ref_input_i    => apb3_if_st_0_id_ref_val_o,
        id_pi_act_input_i    => FOC_TRANSFORMS_0_id_o,
        id_pi_kp_i           => apb3_if_st_0_idq_pi_kp_o,
        id_pi_ki_i           => apb3_if_st_0_idq_pi_ki_o,
        idq_pi_ymax_i        => idq_pi_ymax_i_const_net_0,
        idq_pi_ymin_i        => idq_pi_ymin_i_const_net_0,
        iq_pi_ref_input_i    => iq_pi_ref_input_i_const_net_0,
        iq_pi_act_input_i    => FOC_TRANSFORMS_0_iq_o,
        iq_pi_kp_i           => apb3_if_st_0_idq_pi_kp_o,
        iq_pi_ki_i           => apb3_if_st_0_idq_pi_ki_o,
        -- Outputs
        speed_pi_done_o      => OPEN,
        id_pi_done_o         => SPEED_ID_IQ_PI_1_id_pi_done_o,
        iq_pi_done_o         => SPEED_ID_IQ_PI_1_iq_pi_done_o,
        speed_pi_output_o    => OPEN,
        id_pi_output_o       => SPEED_ID_IQ_PI_1_id_pi_output_o,
        iq_pi_output_o       => SPEED_ID_IQ_PI_1_iq_pi_output_o 
        );
-- STEPPER_THETA_0   -   Microsemi:SolutionCore:STEPPER_THETA:4.1.0
STEPPER_THETA_0 : STEPPER_THETA
    port map( 
        -- Inputs
        reset_i        => reset_i,
        sys_clk_i      => sys_clk_i,
        enable_i       => ADC_SCALING_0_calib_done_o,
        mode_i         => apb3_if_st_0_theta_gen_mode_o,
        clear_buffer_i => SEQ_CONTROLLER_1_motor_stopped_o,
        slew_cnt_i     => apb3_if_st_0_theta_gen_slew_count_o,
        rate_limit_i   => apb3_if_st_0_theta_gen_rate_limit_o,
        cmd_step_no_i  => apb3_if_st_0_theta_gen_cmd_step_no_o_0,
        -- Outputs
        theta_output_o => STEPPER_THETA_0_theta_output_o,
        step_count_o   => STEPPER_THETA_1_step_count_o 
        );

end RTL;
