<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<?xml-stylesheet href="rptstyle.xsl" type="text/xsl" ?>
<doc>
<title>Timing Report Max Delay Analysis
</title>
<text>SmartTime Version 11.8.2.4</text>
<text>Microsemi Corporation - Microsemi Libero Software Release Libero SoC v11.8 SP2 (Version 11.8.2.4)</text>
<text>Date: Wed Nov 29 16:03:11 2017
</text>
<table>
<header>
</header>
<row>
 <cell>Design</cell>
 <cell>MC_System_top</cell>
</row>
<row>
 <cell>Family</cell>
 <cell>SmartFusion2</cell>
</row>
<row>
 <cell>Die</cell>
 <cell>M2S010</cell>
</row>
<row>
 <cell>Package</cell>
 <cell>484 FBGA</cell>
</row>
<row>
 <cell>Temperature Range</cell>
 <cell>0 - 85 C</cell>
</row>
<row>
 <cell>Voltage Range</cell>
 <cell>1.14 - 1.26 V</cell>
</row>
<row>
 <cell>Speed Grade</cell>
 <cell>-1</cell>
</row>
<row>
 <cell>Design State</cell>
 <cell>Post-Layout</cell>
</row>
<row>
 <cell>Data source</cell>
 <cell>Production</cell>
</row>
<row>
 <cell>Min Operating Conditions</cell>
 <cell>BEST - 1.26 V - 0 C</cell>
</row>
<row>
 <cell>Max Operating Conditions</cell>
 <cell>WORST - 1.14 V - 85 C</cell>
</row>
<row>
 <cell>Scenario for Timing Analysis</cell>
 <cell>Primary</cell>
</row>
</table>
<text></text>
<section>
<name>Summary</name>
<table>
<header>
 <cell>Clock Domain</cell>
 <cell>Period (ns)</cell>
 <cell>Frequency (MHz)</cell>
 <cell>Required Period (ns)</cell>
 <cell>Required Frequency (MHz)</cell>
 <cell>External Setup (ns)</cell>
 <cell>External Hold (ns)</cell>
 <cell>Min Clock-To-Out (ns)</cell>
 <cell>Max Clock-To-Out (ns)</cell>
</header>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>7.606</cell>
 <cell>131.475</cell>
 <cell>10.000</cell>
 <cell>100.000</cell>
 <cell>-2.994</cell>
 <cell>2.519</cell>
 <cell>5.136</cell>
 <cell>12.245</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>3.280</cell>
 <cell>304.878</cell>
 <cell>40.000</cell>
 <cell>25.000</cell>
 <cell>-0.875</cell>
 <cell>1.626</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>20.000</cell>
 <cell>50.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>5.706</cell>
 <cell>8.847</cell>
</row>
</table>
<text></text>
<table>
<header>
 <cell></cell>
 <cell>Min Delay (ns)</cell>
 <cell>Max Delay (ns)</cell>
</header>
<row>
 <cell>Input to Output</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[8]</cell>
 <cell>7.373</cell>
 <cell>2.394</cell>
 <cell>12.850</cell>
 <cell>15.244</cell>
 <cell>0.233</cell>
 <cell>7.606</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>Bldc_Axis_0/apb3_if_0/ac_filter_factor_o[3]:EN</cell>
 <cell>6.945</cell>
 <cell>2.490</cell>
 <cell>12.422</cell>
 <cell>14.912</cell>
 <cell>0.254</cell>
 <cell>7.510</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[2]</cell>
 <cell>7.269</cell>
 <cell>2.521</cell>
 <cell>12.746</cell>
 <cell>15.267</cell>
 <cell>0.210</cell>
 <cell>7.479</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[7]</cell>
 <cell>7.149</cell>
 <cell>2.698</cell>
 <cell>12.626</cell>
 <cell>15.324</cell>
 <cell>0.153</cell>
 <cell>7.302</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell>6.959</cell>
 <cell>2.734</cell>
 <cell>12.436</cell>
 <cell>15.170</cell>
 <cell>0.307</cell>
 <cell>7.266</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[8]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>15.244</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>12.850</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>2.394</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.767</cell>
 <cell>3.767</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>3.964</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.165</cell>
 <cell>4.129</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.288</cell>
 <cell>4.417</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.250</cell>
 <cell>4.667</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.385</cell>
 <cell>5.052</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.209</cell>
 <cell>5.261</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/CLK_BASE_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.216</cell>
 <cell>5.477</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_ADDR[10]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:MSS_010_IP</cell>
 <cell>+</cell>
 <cell>1.602</cell>
 <cell>7.079</cell>
 <cell>4</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/idq_pi_ki_o_1_sqmuxa_8:C</cell>
 <cell>net</cell>
 <cell>MC_System_0_AMBA_SLAVE_0_PADDR[10]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.123</cell>
 <cell>8.202</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/idq_pi_ki_o_1_sqmuxa_8:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.315</cell>
 <cell>8.517</cell>
 <cell>25</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/prdata_o_1_0_a2_2[17]:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/apb3_if_0/idq_pi_ki_o_1_sqmuxa_8_Z</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.716</cell>
 <cell>9.233</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/prdata_o_1_0_a2_2[17]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.202</cell>
 <cell>9.435</cell>
 <cell>18</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/prdata_o_1_17_i_m2_ns_RNI0Q2T[8]:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0_N_1932</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.957</cell>
 <cell>10.392</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/prdata_o_1_17_i_m2_ns_RNI0Q2T[8]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.303</cell>
 <cell>10.695</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CoreAPB3_0/u_mux_p_to_b3/PRDATA[8]:A</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0_N_1892</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.310</cell>
 <cell>11.005</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CoreAPB3_0/u_mux_p_to_b3/PRDATA[8]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.270</cell>
 <cell>11.275</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_TMP_0_FIC_0_APB_MASTER_PRDATA[8]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.137</cell>
 <cell>12.412</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.209</cell>
 <cell>12.621</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[8]</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/F_HM0_RDATA_net[8]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.229</cell>
 <cell>12.850</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>12.850</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.767</cell>
 <cell>13.767</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>13.964</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.165</cell>
 <cell>14.129</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.288</cell>
 <cell>14.417</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.250</cell>
 <cell>14.667</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.385</cell>
 <cell>15.052</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.209</cell>
 <cell>15.261</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/CLK_BASE_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.216</cell>
 <cell>15.477</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[8]</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:MSS_010_IP</cell>
 <cell>-</cell>
 <cell>0.233</cell>
 <cell>15.244</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>15.244</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>External Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>A0_ADC_SDI_I</cell>
 <cell>Bldc_Axis_0/adc_interface_795x_0/spi_engine_inst/s_sdi:D</cell>
 <cell>1.792</cell>
 <cell>6.227</cell>
 <cell>8.559</cell>
 <cell>14.786</cell>
 <cell>0.248</cell>
 <cell>-2.994</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: A0_ADC_SDI_I</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: Bldc_Axis_0/adc_interface_795x_0/spi_engine_inst/s_sdi:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.786</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.559</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>6.227</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.767</cell>
 <cell>3.767</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>A0_ADC_SDI_I</cell>
 <cell>Input Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.000</cell>
 <cell>6.767</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_ADC_SDI_I_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>A0_ADC_SDI_I</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>6.767</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_ADC_SDI_I_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>1.400</cell>
 <cell>8.167</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/adc_interface_795x_0/spi_engine_inst/s_sdi:D</cell>
 <cell>net</cell>
 <cell>A0_ADC_SDI_I_ibuf/U0/YIN1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.392</cell>
 <cell>8.559</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.559</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.654</cell>
 <cell>13.654</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.191</cell>
 <cell>13.845</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.161</cell>
 <cell>14.006</cell>
 <cell>17</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB20:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.281</cell>
 <cell>14.287</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB20:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.243</cell>
 <cell>14.530</cell>
 <cell>83</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/adc_interface_795x_0/spi_engine_inst/s_sdi:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB20_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.504</cell>
 <cell>15.034</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/adc_interface_795x_0/spi_engine_inst/s_sdi:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:IOINFF</cell>
 <cell>-</cell>
 <cell>0.248</cell>
 <cell>14.786</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.786</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Clock to Output</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Clock to Out (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[8]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>6.869</cell>
 <cell>1.459</cell>
 <cell>12.008</cell>
 <cell>13.467</cell>
 <cell>12.008</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[0]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>6.863</cell>
 <cell>1.473</cell>
 <cell>11.994</cell>
 <cell>13.467</cell>
 <cell>11.994</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[7]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>6.789</cell>
 <cell>1.533</cell>
 <cell>11.934</cell>
 <cell>13.467</cell>
 <cell>11.934</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[8]:CLK</cell>
 <cell>A0_PWM_VL_O</cell>
 <cell>5.675</cell>
 <cell>2.653</cell>
 <cell>10.814</cell>
 <cell>13.467</cell>
 <cell>10.814</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[0]:CLK</cell>
 <cell>A0_PWM_VL_O</cell>
 <cell>5.669</cell>
 <cell>2.667</cell>
 <cell>10.800</cell>
 <cell>13.467</cell>
 <cell>10.800</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: Bldc_Axis_0/MSC_i_22/s_state[8]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: A0_RUNNING_LED</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.467</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>12.008</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>1.459</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.767</cell>
 <cell>3.767</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>3.964</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.165</cell>
 <cell>4.129</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB11:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.278</cell>
 <cell>4.407</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB11:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.251</cell>
 <cell>4.658</cell>
 <cell>57</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[8]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB11_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.481</cell>
 <cell>5.139</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[8]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>5.226</cell>
 <cell>6</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/ADC_START_PROC.un101_s_state_i_a2_0_a3:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_22/MSC_net_83</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.336</cell>
 <cell>5.562</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/ADC_START_PROC.un101_s_state_i_a2_0_a3:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.143</cell>
 <cell>5.705</cell>
 <cell>3</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/ADC_START_PROC.un103_s_state_i_a3_0_a2:A</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_22/MSC_net_285</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.106</cell>
 <cell>5.811</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/ADC_START_PROC.un103_s_state_i_a3_0_a2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>5.898</cell>
 <cell>32</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOOUTFF:A</cell>
 <cell>net</cell>
 <cell>A0_PWM_UL_O_c</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.377</cell>
 <cell>8.275</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOOUTFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOOUTFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.330</cell>
 <cell>8.605</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOPAD:D</cell>
 <cell>net</cell>
 <cell>A0_RUNNING_LED_obuf/U0/DOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.701</cell>
 <cell>9.306</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOPAD:PAD</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_TRI</cell>
 <cell>+</cell>
 <cell>2.702</cell>
 <cell>12.008</cell>
 <cell>0</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED</cell>
 <cell>net</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>12.008</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>12.008</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.767</cell>
 <cell>13.767</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>A0_RUNNING_LED</cell>
 <cell>Output Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell>0.300</cell>
 <cell>13.467</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.467</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2 to MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[16]:D</cell>
 <cell>5.020</cell>
 <cell>4.497</cell>
 <cell>10.392</cell>
 <cell>14.889</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[15]:D</cell>
 <cell>4.914</cell>
 <cell>4.597</cell>
 <cell>10.286</cell>
 <cell>14.883</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[17]:D</cell>
 <cell>4.901</cell>
 <cell>4.607</cell>
 <cell>10.273</cell>
 <cell>14.880</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[13]:D</cell>
 <cell>4.801</cell>
 <cell>4.710</cell>
 <cell>10.173</cell>
 <cell>14.883</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[12]:D</cell>
 <cell>4.787</cell>
 <cell>4.723</cell>
 <cell>10.159</cell>
 <cell>14.882</cell>
 <cell>0.254</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: Bldc_Axis_0/MSC_i_0/s_cos_ac[16]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.889</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>10.392</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>4.497</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.966</cell>
 <cell>3.966</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>4.163</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.166</cell>
 <cell>4.329</cell>
 <cell>10</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.286</cell>
 <cell>4.615</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.251</cell>
 <cell>4.866</cell>
 <cell>18</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.506</cell>
 <cell>5.372</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.092</cell>
 <cell>5.464</cell>
 <cell>4</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_0:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/SINC3_FILTER_2_data_o[0]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.811</cell>
 <cell>6.275</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_0:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.225</cell>
 <cell>6.500</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0:C</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_0/MSC_net_1036</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.410</cell>
 <cell>6.910</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.200</cell>
 <cell>7.110</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0_CC_0:P[3]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2838</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>7.110</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0_CC_0:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.465</cell>
 <cell>7.575</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0_CC_1:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO2837</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>7.575</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0_CC_1:CC[3]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>7.733</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_12:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2876</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>7.733</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_12:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.066</cell>
 <cell>7.799</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_12:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_0/MSC_net_579</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.963</cell>
 <cell>8.762</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_12:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>8.939</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_0_CC_1:P[3]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2639</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.939</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_0_CC_1:CC[7]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.557</cell>
 <cell>9.496</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_16:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2653</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>9.496</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_16:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.073</cell>
 <cell>9.569</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac_3[16]:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_0/MSC_net_728</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.619</cell>
 <cell>10.188</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac_3[16]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.140</cell>
 <cell>10.328</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[16]:D</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_0/MSC_net_510</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.064</cell>
 <cell>10.392</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.392</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.767</cell>
 <cell>13.767</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>13.964</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.166</cell>
 <cell>14.130</cell>
 <cell>17</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB23:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.293</cell>
 <cell>14.423</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB23:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.251</cell>
 <cell>14.674</cell>
 <cell>34</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[16]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB23_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.469</cell>
 <cell>15.143</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[16]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.254</cell>
 <cell>14.889</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.889</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[0]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell>3.015</cell>
 <cell>36.720</cell>
 <cell>8.392</cell>
 <cell>45.112</cell>
 <cell>0.254</cell>
 <cell>3.280</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[3]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell>2.955</cell>
 <cell>36.767</cell>
 <cell>8.345</cell>
 <cell>45.112</cell>
 <cell>0.254</cell>
 <cell>3.233</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[0]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[19]:D</cell>
 <cell>2.865</cell>
 <cell>36.823</cell>
 <cell>8.242</cell>
 <cell>45.065</cell>
 <cell>0.254</cell>
 <cell>3.177</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[3]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[19]:D</cell>
 <cell>2.805</cell>
 <cell>36.870</cell>
 <cell>8.195</cell>
 <cell>45.065</cell>
 <cell>0.254</cell>
 <cell>3.130</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1_dec[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell>2.859</cell>
 <cell>36.881</cell>
 <cell>8.231</cell>
 <cell>45.112</cell>
 <cell>0.254</cell>
 <cell>3.119</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: Bldc_Axis_0/MSC_i_26/s_diff1[0]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>45.112</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.392</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>36.720</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.966</cell>
 <cell>3.966</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>4.163</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.166</cell>
 <cell>4.329</cell>
 <cell>10</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB10:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.287</cell>
 <cell>4.616</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB10:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.251</cell>
 <cell>4.867</cell>
 <cell>32</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[0]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB10_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.510</cell>
 <cell>5.377</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[0]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>5.464</cell>
 <cell>3</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC.s_diff2_1_cry_0:A</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_26/MSC_net_196</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.037</cell>
 <cell>6.501</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC.s_diff2_1_cry_0:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.134</cell>
 <cell>6.635</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC_s_diff2_1_cry_0_CC_0:P[0]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1820</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>6.635</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC_s_diff2_1_cry_0_CC_0:CC[9]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.642</cell>
 <cell>7.277</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC.s_diff2_1_cry_9:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1849</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>7.277</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC.s_diff2_1_cry_9:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.066</cell>
 <cell>7.343</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_26/MSC_net_253</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.049</cell>
 <cell>8.392</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.392</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>40.000</cell>
 <cell>40.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>40.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.966</cell>
 <cell>43.966</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>44.163</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.166</cell>
 <cell>44.329</cell>
 <cell>10</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.286</cell>
 <cell>44.615</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.251</cell>
 <cell>44.866</cell>
 <cell>18</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.500</cell>
 <cell>45.366</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.254</cell>
 <cell>45.112</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>45.112</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>External Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>PPS</cell>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[4]:EN</cell>
 <cell>4.019</cell>
 <cell>33.909</cell>
 <cell>10.985</cell>
 <cell>44.894</cell>
 <cell>0.308</cell>
 <cell>-0.875</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>PPS</cell>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[2]:EN</cell>
 <cell>4.019</cell>
 <cell>33.909</cell>
 <cell>10.985</cell>
 <cell>44.894</cell>
 <cell>0.308</cell>
 <cell>-0.875</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>PPS</cell>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[8]:EN</cell>
 <cell>4.019</cell>
 <cell>33.909</cell>
 <cell>10.985</cell>
 <cell>44.894</cell>
 <cell>0.308</cell>
 <cell>-0.875</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>PPS</cell>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[10]:EN</cell>
 <cell>4.019</cell>
 <cell>33.909</cell>
 <cell>10.985</cell>
 <cell>44.894</cell>
 <cell>0.308</cell>
 <cell>-0.875</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>PPS</cell>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[6]:EN</cell>
 <cell>4.019</cell>
 <cell>33.909</cell>
 <cell>10.985</cell>
 <cell>44.894</cell>
 <cell>0.308</cell>
 <cell>-0.875</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: PPS</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: Bldc_Axis_0/MSC_i_33/s_acc1[4]:EN</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>44.894</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>10.985</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>33.909</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.966</cell>
 <cell>3.966</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>PPS</cell>
 <cell>Input Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.000</cell>
 <cell>6.966</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>PPS_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>PPS</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>6.966</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>PPS_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>1.400</cell>
 <cell>8.366</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>PPS_ibuf/U0/U_IOINFF:A</cell>
 <cell>net</cell>
 <cell>PPS_ibuf/U0/YIN1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.062</cell>
 <cell>8.428</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>PPS_ibuf/U0/U_IOINFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOINFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.120</cell>
 <cell>8.548</cell>
 <cell>24</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[4]:EN</cell>
 <cell>net</cell>
 <cell>PPS_c</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.437</cell>
 <cell>10.985</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.985</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>40.000</cell>
 <cell>40.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>40.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.847</cell>
 <cell>43.847</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.191</cell>
 <cell>44.038</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.161</cell>
 <cell>44.199</cell>
 <cell>10</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB2:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.268</cell>
 <cell>44.467</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB2:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.243</cell>
 <cell>44.710</cell>
 <cell>56</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[4]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB2_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.492</cell>
 <cell>45.202</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[4]:EN</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.308</cell>
 <cell>44.894</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>44.894</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT to MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:RCOSC_25_50MHZ</cell>
 <cell>GPIO_43</cell>
 <cell>6.820</cell>
 <cell>14.819</cell>
 <cell>8.847</cell>
 <cell>23.666</cell>
 <cell></cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:RCOSC_25_50MHZ</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: GPIO_43</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>23.666</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.847</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.819</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:RCOSC_25_50MHZ</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/FABOSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.027</cell>
 <cell>2.027</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CCC_IP</cell>
 <cell>+</cell>
 <cell>1.938</cell>
 <cell>3.965</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.217</cell>
 <cell>4.182</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>4.355</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.282</cell>
 <cell>4.637</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.182</cell>
 <cell>4.819</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>GPIO_43_obuf/U0/U_IOOUTFF:A</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.672</cell>
 <cell>5.491</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GPIO_43_obuf/U0/U_IOOUTFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOOUTFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.330</cell>
 <cell>5.821</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>GPIO_43_obuf/U0/U_IOPAD:D</cell>
 <cell>net</cell>
 <cell>GPIO_43_obuf/U0/DOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.616</cell>
 <cell>6.437</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GPIO_43_obuf/U0/U_IOPAD:PAD</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_TRI</cell>
 <cell>+</cell>
 <cell>2.410</cell>
 <cell>8.847</cell>
 <cell>0</cell>
 <cell>f</cell>
</row>
<row>
 <cell>GPIO_43</cell>
 <cell>net</cell>
 <cell>GPIO_43</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.847</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.847</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>20.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.966</cell>
 <cell>23.966</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>GPIO_43</cell>
 <cell>Output Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell>0.300</cell>
 <cell>23.666</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>23.666</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</name>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set Pin to Pin</name>
<section>
<name>SET Input to Output</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set User Sets</name>
</section>
</doc>
