<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<?xml-stylesheet href="rptstyle.xsl" type="text/xsl" ?>
<doc>
<title>Timing Report Max Delay Analysis
</title>
<text>SmartTime Version 11.8.2.4</text>
<text>Microsemi Corporation - Microsemi Libero Software Release Libero SoC v11.8 SP2 (Version 11.8.2.4)</text>
<text>Date: Wed Nov 29 16:03:17 2017
</text>
<table>
<header>
</header>
<row>
 <cell>Design</cell>
 <cell>MC_System_top</cell>
</row>
<row>
 <cell>Family</cell>
 <cell>SmartFusion2</cell>
</row>
<row>
 <cell>Die</cell>
 <cell>M2S010</cell>
</row>
<row>
 <cell>Package</cell>
 <cell>484 FBGA</cell>
</row>
<row>
 <cell>Temperature Range</cell>
 <cell>0 - 85 C</cell>
</row>
<row>
 <cell>Voltage Range</cell>
 <cell>1.14 - 1.26 V</cell>
</row>
<row>
 <cell>Speed Grade</cell>
 <cell>-1</cell>
</row>
<row>
 <cell>Design State</cell>
 <cell>Post-Layout</cell>
</row>
<row>
 <cell>Data source</cell>
 <cell>Production</cell>
</row>
<row>
 <cell>Min Operating Conditions</cell>
 <cell>WORST - 1.14 V - 85 C</cell>
</row>
<row>
 <cell>Max Operating Conditions</cell>
 <cell>BEST - 1.26 V - 0 C</cell>
</row>
<row>
 <cell>Scenario for Timing Analysis</cell>
 <cell>Primary</cell>
</row>
</table>
<text></text>
<section>
<name>Summary</name>
<table>
<header>
 <cell>Clock Domain</cell>
 <cell>Period (ns)</cell>
 <cell>Frequency (MHz)</cell>
 <cell>Required Period (ns)</cell>
 <cell>Required Frequency (MHz)</cell>
 <cell>External Setup (ns)</cell>
 <cell>External Hold (ns)</cell>
 <cell>Min Clock-To-Out (ns)</cell>
 <cell>Max Clock-To-Out (ns)</cell>
</header>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>5.267</cell>
 <cell>189.861</cell>
 <cell>10.000</cell>
 <cell>100.000</cell>
 <cell>-2.093</cell>
 <cell>3.564</cell>
 <cell>7.601</cell>
 <cell>8.311</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>2.293</cell>
 <cell>436.110</cell>
 <cell>40.000</cell>
 <cell>25.000</cell>
 <cell>-0.631</cell>
 <cell>2.272</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>20.000</cell>
 <cell>50.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>8.429</cell>
 <cell>5.976</cell>
</row>
</table>
<text></text>
<table>
<header>
 <cell></cell>
 <cell>Min Delay (ns)</cell>
 <cell>Max Delay (ns)</cell>
</header>
<row>
 <cell>Input to Output</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[8]</cell>
 <cell>5.082</cell>
 <cell>4.733</cell>
 <cell>8.865</cell>
 <cell>13.598</cell>
 <cell>0.185</cell>
 <cell>5.267</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>Bldc_Axis_0/apb3_if_0/ac_filter_factor_o[3]:EN</cell>
 <cell>4.798</cell>
 <cell>4.786</cell>
 <cell>8.581</cell>
 <cell>13.367</cell>
 <cell>0.202</cell>
 <cell>5.214</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[2]</cell>
 <cell>5.018</cell>
 <cell>4.815</cell>
 <cell>8.801</cell>
 <cell>13.616</cell>
 <cell>0.167</cell>
 <cell>5.185</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[7]</cell>
 <cell>4.928</cell>
 <cell>4.950</cell>
 <cell>8.711</cell>
 <cell>13.661</cell>
 <cell>0.122</cell>
 <cell>5.050</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell>4.796</cell>
 <cell>4.960</cell>
 <cell>8.579</cell>
 <cell>13.539</cell>
 <cell>0.244</cell>
 <cell>5.040</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[8]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.598</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.865</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>4.733</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.603</cell>
 <cell>2.603</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.137</cell>
 <cell>2.740</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.113</cell>
 <cell>2.853</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>3.050</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>3.223</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.266</cell>
 <cell>3.489</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.144</cell>
 <cell>3.633</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/CLK_BASE_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.150</cell>
 <cell>3.783</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_ADDR[10]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:MSS_010_IP</cell>
 <cell>+</cell>
 <cell>1.100</cell>
 <cell>4.883</cell>
 <cell>4</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/idq_pi_ki_o_1_sqmuxa_8:C</cell>
 <cell>net</cell>
 <cell>MC_System_0_AMBA_SLAVE_0_PADDR[10]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.771</cell>
 <cell>5.654</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/idq_pi_ki_o_1_sqmuxa_8:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.217</cell>
 <cell>5.871</cell>
 <cell>25</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/prdata_o_1_0_a2_2[17]:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/apb3_if_0/idq_pi_ki_o_1_sqmuxa_8_Z</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.495</cell>
 <cell>6.366</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/prdata_o_1_0_a2_2[17]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.139</cell>
 <cell>6.505</cell>
 <cell>18</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/prdata_o_1_17_i_m2_ns_RNI0Q2T[8]:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0_N_1932</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.662</cell>
 <cell>7.167</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/apb3_if_0/prdata_o_1_17_i_m2_ns_RNI0Q2T[8]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.210</cell>
 <cell>7.377</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CoreAPB3_0/u_mux_p_to_b3/PRDATA[8]:A</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0_N_1892</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.215</cell>
 <cell>7.592</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CoreAPB3_0/u_mux_p_to_b3/PRDATA[8]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.186</cell>
 <cell>7.778</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_TMP_0_FIC_0_APB_MASTER_PRDATA[8]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.785</cell>
 <cell>8.563</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.144</cell>
 <cell>8.707</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[8]</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/F_HM0_RDATA_net[8]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>8.865</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.865</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.603</cell>
 <cell>12.603</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.137</cell>
 <cell>12.740</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.113</cell>
 <cell>12.853</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>13.050</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>13.223</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.266</cell>
 <cell>13.489</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.144</cell>
 <cell>13.633</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/CLK_BASE_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.150</cell>
 <cell>13.783</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[8]</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:MSS_010_IP</cell>
 <cell>-</cell>
 <cell>0.185</cell>
 <cell>13.598</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.598</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>External Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>A0_ADC_SDI_I</cell>
 <cell>Bldc_Axis_0/adc_interface_795x_0/spi_engine_inst/s_sdi:D</cell>
 <cell>1.186</cell>
 <cell>6.490</cell>
 <cell>6.789</cell>
 <cell>13.279</cell>
 <cell>0.197</cell>
 <cell>-2.093</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: A0_ADC_SDI_I</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: Bldc_Axis_0/adc_interface_795x_0/spi_engine_inst/s_sdi:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.279</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>6.789</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>6.490</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.603</cell>
 <cell>2.603</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>A0_ADC_SDI_I</cell>
 <cell>Input Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.000</cell>
 <cell>5.603</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_ADC_SDI_I_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>A0_ADC_SDI_I</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>5.603</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_ADC_SDI_I_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>0.917</cell>
 <cell>6.520</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/adc_interface_795x_0/spi_engine_inst/s_sdi:D</cell>
 <cell>net</cell>
 <cell>A0_ADC_SDI_I_ibuf/U0/YIN1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.269</cell>
 <cell>6.789</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>6.789</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.525</cell>
 <cell>12.525</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.132</cell>
 <cell>12.657</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.110</cell>
 <cell>12.767</cell>
 <cell>17</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB20:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.193</cell>
 <cell>12.960</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB20:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.168</cell>
 <cell>13.128</cell>
 <cell>83</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/adc_interface_795x_0/spi_engine_inst/s_sdi:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB20_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.348</cell>
 <cell>13.476</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/adc_interface_795x_0/spi_engine_inst/s_sdi:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:IOINFF</cell>
 <cell>-</cell>
 <cell>0.197</cell>
 <cell>13.279</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.279</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Clock to Output</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Clock to Out (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[8]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>4.598</cell>
 <cell>4.156</cell>
 <cell>8.147</cell>
 <cell>12.303</cell>
 <cell>8.147</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[0]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>4.594</cell>
 <cell>4.165</cell>
 <cell>8.138</cell>
 <cell>12.303</cell>
 <cell>8.138</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[7]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>4.543</cell>
 <cell>4.207</cell>
 <cell>8.096</cell>
 <cell>12.303</cell>
 <cell>8.096</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[8]:CLK</cell>
 <cell>A0_PWM_VL_O</cell>
 <cell>3.783</cell>
 <cell>4.971</cell>
 <cell>7.332</cell>
 <cell>12.303</cell>
 <cell>7.332</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[0]:CLK</cell>
 <cell>A0_PWM_VL_O</cell>
 <cell>3.779</cell>
 <cell>4.980</cell>
 <cell>7.323</cell>
 <cell>12.303</cell>
 <cell>7.323</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: Bldc_Axis_0/MSC_i_22/s_state[8]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: A0_RUNNING_LED</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>12.303</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.147</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>4.156</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.603</cell>
 <cell>2.603</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.137</cell>
 <cell>2.740</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.113</cell>
 <cell>2.853</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB11:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.191</cell>
 <cell>3.044</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB11:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>3.217</cell>
 <cell>57</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[8]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB11_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.332</cell>
 <cell>3.549</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/s_state[8]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.060</cell>
 <cell>3.609</cell>
 <cell>6</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/ADC_START_PROC.un101_s_state_i_a2_0_a3:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_22/MSC_net_83</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.232</cell>
 <cell>3.841</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/ADC_START_PROC.un101_s_state_i_a2_0_a3:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.098</cell>
 <cell>3.939</cell>
 <cell>3</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/ADC_START_PROC.un103_s_state_i_a3_0_a2:A</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_22/MSC_net_285</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.073</cell>
 <cell>4.012</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_22/ADC_START_PROC.un103_s_state_i_a3_0_a2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.060</cell>
 <cell>4.072</cell>
 <cell>32</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOOUTFF:A</cell>
 <cell>net</cell>
 <cell>A0_PWM_UL_O_c</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.631</cell>
 <cell>5.703</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOOUTFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOOUTFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.226</cell>
 <cell>5.929</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOPAD:D</cell>
 <cell>net</cell>
 <cell>A0_RUNNING_LED_obuf/U0/DOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.481</cell>
 <cell>6.410</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOPAD:PAD</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_TRI</cell>
 <cell>+</cell>
 <cell>1.737</cell>
 <cell>8.147</cell>
 <cell>0</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED</cell>
 <cell>net</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.147</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.147</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.603</cell>
 <cell>12.603</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>A0_RUNNING_LED</cell>
 <cell>Output Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell>0.300</cell>
 <cell>12.303</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>12.303</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2 to MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[16]:D</cell>
 <cell>3.458</cell>
 <cell>6.182</cell>
 <cell>7.169</cell>
 <cell>13.351</cell>
 <cell>0.202</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[15]:D</cell>
 <cell>3.385</cell>
 <cell>6.250</cell>
 <cell>7.096</cell>
 <cell>13.346</cell>
 <cell>0.202</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[17]:D</cell>
 <cell>3.379</cell>
 <cell>6.255</cell>
 <cell>7.090</cell>
 <cell>13.345</cell>
 <cell>0.201</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[13]:D</cell>
 <cell>3.304</cell>
 <cell>6.331</cell>
 <cell>7.015</cell>
 <cell>13.346</cell>
 <cell>0.202</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[12]:D</cell>
 <cell>3.295</cell>
 <cell>6.341</cell>
 <cell>7.006</cell>
 <cell>13.347</cell>
 <cell>0.201</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: Bldc_Axis_0/MSC_i_0/s_cos_ac[16]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.351</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>7.169</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>6.182</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.740</cell>
 <cell>2.740</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.137</cell>
 <cell>2.877</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.114</cell>
 <cell>2.991</cell>
 <cell>10</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>3.188</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>3.361</cell>
 <cell>18</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.350</cell>
 <cell>3.711</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff3[6]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.063</cell>
 <cell>3.774</cell>
 <cell>4</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_0:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/SINC3_FILTER_2_data_o[0]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.560</cell>
 <cell>4.334</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_0:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.155</cell>
 <cell>4.489</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0:C</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_0/MSC_net_1036</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.281</cell>
 <cell>4.770</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.137</cell>
 <cell>4.907</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0_CC_0:P[3]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2838</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>4.907</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0_CC_0:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.321</cell>
 <cell>5.228</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0_CC_1:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO2837</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>5.228</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_0_CC_1:CC[3]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.109</cell>
 <cell>5.337</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_12:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2876</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>5.337</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_no_dc_cry_12:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.046</cell>
 <cell>5.383</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_12:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_0/MSC_net_579</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.665</cell>
 <cell>6.048</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_12:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.122</cell>
 <cell>6.170</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_0_CC_1:P[3]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2639</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>6.170</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_0_CC_1:CC[7]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.383</cell>
 <cell>6.553</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_16:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2653</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>6.553</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/un4_s_cos_ac_cry_16:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.050</cell>
 <cell>6.603</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac_3[16]:B</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_0/MSC_net_728</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.425</cell>
 <cell>7.028</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac_3[16]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.097</cell>
 <cell>7.125</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[16]:D</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_0/MSC_net_510</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.044</cell>
 <cell>7.169</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>7.169</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.603</cell>
 <cell>12.603</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.137</cell>
 <cell>12.740</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.114</cell>
 <cell>12.854</cell>
 <cell>17</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB23:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.201</cell>
 <cell>13.055</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB23:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>13.228</cell>
 <cell>34</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[16]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB23_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.325</cell>
 <cell>13.553</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_0/s_cos_ac[16]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.202</cell>
 <cell>13.351</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.351</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[0]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell>2.083</cell>
 <cell>37.707</cell>
 <cell>5.797</cell>
 <cell>43.504</cell>
 <cell>0.202</cell>
 <cell>2.293</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[3]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell>2.042</cell>
 <cell>37.739</cell>
 <cell>5.765</cell>
 <cell>43.504</cell>
 <cell>0.202</cell>
 <cell>2.261</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[0]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[19]:D</cell>
 <cell>1.980</cell>
 <cell>37.778</cell>
 <cell>5.694</cell>
 <cell>43.472</cell>
 <cell>0.201</cell>
 <cell>2.222</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[3]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[19]:D</cell>
 <cell>1.938</cell>
 <cell>37.811</cell>
 <cell>5.661</cell>
 <cell>43.472</cell>
 <cell>0.201</cell>
 <cell>2.189</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1_dec[6]:CLK</cell>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell>1.967</cell>
 <cell>37.826</cell>
 <cell>5.678</cell>
 <cell>43.504</cell>
 <cell>0.202</cell>
 <cell>2.174</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: Bldc_Axis_0/MSC_i_26/s_diff1[0]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>43.504</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>5.797</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>37.707</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.740</cell>
 <cell>2.740</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.137</cell>
 <cell>2.877</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.114</cell>
 <cell>2.991</cell>
 <cell>10</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB10:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>3.188</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB10:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>3.361</cell>
 <cell>32</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[0]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB10_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.353</cell>
 <cell>3.714</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff1[0]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.060</cell>
 <cell>3.774</cell>
 <cell>3</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC.s_diff2_1_cry_0:A</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_26/MSC_net_196</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.717</cell>
 <cell>4.491</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC.s_diff2_1_cry_0:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.092</cell>
 <cell>4.583</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC_s_diff2_1_cry_0_CC_0:P[0]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1820</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>4.583</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC_s_diff2_1_cry_0_CC_0:CC[9]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.443</cell>
 <cell>5.026</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC.s_diff2_1_cry_9:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1849</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>5.026</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/DIFFERENTIATE_PROC.s_diff2_1_cry_9:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.046</cell>
 <cell>5.072</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell>net</cell>
 <cell>Bldc_Axis_0/MSC_i_26/MSC_net_253</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.725</cell>
 <cell>5.797</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>5.797</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>40.000</cell>
 <cell>40.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>40.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.740</cell>
 <cell>42.740</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.137</cell>
 <cell>42.877</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.114</cell>
 <cell>42.991</cell>
 <cell>10</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>43.188</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>43.361</cell>
 <cell>18</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB7_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>43.706</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_26/s_diff2[9]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.202</cell>
 <cell>43.504</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>43.504</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>External Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>PPS</cell>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[4]:EN</cell>
 <cell>2.715</cell>
 <cell>34.891</cell>
 <cell>8.455</cell>
 <cell>43.346</cell>
 <cell>0.245</cell>
 <cell>-0.631</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>PPS</cell>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[2]:EN</cell>
 <cell>2.715</cell>
 <cell>34.891</cell>
 <cell>8.455</cell>
 <cell>43.346</cell>
 <cell>0.245</cell>
 <cell>-0.631</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>PPS</cell>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[8]:EN</cell>
 <cell>2.715</cell>
 <cell>34.891</cell>
 <cell>8.455</cell>
 <cell>43.346</cell>
 <cell>0.245</cell>
 <cell>-0.631</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>PPS</cell>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[6]:EN</cell>
 <cell>2.715</cell>
 <cell>34.891</cell>
 <cell>8.455</cell>
 <cell>43.346</cell>
 <cell>0.245</cell>
 <cell>-0.631</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>PPS</cell>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[10]:EN</cell>
 <cell>2.715</cell>
 <cell>34.892</cell>
 <cell>8.455</cell>
 <cell>43.347</cell>
 <cell>0.245</cell>
 <cell>-0.632</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: PPS</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: Bldc_Axis_0/MSC_i_33/s_acc1[4]:EN</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>43.346</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.455</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>34.891</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.740</cell>
 <cell>2.740</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>PPS</cell>
 <cell>Input Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.000</cell>
 <cell>5.740</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>PPS_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>PPS</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>5.740</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>PPS_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>0.917</cell>
 <cell>6.657</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>PPS_ibuf/U0/U_IOINFF:A</cell>
 <cell>net</cell>
 <cell>PPS_ibuf/U0/YIN1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.043</cell>
 <cell>6.700</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>PPS_ibuf/U0/U_IOINFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOINFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.083</cell>
 <cell>6.783</cell>
 <cell>24</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[4]:EN</cell>
 <cell>net</cell>
 <cell>PPS_c</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.672</cell>
 <cell>8.455</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.455</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>40.000</cell>
 <cell>40.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>40.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.658</cell>
 <cell>42.658</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.132</cell>
 <cell>42.790</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:YSn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.110</cell>
 <cell>42.900</cell>
 <cell>10</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB2:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_YNn_GSouth</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.184</cell>
 <cell>43.084</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB2:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.168</cell>
 <cell>43.252</cell>
 <cell>56</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[4]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_RGB2_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.339</cell>
 <cell>43.591</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Bldc_Axis_0/MSC_i_33/s_acc1[4]:EN</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.245</cell>
 <cell>43.346</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>43.346</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT to MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:RCOSC_25_50MHZ</cell>
 <cell>GPIO_43</cell>
 <cell>4.576</cell>
 <cell>16.464</cell>
 <cell>5.976</cell>
 <cell>22.440</cell>
 <cell></cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:RCOSC_25_50MHZ</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: GPIO_43</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>22.440</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>5.976</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>16.464</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:RCOSC_25_50MHZ</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/FABOSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.400</cell>
 <cell>1.400</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CCC_IP</cell>
 <cell>+</cell>
 <cell>1.334</cell>
 <cell>2.734</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.150</cell>
 <cell>2.884</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.120</cell>
 <cell>3.004</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.195</cell>
 <cell>3.199</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.125</cell>
 <cell>3.324</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>GPIO_43_obuf/U0/U_IOOUTFF:A</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL2_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.462</cell>
 <cell>3.786</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GPIO_43_obuf/U0/U_IOOUTFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOOUTFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.226</cell>
 <cell>4.012</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>GPIO_43_obuf/U0/U_IOPAD:D</cell>
 <cell>net</cell>
 <cell>GPIO_43_obuf/U0/DOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.423</cell>
 <cell>4.435</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GPIO_43_obuf/U0/U_IOPAD:PAD</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_TRI</cell>
 <cell>+</cell>
 <cell>1.541</cell>
 <cell>5.976</cell>
 <cell>0</cell>
 <cell>f</cell>
</row>
<row>
 <cell>GPIO_43</cell>
 <cell>net</cell>
 <cell>GPIO_43</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>5.976</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>5.976</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>20.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.740</cell>
 <cell>22.740</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>GPIO_43</cell>
 <cell>Output Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell>0.300</cell>
 <cell>22.440</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>22.440</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</name>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set Pin to Pin</name>
<section>
<name>SET Input to Output</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set User Sets</name>
</section>
</doc>
