Synopsys VHDL Compiler, version comp201403sp1p1, Build 095R, built Oct  9 2014
@N|Running in 64-bit mode
Copyright (C) 1994-2014 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use, reproduction, or distribution of this software is strictly prohibited.

@N: CD720 :"C:\Microsemi\Libero_v11.5\Synopsys\synplify_I201403MSP1\lib\vhd2008\std.vhd":146:18:146:21|Setting time resolution to ns
@N:"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System\MC_System.vhd":17:7:17:15|Top entity is set to MC_System.
VHDL syntax check successful!
@N: CD231 :"C:\Microsemi\Libero_v11.5\Synopsys\synplify_I201403MSP1\lib\vhd2008\std1164.vhd":913:16:913:17|Using onehot encoding for type mvl9plus ('U'="1000000000")
@N: CD630 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System\MC_System.vhd":17:7:17:15|Synthesizing work.mc_system.rtl 
@N: CD630 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System_sb\MC_System_sb.vhd":20:7:20:18|Synthesizing work.mc_system_sb.rtl 
@N: CD630 :"C:\Microsemi\Libero_v11.5\Synopsys\synplify_I201403MSP1\lib\generic\smartfusion2.vhd":779:10:779:17|Synthesizing smartfusion2.sysreset.syn_black_box 
Post processing for smartfusion2.sysreset.syn_black_box
@N: CD630 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System_sb_MSS\MC_System_sb_MSS.vhd":17:7:17:22|Synthesizing work.mc_system_sb_mss.rtl 
@N: CD630 :"C:\Microsemi\Libero_v11.5\Synopsys\synplify_I201403MSP1\lib\generic\smartfusion2.vhd":434:10:434:14|Synthesizing smartfusion2.bibuf.syn_black_box 
Post processing for smartfusion2.bibuf.syn_black_box
@N: CD630 :"C:\Microsemi\Libero_v11.5\Synopsys\synplify_I201403MSP1\lib\generic\smartfusion2.vhd":403:10:403:14|Synthesizing smartfusion2.inbuf.syn_black_box 
Post processing for smartfusion2.inbuf.syn_black_box
@N: CD630 :"C:\Microsemi\Libero_v11.5\Synopsys\synplify_I201403MSP1\lib\generic\smartfusion2.vhd":423:10:423:16|Synthesizing smartfusion2.tribuff.syn_black_box 
Post processing for smartfusion2.tribuff.syn_black_box
@N: CD630 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System_sb_MSS\MC_System_sb_MSS_syn.vhd":10:7:10:13|Synthesizing work.mss_010.def_arch 
Post processing for work.mss_010.def_arch
Post processing for work.mc_system_sb_mss.rtl
@N: CD630 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System_sb\FABOSC_0\MC_System_sb_FABOSC_0_OSC.vhd":8:7:8:31|Synthesizing work.mc_system_sb_fabosc_0_osc.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v11.5\Synopsys\synplify_I201403MSP1\lib\generic\smartfusion2.vhd":562:10:562:15|Synthesizing smartfusion2.clkint.syn_black_box 
Post processing for smartfusion2.clkint.syn_black_box
@N: CD630 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\SgCore\OSC\1.0.103\osc_comps.vhd":19:7:19:20|Synthesizing work.rcosc_25_50mhz.def_arch 
Post processing for work.rcosc_25_50mhz.def_arch
@N: CD630 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\SgCore\OSC\1.0.103\osc_comps.vhd":79:7:79:24|Synthesizing work.rcosc_25_50mhz_fab.def_arch 
Post processing for work.rcosc_25_50mhz_fab.def_arch
Post processing for work.mc_system_sb_fabosc_0_osc.def_arch
@W: CL240 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System_sb\FABOSC_0\MC_System_sb_FABOSC_0_OSC.vhd":16:10:16:19|XTLOSC_O2F is not assigned a value (floating) -- simulation mismatch possible. 
@W: CL240 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System_sb\FABOSC_0\MC_System_sb_FABOSC_0_OSC.vhd":15:10:15:19|XTLOSC_CCC is not assigned a value (floating) -- simulation mismatch possible. 
@W: CL240 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System_sb\FABOSC_0\MC_System_sb_FABOSC_0_OSC.vhd":14:10:14:23|RCOSC_1MHZ_O2F is not assigned a value (floating) -- simulation mismatch possible. 
@W: CL240 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System_sb\FABOSC_0\MC_System_sb_FABOSC_0_OSC.vhd":13:10:13:23|RCOSC_1MHZ_CCC is not assigned a value (floating) -- simulation mismatch possible. 
@N: CD630 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":27:7:27:16|Synthesizing work.coreresetp.rtl 
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":477:8:477:25|Signal soft_ext_reset_out in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":478:8:478:21|Signal soft_reset_f2m in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":479:8:479:20|Signal soft_m3_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":480:8:480:37|Signal soft_mddr_ddr_axi_s_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":481:8:481:27|Signal soft_fddr_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":482:8:482:27|Signal soft_sdif0_phy_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":483:8:483:28|Signal soft_sdif0_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":484:8:484:27|Signal soft_sdif1_phy_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":485:8:485:28|Signal soft_sdif1_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":486:8:486:27|Signal soft_sdif2_phy_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":487:8:487:28|Signal soft_sdif2_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":488:8:488:27|Signal soft_sdif3_phy_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":489:8:489:28|Signal soft_sdif3_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":490:8:490:30|Signal soft_sdif0_0_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":491:8:491:30|Signal soft_sdif0_1_core_reset in the sensitivity list is not used in the process
Post processing for work.coreresetp.rtl
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1519:8:1519:9|Pruning register count_ddr_2(13 downto 0)  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1495:8:1495:9|Pruning register count_sdif3_2(12 downto 0)  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1471:8:1471:9|Pruning register count_sdif2_2(12 downto 0)  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1447:8:1447:9|Pruning register count_sdif1_2(12 downto 0)  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1423:8:1423:9|Pruning register count_sdif0_2(12 downto 0)  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_ddr_enable_rcosc_2  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_ddr_enable_q1_2  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif3_enable_rcosc_2  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif2_enable_rcosc_2  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif1_enable_rcosc_2  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif0_enable_rcosc_2  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif3_enable_q1_2  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif2_enable_q1_2  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif1_enable_q1_2  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif0_enable_q1_2  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1311:8:1311:9|Pruning register count_sdif3_enable_3  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1252:8:1252:9|Pruning register count_sdif2_enable_3  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1193:8:1193:9|Pruning register count_sdif1_enable_3  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1134:8:1134:9|Pruning register count_sdif0_enable_3  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1059:8:1059:9|Pruning register count_ddr_enable_3  
@N: CL177 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1331:8:1331:9|Sharing sequential element M3_RESET_N_int.
@N: CL177 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":936:8:936:9|Sharing sequential element sdif2_spll_lock_q1.
@N: CL177 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":936:8:936:9|Sharing sequential element sdif1_spll_lock_q1.
@N: CL177 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":936:8:936:9|Sharing sequential element sdif0_spll_lock_q1.
@N: CL177 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":936:8:936:9|Sharing sequential element fpll_lock_q1.
@W: CL190 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1376:8:1376:9|Optimizing register bit EXT_RESET_OUT_int to a constant 0
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1059:8:1059:9|Pruning register release_ext_reset  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1376:8:1376:9|Pruning register EXT_RESET_OUT_int  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1376:8:1376:9|Pruning register sm2_state(2 downto 0)  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":792:8:792:9|Pruning register sm2_areset_n_q1  
@W: CL169 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":792:8:792:9|Pruning register sm2_areset_n_clk_base  
@N: CD630 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":34:7:34:14|Synthesizing coreapb3_lib.coreapb3.coreapb3_arch 
@W: CD604 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":650:16:650:29|OTHERS clause is not synthesized 
@W: CD434 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":1438:41:1438:46|Signal infill in the sensitivity list is not used in the process
@W: CD638 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":601:7:601:15|Signal ia_prdata is undriven 
@N: CD630 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3_muxptob3.vhd":33:7:33:23|Synthesizing coreapb3_lib.coreapb3_muxptob3.coreapb3_muxptob3_arch 
Post processing for coreapb3_lib.coreapb3_muxptob3.coreapb3_muxptob3_arch
Post processing for coreapb3_lib.coreapb3.coreapb3_arch
@N: CD630 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System_sb\CCC_0\MC_System_sb_CCC_0_FCCC.vhd":8:7:8:29|Synthesizing work.mc_system_sb_ccc_0_fccc.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v11.5\Synopsys\synplify_I201403MSP1\lib\generic\smartfusion2.vhd":787:10:787:12|Synthesizing smartfusion2.ccc.syn_black_box 
Post processing for smartfusion2.ccc.syn_black_box
@N: CD630 :"C:\Microsemi\Libero_v11.5\Synopsys\synplify_I201403MSP1\lib\generic\smartfusion2.vhd":569:10:569:12|Synthesizing smartfusion2.gnd.syn_black_box 
Post processing for smartfusion2.gnd.syn_black_box
@N: CD630 :"C:\Microsemi\Libero_v11.5\Synopsys\synplify_I201403MSP1\lib\generic\smartfusion2.vhd":575:10:575:12|Synthesizing smartfusion2.vcc.syn_black_box 
Post processing for smartfusion2.vcc.syn_black_box
Post processing for work.mc_system_sb_ccc_0_fccc.def_arch
Post processing for work.mc_system_sb.rtl
Post processing for work.mc_system.rtl
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":74:0:74:4|Input IADDR is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":75:0:75:6|Input PRESETN is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":76:0:76:3|Input PCLK is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":108:0:108:7|Input PRDATAS2 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":109:0:109:7|Input PRDATAS3 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":110:0:110:7|Input PRDATAS4 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":111:0:111:7|Input PRDATAS5 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":112:0:112:7|Input PRDATAS6 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":113:0:113:7|Input PRDATAS7 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":114:0:114:7|Input PRDATAS8 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":115:0:115:7|Input PRDATAS9 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":116:0:116:8|Input PRDATAS10 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":117:0:117:8|Input PRDATAS11 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":118:0:118:8|Input PRDATAS12 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":119:0:119:8|Input PRDATAS13 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":120:0:120:8|Input PRDATAS14 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":121:0:121:8|Input PRDATAS15 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":125:0:125:7|Input PREADYS2 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":126:0:126:7|Input PREADYS3 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":127:0:127:7|Input PREADYS4 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":128:0:128:7|Input PREADYS5 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":129:0:129:7|Input PREADYS6 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":130:0:130:7|Input PREADYS7 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":131:0:131:7|Input PREADYS8 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":132:0:132:7|Input PREADYS9 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":133:0:133:8|Input PREADYS10 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":134:0:134:8|Input PREADYS11 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":135:0:135:8|Input PREADYS12 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":136:0:136:8|Input PREADYS13 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":137:0:137:8|Input PREADYS14 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":138:0:138:8|Input PREADYS15 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":142:0:142:8|Input PSLVERRS2 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":143:0:143:8|Input PSLVERRS3 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":144:0:144:8|Input PSLVERRS4 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":145:0:145:8|Input PSLVERRS5 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":146:0:146:8|Input PSLVERRS6 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":147:0:147:8|Input PSLVERRS7 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":148:0:148:8|Input PSLVERRS8 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":149:0:149:8|Input PSLVERRS9 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":150:0:150:9|Input PSLVERRS10 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":151:0:151:9|Input PSLVERRS11 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":152:0:152:9|Input PSLVERRS12 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":153:0:153:9|Input PSLVERRS13 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":154:0:154:9|Input PSLVERRS14 is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd":155:0:155:9|Input PSLVERRS15 is unused
@N: CL177 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":936:8:936:9|Sharing sequential element sdif0_spll_lock_q2.
@N: CL177 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":936:8:936:9|Sharing sequential element fpll_lock_q2.
@N: CL177 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":936:8:936:9|Sharing sequential element sdif1_spll_lock_q2.
@N: CL177 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":936:8:936:9|Sharing sequential element sdif2_spll_lock_q2.
@N: CL201 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1311:8:1311:9|Trying to extract state machine for register sdif3_state
Extracted state machine for register sdif3_state
State machine has 4 reachable states with original encodings of:
   000
   001
   010
   011
@N: CL201 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1252:8:1252:9|Trying to extract state machine for register sdif2_state
Extracted state machine for register sdif2_state
State machine has 4 reachable states with original encodings of:
   000
   001
   010
   011
@N: CL201 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1193:8:1193:9|Trying to extract state machine for register sdif1_state
Extracted state machine for register sdif1_state
State machine has 4 reachable states with original encodings of:
   000
   001
   010
   011
@N: CL201 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1134:8:1134:9|Trying to extract state machine for register sdif0_state
Extracted state machine for register sdif0_state
State machine has 4 reachable states with original encodings of:
   000
   001
   010
   011
@N: CL201 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1059:8:1059:9|Trying to extract state machine for register sm0_state
Extracted state machine for register sm0_state
State machine has 7 reachable states with original encodings of:
   000
   001
   010
   011
   100
   101
   110
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":96:4:96:12|Input CLK_LTSSM is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":123:4:123:12|Input FPLL_LOCK is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":126:4:126:18|Input SDIF0_SPLL_LOCK is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":135:4:135:18|Input SDIF1_SPLL_LOCK is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":139:4:139:18|Input SDIF2_SPLL_LOCK is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":143:4:143:18|Input SDIF3_SPLL_LOCK is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":157:4:157:13|Input SDIF0_PSEL is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":158:4:158:15|Input SDIF0_PWRITE is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":159:4:159:15|Input SDIF0_PRDATA is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":160:4:160:13|Input SDIF1_PSEL is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":161:4:161:15|Input SDIF1_PWRITE is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":162:4:162:15|Input SDIF1_PRDATA is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":163:4:163:13|Input SDIF2_PSEL is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":164:4:164:15|Input SDIF2_PWRITE is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":165:4:165:15|Input SDIF2_PRDATA is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":166:4:166:13|Input SDIF3_PSEL is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":167:4:167:15|Input SDIF3_PWRITE is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":168:4:168:15|Input SDIF3_PRDATA is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":174:4:174:21|Input SOFT_EXT_RESET_OUT is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":175:4:175:17|Input SOFT_RESET_F2M is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":176:4:176:16|Input SOFT_M3_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":177:4:177:33|Input SOFT_MDDR_DDR_AXI_S_CORE_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":178:4:178:23|Input SOFT_FDDR_CORE_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":179:4:179:23|Input SOFT_SDIF0_PHY_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":180:4:180:24|Input SOFT_SDIF0_CORE_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":181:4:181:23|Input SOFT_SDIF1_PHY_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":182:4:182:24|Input SOFT_SDIF1_CORE_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":183:4:183:23|Input SOFT_SDIF2_PHY_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":184:4:184:24|Input SOFT_SDIF2_CORE_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":185:4:185:23|Input SOFT_SDIF3_PHY_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":186:4:186:24|Input SOFT_SDIF3_CORE_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":190:4:190:26|Input SOFT_SDIF0_0_CORE_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":191:4:191:26|Input SOFT_SDIF0_1_CORE_RESET is unused
@W: CL159 :"D:\SVN Solutions\Motor Control\Development\MCSK\SK2ABLSTSL10_4_1\component\work\MC_System_sb\FABOSC_0\MC_System_sb_FABOSC_0_OSC.vhd":10:10:10:12|Input XTL is unused
@END

At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 88MB peak: 90MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Tue Mar 10 11:25:04 2015

###########################################################]
