<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<?xml-stylesheet href="rptstyle.xsl" type="text/xsl" ?>
<doc>
<title>Timing Report Max Delay Analysis
</title>
<text>SmartTime Version 11.8.2.4</text>
<text>Microsemi Corporation - Microsemi Libero Software Release Libero SoC v11.8 SP2 (Version 11.8.2.4)</text>
<text>Date: Wed Nov 29 13:51:38 2017
</text>
<table>
<header>
</header>
<row>
 <cell>Design</cell>
 <cell>MC_System_top</cell>
</row>
<row>
 <cell>Family</cell>
 <cell>SmartFusion2</cell>
</row>
<row>
 <cell>Die</cell>
 <cell>M2S010</cell>
</row>
<row>
 <cell>Package</cell>
 <cell>484 FBGA</cell>
</row>
<row>
 <cell>Temperature Range</cell>
 <cell>0 - 85 C</cell>
</row>
<row>
 <cell>Voltage Range</cell>
 <cell>1.14 - 1.26 V</cell>
</row>
<row>
 <cell>Speed Grade</cell>
 <cell>-1</cell>
</row>
<row>
 <cell>Design State</cell>
 <cell>Post-Layout</cell>
</row>
<row>
 <cell>Data source</cell>
 <cell>Production</cell>
</row>
<row>
 <cell>Min Operating Conditions</cell>
 <cell>BEST - 1.26 V - 0 C</cell>
</row>
<row>
 <cell>Max Operating Conditions</cell>
 <cell>WORST - 1.14 V - 85 C</cell>
</row>
<row>
 <cell>Scenario for Timing Analysis</cell>
 <cell>Primary</cell>
</row>
</table>
<text></text>
<section>
<name>Summary</name>
<table>
<header>
 <cell>Clock Domain</cell>
 <cell>Period (ns)</cell>
 <cell>Frequency (MHz)</cell>
 <cell>Required Period (ns)</cell>
 <cell>Required Frequency (MHz)</cell>
 <cell>External Setup (ns)</cell>
 <cell>External Hold (ns)</cell>
 <cell>Min Clock-To-Out (ns)</cell>
 <cell>Max Clock-To-Out (ns)</cell>
</header>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>7.843</cell>
 <cell>127.502</cell>
 <cell>10.000</cell>
 <cell>100.000</cell>
 <cell>3.953</cell>
 <cell>1.834</cell>
 <cell>4.472</cell>
 <cell>11.842</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>20.000</cell>
 <cell>50.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL1</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>10.000</cell>
 <cell>100.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
<text></text>
<table>
<header>
 <cell></cell>
 <cell>Min Delay (ns)</cell>
 <cell>Max Delay (ns)</cell>
</header>
<row>
 <cell>Input to Output</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[17]:EN</cell>
 <cell>7.193</cell>
 <cell>2.157</cell>
 <cell>11.683</cell>
 <cell>13.840</cell>
 <cell>0.308</cell>
 <cell>7.843</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[6]:EN</cell>
 <cell>7.193</cell>
 <cell>2.167</cell>
 <cell>11.683</cell>
 <cell>13.850</cell>
 <cell>0.308</cell>
 <cell>7.833</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/MSC_i_10/rl_out_prev_o[3]:CLK</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/s_ramp_out[15]:D</cell>
 <cell>7.510</cell>
 <cell>2.220</cell>
 <cell>11.697</cell>
 <cell>13.917</cell>
 <cell>0.254</cell>
 <cell>7.780</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/MSC_i_10/rl_out_prev_o[3]:CLK</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/s_ramp_out[10]:D</cell>
 <cell>7.334</cell>
 <cell>2.374</cell>
 <cell>11.521</cell>
 <cell>13.895</cell>
 <cell>0.254</cell>
 <cell>7.626</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/MSC_i_10/rl_out_prev_o[3]:CLK</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/s_ramp_out[16]:D</cell>
 <cell>7.350</cell>
 <cell>2.381</cell>
 <cell>11.537</cell>
 <cell>13.918</cell>
 <cell>0.254</cell>
 <cell>7.619</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[17]:EN</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.840</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>11.683</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>2.157</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.784</cell>
 <cell>2.784</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>2.981</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.165</cell>
 <cell>3.146</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.284</cell>
 <cell>3.430</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.250</cell>
 <cell>3.680</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.385</cell>
 <cell>4.065</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.209</cell>
 <cell>4.274</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/CLK_BASE_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.216</cell>
 <cell>4.490</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_ADDR[11]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:MSS_010_IP</cell>
 <cell>+</cell>
 <cell>1.302</cell>
 <cell>5.792</cell>
 <cell>8</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_0:B</cell>
 <cell>net</cell>
 <cell>MC_System_0_AMBA_SLAVE_0_PADDR[11]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.803</cell>
 <cell>6.595</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_0:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.143</cell>
 <cell>6.738</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_2:D</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_0_Z</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.301</cell>
 <cell>7.039</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.287</cell>
 <cell>7.326</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_1:D</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_2_Z</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.688</cell>
 <cell>8.014</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_1:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.287</cell>
 <cell>8.301</cell>
 <cell>8</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o_1_sqmuxa_0_a2:A</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/N_1865</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.580</cell>
 <cell>9.881</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o_1_sqmuxa_0_a2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>9.968</cell>
 <cell>18</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[17]:EN</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o_1_sqmuxa</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.715</cell>
 <cell>11.683</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>11.683</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.784</cell>
 <cell>12.784</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>12.981</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.165</cell>
 <cell>13.146</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB6:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.278</cell>
 <cell>13.424</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB6:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.251</cell>
 <cell>13.675</cell>
 <cell>91</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[17]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB6_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.473</cell>
 <cell>14.148</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[17]:EN</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.308</cell>
 <cell>13.840</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.840</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>External Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>HC_i</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell>8.001</cell>
 <cell>0.263</cell>
 <cell>13.785</cell>
 <cell>14.048</cell>
 <cell>0.307</cell>
 <cell>3.953</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>HC_i</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[3]</cell>
 <cell>7.826</cell>
 <cell>0.312</cell>
 <cell>13.610</cell>
 <cell>13.922</cell>
 <cell>0.433</cell>
 <cell>3.904</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>HC_i</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[1]</cell>
 <cell>7.982</cell>
 <cell>0.357</cell>
 <cell>13.766</cell>
 <cell>14.123</cell>
 <cell>0.232</cell>
 <cell>3.859</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>HC_i</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[12]</cell>
 <cell>7.946</cell>
 <cell>0.446</cell>
 <cell>13.730</cell>
 <cell>14.176</cell>
 <cell>0.179</cell>
 <cell>3.770</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>HB_i</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell>7.787</cell>
 <cell>0.477</cell>
 <cell>13.571</cell>
 <cell>14.048</cell>
 <cell>0.307</cell>
 <cell>3.739</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: HC_i</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.048</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>13.785</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.263</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.784</cell>
 <cell>2.784</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>HC_i</cell>
 <cell>Input Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.000</cell>
 <cell>5.784</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>HC_i_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>HC_i</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>5.784</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>HC_i_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>1.400</cell>
 <cell>7.184</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>HC_i_ibuf/U0/U_IOINFF:A</cell>
 <cell>net</cell>
 <cell>HC_i_ibuf/U0/YIN1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.413</cell>
 <cell>7.597</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>HC_i_ibuf/U0/U_IOINFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOINFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.157</cell>
 <cell>7.754</cell>
 <cell>6</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_15/s_angle_out_raw_12_0_.m4:A</cell>
 <cell>net</cell>
 <cell>HC_i_c</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.553</cell>
 <cell>9.307</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_15/s_angle_out_raw_12_0_.m4:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.221</cell>
 <cell>9.528</cell>
 <cell>14</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_15_i_m3_0_0_wmux[9]:C</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/HALL_INTERFACE_1_angle_out_raw_o[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.207</cell>
 <cell>10.735</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_15_i_m3_0_0_wmux[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.202</cell>
 <cell>10.937</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_15_i_m3_0_wmux_0[9]:A</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_15_i_m3_0_0_y0[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.091</cell>
 <cell>11.028</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_15_i_m3_0_wmux_0[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.074</cell>
 <cell>11.102</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_9_a2[9]:B</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/N_740</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.705</cell>
 <cell>11.807</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_9_a2[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.074</cell>
 <cell>11.881</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CoreAPB3_0/u_mux_p_to_b3/PRDATA[9]:D</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0_N_1760</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.227</cell>
 <cell>12.108</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CoreAPB3_0/u_mux_p_to_b3/PRDATA[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>12.266</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_TMP_0_FIC_0_APB_MASTER_PRDATA[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.064</cell>
 <cell>13.330</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.209</cell>
 <cell>13.539</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/F_HM0_RDATA_net[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.246</cell>
 <cell>13.785</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.785</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.700</cell>
 <cell>12.700</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.191</cell>
 <cell>12.891</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.160</cell>
 <cell>13.051</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.275</cell>
 <cell>13.326</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.243</cell>
 <cell>13.569</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.373</cell>
 <cell>13.942</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.203</cell>
 <cell>14.145</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/CLK_BASE_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.210</cell>
 <cell>14.355</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:MSS_010_IP</cell>
 <cell>-</cell>
 <cell>0.307</cell>
 <cell>14.048</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.048</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Clock to Output</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Clock to Out (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[8]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>7.685</cell>
 <cell>0.642</cell>
 <cell>11.842</cell>
 <cell>12.484</cell>
 <cell>11.842</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[0]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>7.650</cell>
 <cell>0.666</cell>
 <cell>11.818</cell>
 <cell>12.484</cell>
 <cell>11.818</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[7]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>7.440</cell>
 <cell>0.878</cell>
 <cell>11.606</cell>
 <cell>12.484</cell>
 <cell>11.606</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[8]:CLK</cell>
 <cell>A0_PWM_UL_O</cell>
 <cell>5.670</cell>
 <cell>2.657</cell>
 <cell>9.827</cell>
 <cell>12.484</cell>
 <cell>9.827</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[0]:CLK</cell>
 <cell>A0_PWM_UL_O</cell>
 <cell>5.635</cell>
 <cell>2.681</cell>
 <cell>9.803</cell>
 <cell>12.484</cell>
 <cell>9.803</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: BLDC_HALL_Axis_0/MSC_i_11/s_state[8]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: A0_RUNNING_LED</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>12.484</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>11.842</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.642</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.784</cell>
 <cell>2.784</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.197</cell>
 <cell>2.981</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.165</cell>
 <cell>3.146</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB10:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.273</cell>
 <cell>3.419</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB10:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.251</cell>
 <cell>3.670</cell>
 <cell>49</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[8]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB10_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.487</cell>
 <cell>4.157</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[8]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>4.244</cell>
 <cell>6</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/ADC_START_PROC.un101_s_state_i_a2_0_a3:B</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/MSC_net_83</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.449</cell>
 <cell>4.693</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/ADC_START_PROC.un101_s_state_i_a2_0_a3:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.100</cell>
 <cell>4.793</cell>
 <cell>3</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/ADC_START_PROC.un103_s_state_i_a3_0_a2:A</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/MSC_net_285</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>4.898</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/ADC_START_PROC.un103_s_state_i_a3_0_a2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>4.985</cell>
 <cell>32</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOOUTFF:A</cell>
 <cell>net</cell>
 <cell>A0_PWM_UL_O_c</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.124</cell>
 <cell>8.109</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOOUTFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOOUTFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.330</cell>
 <cell>8.439</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOPAD:D</cell>
 <cell>net</cell>
 <cell>A0_RUNNING_LED_obuf/U0/DOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.701</cell>
 <cell>9.140</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOPAD:PAD</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_TRI</cell>
 <cell>+</cell>
 <cell>2.702</cell>
 <cell>11.842</cell>
 <cell>0</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED</cell>
 <cell>net</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>11.842</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>11.842</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.784</cell>
 <cell>12.784</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>A0_RUNNING_LED</cell>
 <cell>Output Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell>0.300</cell>
 <cell>12.484</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>12.484</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</name>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL1</name>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set Pin to Pin</name>
<section>
<name>SET Input to Output</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set User Sets</name>
</section>
</doc>
