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<?xml-stylesheet type="text/xsl" href="datasheet.xsl"?>
<datasheet>
  <header>MC_System_top</header>
  <project-settings>
    <fam>SmartFusion2</fam>
    <die>M2S010</die>
    <package>484 FBGA</package>
    <speed-grade>-1</speed-grade>
    <voltage>1.2</voltage>
    <hdl-type>VHDL</hdl-type>
    <project-description>
    </project-description>
    <location>E:/Solutions_Repo/Motor Control/Development/MCSK/SK2ABLSTSL10_4_0_D/SK2ABLSTSL10_4_0_D/component/work/MC_System_top</location>
    <state>GENERATED ( Thu Oct 16 12:53:17 2014 )</state>
    <swide-toolchain>SoftConsole workspace generated to E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\SoftConsole</swide-toolchain>
  </project-settings>
  <site-map>
  </site-map>
  <fileset>
    <name>HDL File(s)</name>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\components.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3_iaddr_reg.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\component\Actel\DirectCore\CoreAPB3\4.0.100\rtl\vhdl\core\coreapb3_muxptob3.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\component\Actel\SgCore\OSC\1.0.100\osc_comps.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\component\work\MC_System\CCC_0\MC_System_CCC_0_FCCC.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\component\work\MC_System\FABOSC_0\MC_System_FABOSC_0_OSC.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\component\work\MC_System\MC_System.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\component\work\MC_System_MSS\MC_System_MSS.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\component\work\MC_System_MSS\MC_System_MSS_syn.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\component\work\MC_System_top\MC_System_top.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\accumulator.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\accumulator_st.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\acc_lsram_sp.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\acc_ram_sp.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\adc_measurements.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\adc_scaling.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\apb3_if.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\apb3_if_st.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\clarke.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\control_logic.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\control_logic_st.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\core3phasepwm.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\core3phasepwm_st.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\cpipic.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\edge_detection_logic.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\edge_detection_logic_st.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\estimator.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\filter.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\flux_estimator.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\inverse_clarke.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\inverse_park.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\mas.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\mas_scheduler.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\MSMC_Fab_6AxisTop.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\msmc_fab_toplevel.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\msmc_fab_toplevel_st.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\park.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\pi_controller.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\pi_scheduler.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\pkg_commutator_components.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\pll_theta.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\pwm_comp_dead_band_mngr.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\pwm_count.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\pwm_gen.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\rate_limiter.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\sine_cos.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\sine_cos_sim.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\sin_lut_8kX18.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\sin_lut_8kX18_sin_lut_8kX18_0_TPSRAM.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\speed_id_iq_pi.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\spi_txrx_TMC262.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\sqmng.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\svpwm.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\theta_gen.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\timer.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\tmc262_commutator_top.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\top_controller.vhd</file>
    <file>E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSTSL10_4_0_D\SK2ABLSTSL10_4_0_D\hdl\top_controller_st.vhd</file>
  </fileset>
  <core type="ComponentModule">
    <core-type>ComponentModule</core-type>
    <core-exttype>SmartDesign</core-exttype>
    <core-location>E:/Solutions_Repo/Motor Control/Development/MCSK/SK2ABLSTSL10_4_0_D/SK2ABLSTSL10_4_0_D/component/work/MC_System</core-location>
    <core-name>MC_System_0</core-name>
  </core>
  <core>
    <core-name>MSMC_Fab_6AxisTop_0</core-name>
  </core>
  <firmware_core type="FirmWareModule">
    <core-exttype>IP</core-exttype>
    <core-type>FirmWareModule</core-type>
    <core-vendor>Actel</core-vendor>
    <core-lib>Firmware</core-lib>
    <core-intname>SmartFusion2_CMSIS</core-intname>
    <core-ver>2.0.102</core-ver>
    <core-desc>SmartFusion2 Cortex Microcontroller Software Interface Standard (CMSIS).

The firmware package provides:
- Cortex-M3 startup code.
- CMSIS standard naming for exception and interrupt handlers.
- CMSIS standard functions for controlling the Cortex-M3 Nested Vectored Interrupt Controller (NVIC).
- peripherals registers description.
- hardware abstraction layer (HAL) for FPGA fabric soft-IP peripherirals.

These files are required by the SmartFusion2 bare metal peripheral drivers to build correctly.
</core-desc>
    <core-param>
      <param-name>Software Tool Chain:</param-name>
      <param-value>SoftConsole</param-value>
      <param-hdlname>ToolChain</param-hdlname>
      <param-hdlvalue>SoftConsole</param-hdlvalue>
      <param-tag>actel-cc:variantParameter</param-tag>
    </core-param>
    <core-name>SmartFusion2_CMSIS_0</core-name>
  </firmware_core>
  <firmware_core type="FirmWareModule">
    <core-exttype>IP</core-exttype>
    <core-type>FirmWareModule</core-type>
    <core-vendor>Actel</core-vendor>
    <core-lib>Firmware</core-lib>
    <core-intname>SmartFusion2_MSS_GPIO_Driver</core-intname>
    <core-ver>2.0.101</core-ver>
    <core-desc>SmartFusion2 microcontroller subsystem (MSS) GPIO bare metal software driver.

This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly.</core-desc>
    <core-name>SmartFusion2_MSS_GPIO_Driver_0</core-name>
  </firmware_core>
  <firmware_core type="FirmWareModule">
    <core-exttype>IP</core-exttype>
    <core-type>FirmWareModule</core-type>
    <core-vendor>Actel</core-vendor>
    <core-lib>Firmware</core-lib>
    <core-intname>SmartFusion2_MSS_HPDMA_Driver</core-intname>
    <core-ver>2.0.101</core-ver>
    <core-desc>SmartFusion2 microcontroller subsystem (MSS) High Performance DMA bare metal software driver.

This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly.</core-desc>
    <core-name>SmartFusion2_MSS_HPDMA_Driver_0</core-name>
  </firmware_core>
  <firmware_core type="FirmWareModule">
    <core-exttype>IP</core-exttype>
    <core-type>FirmWareModule</core-type>
    <core-vendor>Actel</core-vendor>
    <core-lib>Firmware</core-lib>
    <core-intname>SmartFusion2_MSS_NVM_Driver</core-intname>
    <core-ver>2.2.100</core-ver>
    <core-desc>SmartFusion2 microcontroller subsystem (MSS) eNVM bare metal software driver.

This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly.</core-desc>
    <core-name>SmartFusion2_MSS_NVM_Driver_0</core-name>
  </firmware_core>
  <firmware_core type="FirmWareModule">
    <core-exttype>IP</core-exttype>
    <core-type>FirmWareModule</core-type>
    <core-vendor>Actel</core-vendor>
    <core-lib>Firmware</core-lib>
    <core-intname>SmartFusion2_MSS_System_Services_Driver</core-intname>
    <core-ver>2.3.102</core-ver>
    <core-desc>SmartFusion2 microsontroller subsystem (MSS) System Services software driver.

This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly.</core-desc>
    <core-name>SmartFusion2_MSS_System_Services_Driver_0</core-name>
  </firmware_core>
  <firmware_core type="FirmWareModule">
    <core-exttype>IP</core-exttype>
    <core-type>FirmWareModule</core-type>
    <core-vendor>Actel</core-vendor>
    <core-lib>Firmware</core-lib>
    <core-intname>SmartFusion2_MSS_Timer_Driver</core-intname>
    <core-ver>2.0.101</core-ver>
    <core-desc>SmartFusion2 microcontroller subsystem (MSS) Timer bare metal software driver.

This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly.</core-desc>
    <core-name>SmartFusion2_MSS_Timer_Driver_0</core-name>
  </firmware_core>
  <firmware_core type="FirmWareModule">
    <core-exttype>IP</core-exttype>
    <core-type>FirmWareModule</core-type>
    <core-vendor>Actel</core-vendor>
    <core-lib>Firmware</core-lib>
    <core-intname>SmartFusion2_MSS_USB_Driver</core-intname>
    <core-ver>2.2.103</core-ver>
    <core-desc>SmartFusion2 microcontroller subsystem (MSS) USB bare metal software driver.

The firmware package provides:
- MSS USB Device Core Driver 
- MSS USB Host Core Driver 
- USB MSC Device Class driver with example project.
- USB CDC Device Class driver with example project.
- USB HID Device Class driver with example project.
- USB MSC Host Class driver with example project.


This driver requires the SmartFusion2 CMSIS Hardware Abstraction Layer to build correctly.</core-desc>
    <core-name>SmartFusion2_MSS_USB_Driver_0</core-name>
  </firmware_core>
  <memorysystem>
    <title>Memory Map for MC_System_top</title>
    <description>The project contains the following subsystems:</description>
    <subsystems>
      <subsystem>
        <name>CM3</name>
        <master>CM3</master>
        <addressNames>
          <count>1</count>
          <name>
          </name>
        </addressNames>
        <slave>
          <name>FIC32_REGION5</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0xF0000000</remapAddress>
          <fullAddressSpace>0xF0000000 - 0xFFFFFFFF</fullAddressSpace>
          <range>0x10000000</range>
        </slave>
        <slave>
          <name>DDR_0_SPACE_3</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0xD0000000</remapAddress>
          <fullAddressSpace>0xD0000000 - 0xDFFFFFFF</fullAddressSpace>
          <range>0x10000000</range>
        </slave>
        <slave>
          <name>DDR_0_SPACE_2</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0xC0000000</remapAddress>
          <fullAddressSpace>0xC0000000 - 0xCFFFFFFF</fullAddressSpace>
          <range>0x10000000</range>
        </slave>
        <slave>
          <name>DDR_0_SPACE_1</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0xB0000000</remapAddress>
          <fullAddressSpace>0xB0000000 - 0xBFFFFFFF</fullAddressSpace>
          <range>0x10000000</range>
        </slave>
        <slave>
          <name>DDR_0_SPACE_0</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0xA0000000</remapAddress>
          <fullAddressSpace>0xA0000000 - 0xAFFFFFFF</fullAddressSpace>
          <range>0x10000000</range>
        </slave>
        <slave>
          <name>FIC32_REGION4</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x90000000</remapAddress>
          <fullAddressSpace>0x90000000 - 0x9FFFFFFF</fullAddressSpace>
          <range>0x10000000</range>
        </slave>
        <slave>
          <name>FIC32_REGION3</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x80000000</remapAddress>
          <fullAddressSpace>0x80000000 - 0x8FFFFFFF</fullAddressSpace>
          <range>0x10000000</range>
        </slave>
        <slave>
          <name>AHB2ENVM1_REGISTERS</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x600C0000</remapAddress>
          <fullAddressSpace>0x600C0000 - 0x600FFFFF</fullAddressSpace>
          <range>0x00040000</range>
        </slave>
        <slave>
          <name>AHB2ENVM0_REGISTERS</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x60080000</remapAddress>
          <fullAddressSpace>0x60080000 - 0x600BFFFF</fullAddressSpace>
          <range>0x00040000</range>
        </slave>
        <slave>
          <name>ENVM1</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x60040000</remapAddress>
          <fullAddressSpace>0x60040000 - 0x6007FFFF</fullAddressSpace>
          <range>0x00040000</range>
        </slave>
        <slave>
          <name>ENVM0</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x60000000</remapAddress>
          <fullAddressSpace>0x60000000 - 0x6003FFFF</fullAddressSpace>
          <range>0x00040000</range>
        </slave>
        <slave>
          <name>FIC32_REGION1</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x50000000</remapAddress>
          <fullAddressSpace>0x50000000 - 0x5FFFFFFF</fullAddressSpace>
          <range>0x10000000</range>
        </slave>
        <slave>
          <name>CACHE_BACKDOOR</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x40400000</remapAddress>
          <fullAddressSpace>0x40400000 - 0x4040FFFF</fullAddressSpace>
          <range>0x00010000</range>
        </slave>
        <slave>
          <name>USB</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x40043000</remapAddress>
          <fullAddressSpace>0x40043000 - 0x40043FFF</fullAddressSpace>
          <range>0x00001000</range>
        </slave>
        <slave>
          <name>SYSREG</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x40038000</remapAddress>
          <fullAddressSpace>0x40038000 - 0x40038FFF</fullAddressSpace>
          <range>0x00001000</range>
          <memoryMap>
            <name>RegisterMap</name>
            <addressBlock>
              <baseAddress>0x0</baseAddress>
              <range format="long">0x1000</range>
              <width format="long" id="width">32</width>
              <register>
                <name>ESRAM_CONFIG</name>
                <addressOffset>0x0</addressOffset>
                <absoluteAddress>0x40038000</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>F2_ESRAMSIZE</name>
                  <bitNumber>4:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_TESTESRAM1REMAP_SYNC</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_TESTREMAPENABLE_SYNC</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>COM_ESRAMFWREMAP</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_CONFIG</name>
                <addressOffset>0x4</addressOffset>
                <absoluteAddress>0x40038004</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>ENVM_SIX_CYCLE</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ENVM_PIPE_BYPASS</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_ENVMPOWEREDDOWN</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>COM_ENVMREMAPSIZE</name>
                  <bitNumber>4:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_REMAP_BASE</name>
                <addressOffset>0x8</addressOffset>
                <absoluteAddress>0x40038008</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>COM_ENVMREMAPBASE</name>
                  <bitNumber>19:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>ENVM_FAB_REMAP</name>
                <addressOffset>0xC</addressOffset>
                <absoluteAddress>0x4003800C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>COM_ENVMFABREMAPBASE</name>
                  <bitNumber>19:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FAB_PROT_SIZE</name>
                <addressOffset>0x10</addressOffset>
                <absoluteAddress>0x40038010</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>COM_PROTREGIONSIZE</name>
                  <bitNumber>4:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FAB_PROT_BASE</name>
                <addressOffset>0x14</addressOffset>
                <absoluteAddress>0x40038014</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>COM_PROTREGIONBASE</name>
                  <bitNumber>31:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>MATRIX_CONFIG</name>
                <addressOffset>0x18</addressOffset>
                <absoluteAddress>0x40038018</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>COM_WEIGHTEDMODE</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>COM_MASTERENABLE</name>
                  <bitNumber>2:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DSS_STATUS</name>
                <addressOffset>0x1C</addressOffset>
                <absoluteAddress>0x4003801C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>PLLLOCKLOSTINT</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PLLLOCKINT</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>COM_ERRORSTATUS</name>
                  <bitNumber>8:4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT3_3VINT</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT1_5VINT</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>WDOGTIMEOUTEVENT</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCMATCHEVENT</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CLR_DSS_STATUS</name>
                <addressOffset>0x20</addressOffset>
                <absoluteAddress>0x40038020</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>CLRPLLLOCKLOSTINT</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CLRPLLLOCKINT</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>COM_CLEARSTATUS</name>
                  <bitNumber>8:4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CLRBROWNOUT3_3VINT</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CLRBROWNOUT1_5VINT</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CLRWDOGTIMEOUTEVENT</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>CLRRTCMATCHEVENT</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FROM_CONFIG</name>
                <addressOffset>0x24</addressOffset>
                <absoluteAddress>0x40038024</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SYS_TOPT</name>
                  <bitNumber>3:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>IAP_CONFIG</name>
                <addressOffset>0x28</addressOffset>
                <absoluteAddress>0x40038028</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SYS_FCFG</name>
                  <bitNumber>2:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>SOFT_INTERRUPT</name>
                <addressOffset>0x2C</addressOffset>
                <absoluteAddress>0x4003802C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>SOFTINTERRUPT</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>SOFT_RESET</name>
                <addressOffset>0x30</addressOffset>
                <absoluteAddress>0x40038030</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>PADRESETENABLE</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>USERRESETACTIVE</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FPGA_SOFTRESET</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EXT_SOFTRESET</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>IAP_SOFTRESET</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>GPIO_SOFTRESET</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ACE_SOFTRESET</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C1_SOFTRESET</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>I2C0_SOFTRESET</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPI1_SOFTRESET</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>SPI0_SOFTRESET</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>UART1_SOFTRESET</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>UART0_SOFTRESET</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>TIMER_SOFTRESET</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PDMA_SOFTRESET</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>MAC_SOFTRESET</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EMC_SOFTRESET</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM1_SOFTRESET</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ESRAM0_SOFTRESET</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ENVM_SOFTRESET</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>DEVICE_STATUS</name>
                <addressOffset>0x34</addressOffset>
                <absoluteAddress>0x40038034</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>FPGAGOOD_SYNC</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FPGAPROGRAMMING_SYNC</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_PC_ACCESS_SYNC</name>
                  <bitNumber>4:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VCCIBGOOD_SYNC</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT3_3V_SYNCN</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BROWNOUT1_5V_SYNCN</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>SYSTICK_CONFIG</name>
                <addressOffset>0x38</addressOffset>
                <absoluteAddress>0x40038038</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>STCLK_DIVISOR</name>
                  <bitNumber>29:28</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>STCALIB</name>
                  <bitNumber>25:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>EM_MUX_CONFIG</name>
                <addressOffset>0x3C</addressOffset>
                <absoluteAddress>0x4003803C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>EM_SEL</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>EM_CONFIG_0</name>
                <addressOffset>0x40</addressOffset>
                <absoluteAddress>0x40038040</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>EM_CSFE0</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_WENBEN0</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RWPOL0</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PIPEWRN0</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PIPERDN0</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_IDD0</name>
                  <bitNumber>16:15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_WRITELAT0</name>
                  <bitNumber>14:11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RDLATREST0</name>
                  <bitNumber>10:7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RDLATFIRST0</name>
                  <bitNumber>6:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PORTSIZE0</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_MEMTYPE0</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>EM_CONFIG_1</name>
                <addressOffset>0x44</addressOffset>
                <absoluteAddress>0x40038044</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>EM_CSFE1</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_WENBEN1</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RWPOL1</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PIPEWRN1</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PIPERDN1</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_IDD1</name>
                  <bitNumber>16:15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_WRITELAT1</name>
                  <bitNumber>14:11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RDLATREST1</name>
                  <bitNumber>10:7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_RDLATFIRST1</name>
                  <bitNumber>6:3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_PORTSIZE1</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EM_MEMTYPE1</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CLK_CTRL</name>
                <addressOffset>0x48</addressOffset>
                <absoluteAddress>0x40038048</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>GLBDIVISOR</name>
                  <bitNumber>13:12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCIF_ACMDIVISOR</name>
                  <bitNumber>11:8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>ACLKDIVISOR</name>
                  <bitNumber>7:6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PCLK1DIVISOR</name>
                  <bitNumber>5:4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>PCLK0DIVISOR</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RMIICLKSEL</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CCC_DIV_CONFIG</name>
                <addressOffset>0x4C</addressOffset>
                <absoluteAddress>0x4003804C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>OCDIVRST</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIVHALF</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIV4</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIV3</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIV2</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIV1</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCDIV0</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIVRST</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIVHALF</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIV4</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIV3</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIV2</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIV1</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBDIV0</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIVRST</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIVHALF</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIV4</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIV3</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIV2</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIV1</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OADIV0</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CCC_MUX_CONFIG</name>
                <addressOffset>0x50</addressOffset>
                <absoluteAddress>0x40038050</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>MODE</name>
                  <bitNumber>31:30</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>EN</name>
                  <bitNumber>29</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>GLMUXCFG1</name>
                  <bitNumber>27</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>GLMUXCFG0</name>
                  <bitNumber>26</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>GLMUXSEL1</name>
                  <bitNumber>25</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>GLMUXSEL0</name>
                  <bitNumber>24</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BYPASS_PLL3</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCMUX2</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCMUX1</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OCMUX0</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DYNCSEL</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RXCSEL</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>STATCSEL</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BYPASS_PLL2</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBMUX2</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBMUX1</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OBMUX0</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DYNBSEL</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RXBSEL</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>STATBSEL</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BYPASS_PLL1</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OAMUX2</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OAMUX1</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>OAMUX0</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DYNASEL</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RXASEL</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>STATASEL</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CCC_PLL_CONFIG</name>
                <addressOffset>0x54</addressOffset>
                <absoluteAddress>0x40038054</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>POWERDOWN</name>
                  <bitNumber>31</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VCOSEL2</name>
                  <bitNumber>24</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VCOSEL1</name>
                  <bitNumber>23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VCOSEL0</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>XDLYSEL</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDLY4</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDLY3</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDLY2</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDLY1</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDLY0</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBSEL1</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBSEL0</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV6</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV5</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV4</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV3</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV2</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV1</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FBDIV0</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV6</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV5</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV4</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV3</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV2</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV1</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FINDIV0</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CCC_DLY_CONFIG</name>
                <addressOffset>0x58</addressOffset>
                <absoluteAddress>0x40038058</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DLYA14</name>
                  <bitNumber>24</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA13</name>
                  <bitNumber>23</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA12</name>
                  <bitNumber>22</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA11</name>
                  <bitNumber>21</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA10</name>
                  <bitNumber>20</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA04</name>
                  <bitNumber>19</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA03</name>
                  <bitNumber>18</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA02</name>
                  <bitNumber>17</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA01</name>
                  <bitNumber>16</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYA00</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCC4</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCC3</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCC2</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCC1</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCC0</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCB4</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCB3</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCB2</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCB1</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCB0</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCA4</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCA3</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCA2</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCA1</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DLYHCA0</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>CCC_STATUS</name>
                <addressOffset>0x5C</addressOffset>
                <absoluteAddress>0x4003805C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>PLLLOCK_SYNC</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>VTG_CTRL</name>
                <addressOffset>0x64</addressOffset>
                <absoluteAddress>0x40038064</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>BGPSMENABLE</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>VBATSELECT</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCIF_CLRPUBINT</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCIF_VRONENABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>RTCIF_FWVRON</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>FAB_IF</name>
                <addressOffset>0x6C</addressOffset>
                <absoluteAddress>0x4003806C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>FABCALIBFAIL</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FABCALIBSTART</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_LARGE_CT_XS</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB_APB32</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB_AHBIF</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>F2_AHBCAPABLE</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>FAB_AHB_BYPASS</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>APB_EXTN</name>
                <addressOffset>0x70</addressOffset>
                <absoluteAddress>0x40038070</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>APB16_XHOLD</name>
                  <bitNumber>15:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>LOOPBACK_CTRL</name>
                <addressOffset>0x74</addressOffset>
                <absoluteAddress>0x40038074</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DSS_EMACLOOPBACK</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPIOLOOPBACK</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_I2CLOOPBACK</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_SPILOOPBACK</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_UARTLOOPBACK</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>IO_BANK_CONFIG</name>
                <addressOffset>0x78</addressOffset>
                <absoluteAddress>0x40038078</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>BTWEST</name>
                  <bitNumber>3:2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>BTEAST</name>
                  <bitNumber>1:0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
              <register>
                <name>GPIN_SRC_SEL</name>
                <addressOffset>0x7C</addressOffset>
                <absoluteAddress>0x4003807C</absoluteAddress>
                <size>32</size>
                <access>R/W</access>
                <resetValue>0x0</resetValue>
                <field>
                  <name>DSS_GPINSOURCE[15]</name>
                  <bitNumber>15</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[14]</name>
                  <bitNumber>14</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[13]</name>
                  <bitNumber>13</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[12]</name>
                  <bitNumber>12</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[11]</name>
                  <bitNumber>11</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[10]</name>
                  <bitNumber>10</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[9]</name>
                  <bitNumber>9</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[8]</name>
                  <bitNumber>8</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[7]</name>
                  <bitNumber>7</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[6]</name>
                  <bitNumber>6</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[5]</name>
                  <bitNumber>5</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[4]</name>
                  <bitNumber>4</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[3]</name>
                  <bitNumber>3</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[2]</name>
                  <bitNumber>2</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[1]</name>
                  <bitNumber>1</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
                <field>
                  <name>DSS_GPINSOURCE[0]</name>
                  <bitNumber>0</bitNumber>
                  <access>R/W</access>
                  <description>
                  </description>
                </field>
              </register>
            </addressBlock>
          </memoryMap>
        </slave>
        <slave>
          <name>COMBLK</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x40016000</remapAddress>
          <fullAddressSpace>0x40016000 - 0x40016FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>HDMA</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x40014000</remapAddress>
          <fullAddressSpace>0x40014000 - 0x40014FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>GPIO</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x40013000</remapAddress>
          <fullAddressSpace>0x40013000 - 0x40013FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>H2FINTERRUPT</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x40006000</remapAddress>
          <fullAddressSpace>0x40006000 - 0x40006FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>TIMER</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x40004000</remapAddress>
          <fullAddressSpace>0x40004000 - 0x40004FFF</fullAddressSpace>
          <range>0x1000</range>
        </slave>
        <slave>
          <name>CoreAPB3_0</name>
          <fullPinName>MC_System:AMBA_SLAVE_0</fullPinName>
          <remapAddress>0x30000000</remapAddress>
          <fullAddressSpace>0x30000000 - 0x3000FFFF</fullAddressSpace>
          <range>0x00010000</range>
        </slave>
        <slave>
          <name>CoreAPB3_0</name>
          <fullPinName>MC_System:APBmslave1</fullPinName>
          <remapAddress>0x30010000</remapAddress>
          <fullAddressSpace>0x30010000 - 0x3001FFFF</fullAddressSpace>
          <range>0x00010000</range>
        </slave>
        <slave>
          <name>RECYCLED_ESRAM1</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x20012000</remapAddress>
          <fullAddressSpace>0x20012000 - 0x20013FFF</fullAddressSpace>
          <range>0x00002000</range>
        </slave>
        <slave>
          <name>RECYCLED_ESRAM0</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x20010000</remapAddress>
          <fullAddressSpace>0x20010000 - 0x20011FFF</fullAddressSpace>
          <range>0x00002000</range>
        </slave>
        <slave>
          <name>ESRAM1</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x20008000</remapAddress>
          <fullAddressSpace>0x20008000 - 0x2000FFFF</fullAddressSpace>
          <range>0x00008000</range>
        </slave>
        <slave>
          <name>ESRAM0</name>
          <fullPinName>
          </fullPinName>
          <remapAddress>0x00080000</remapAddress>
          <fullAddressSpace>0x00080000 - 0x00087FFF</fullAddressSpace>
          <range>0x00008000</range>
        </slave>
      </subsystem>
    </subsystems>
  </memorysystem>
</datasheet>
