sourcing E:\Microsemi\Libero_v11.6\Synopsys\fpga_J-2015.03M-3\lib\message_override.tcl


Starting:    E:\Microsemi\Libero_v11.6\Synopsys\fpga_J-2015.03M-3\bin64\mbin\synbatch.exe
Install:     E:\Microsemi\Libero_v11.6\Synopsys\fpga_J-2015.03M-3
Hostname:    W764-MURALIA
Date:        Fri Oct 09 11:53:00 2015
Version:     J-2015.03M-3

Arguments:   -product synplify_pro -licensetype synplifypro_actel -batch -log synplify.log MC_System_top_syn.tcl
ProductType: synplify_pro

License checkout: synplifypro_actel
License: synplifypro_actel from server denzil 
Licensed Vendor: actel
License Option: actel_oem

Running in Vendor Mode


auto_infer_blackbox is not supported in current product.

log file: "E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srr"

Running: synthesis in foreground



Running MC_System_top_syn|synthesis


Running: compile (Compile) on MC_System_top_syn|synthesis


Running: compile_flow (Compile Process) on MC_System_top_syn|synthesis


Running: compiler (Compile Input) on MC_System_top_syn|synthesis

Copied E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\synwork\MC_System_top_1_comp.srs to E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srs


compiler Completed
Return Code: 0
Run Time:0h:00m:07s


Running: multi_srs_gen (Multi-srs Generator) on MC_System_top_syn|synthesis

Copied E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\synwork\MC_System_top_1_comp.srs to E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\synwork\MC_System_top_1_s.srs


multi_srs_gen Completed
Return Code: 0
Run Time:0h:00m:00s

Copied E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\synwork\MC_System_top_1_mult.srs to E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srs

Complete: Compile Process on MC_System_top_syn|synthesis


Running: premap (Pre-mapping) on MC_System_top_syn|synthesis

Copied E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.sap to E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\synwork\MC_System_top_1_s.sap

Copied E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.fse to E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\synwork\MC_System_top_1_s.fse


premap Completed with warnings
Return Code: 1
Run Time:0h:00m:03s

Complete: Compile on MC_System_top_syn|synthesis


Running: map (Map) on MC_System_top_syn|synthesis


Running: fpga_mapper (Map & Optimize) on MC_System_top_syn|synthesis

Copied E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\synwork\MC_System_top_1_m.srm to E:\Solutions_Repo\Motor Control\Development\MCSK\SK2ABLSLST10_p\RTL\SK2ABLSLST10_5_1\synthesis\MC_System_top_1.srm


fpga_mapper Completed with warnings
Return Code: 1
Run Time:0h:00m:45s

Complete: Map on MC_System_top_syn|synthesis

Complete: Logic Synthesis on MC_System_top_syn|synthesis

TCL script complete: "MC_System_top_syn.tcl"

exit status=0

exit status=0

License checkin: synplifypro_actel

