<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<?xml-stylesheet href="rptstyle.xsl" type="text/xsl" ?>
<doc>
<title>Timing Report Max Delay Analysis
</title>
<text>SmartTime Version 11.8.2.4</text>
<text>Microsemi Corporation - Microsemi Libero Software Release Libero SoC v11.8 SP2 (Version 11.8.2.4)</text>
<text>Date: Wed Nov 29 13:51:42 2017
</text>
<table>
<header>
</header>
<row>
 <cell>Design</cell>
 <cell>MC_System_top</cell>
</row>
<row>
 <cell>Family</cell>
 <cell>SmartFusion2</cell>
</row>
<row>
 <cell>Die</cell>
 <cell>M2S010</cell>
</row>
<row>
 <cell>Package</cell>
 <cell>484 FBGA</cell>
</row>
<row>
 <cell>Temperature Range</cell>
 <cell>0 - 85 C</cell>
</row>
<row>
 <cell>Voltage Range</cell>
 <cell>1.14 - 1.26 V</cell>
</row>
<row>
 <cell>Speed Grade</cell>
 <cell>-1</cell>
</row>
<row>
 <cell>Design State</cell>
 <cell>Post-Layout</cell>
</row>
<row>
 <cell>Data source</cell>
 <cell>Production</cell>
</row>
<row>
 <cell>Min Operating Conditions</cell>
 <cell>WORST - 1.14 V - 85 C</cell>
</row>
<row>
 <cell>Max Operating Conditions</cell>
 <cell>BEST - 1.26 V - 0 C</cell>
</row>
<row>
 <cell>Scenario for Timing Analysis</cell>
 <cell>Primary</cell>
</row>
</table>
<text></text>
<section>
<name>Summary</name>
<table>
<header>
 <cell>Clock Domain</cell>
 <cell>Period (ns)</cell>
 <cell>Frequency (MHz)</cell>
 <cell>Required Period (ns)</cell>
 <cell>Required Frequency (MHz)</cell>
 <cell>External Setup (ns)</cell>
 <cell>External Hold (ns)</cell>
 <cell>Min Clock-To-Out (ns)</cell>
 <cell>Max Clock-To-Out (ns)</cell>
</header>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>5.432</cell>
 <cell>184.094</cell>
 <cell>10.000</cell>
 <cell>100.000</cell>
 <cell>2.705</cell>
 <cell>2.573</cell>
 <cell>6.640</cell>
 <cell>8.029</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>20.000</cell>
 <cell>50.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL1</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>10.000</cell>
 <cell>100.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
<text></text>
<table>
<header>
 <cell></cell>
 <cell>Min Delay (ns)</cell>
 <cell>Max Delay (ns)</cell>
</header>
<row>
 <cell>Input to Output</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[17]:EN</cell>
 <cell>4.993</cell>
 <cell>4.568</cell>
 <cell>8.094</cell>
 <cell>12.662</cell>
 <cell>0.202</cell>
 <cell>5.432</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[6]:EN</cell>
 <cell>4.993</cell>
 <cell>4.575</cell>
 <cell>8.094</cell>
 <cell>12.669</cell>
 <cell>0.202</cell>
 <cell>5.425</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/MSC_i_10/rl_out_prev_o[3]:CLK</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/s_ramp_out[15]:D</cell>
 <cell>5.178</cell>
 <cell>4.611</cell>
 <cell>8.068</cell>
 <cell>12.679</cell>
 <cell>0.201</cell>
 <cell>5.389</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/MSC_i_10/rl_out_prev_o[3]:CLK</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/s_ramp_out[10]:D</cell>
 <cell>5.057</cell>
 <cell>4.716</cell>
 <cell>7.947</cell>
 <cell>12.663</cell>
 <cell>0.201</cell>
 <cell>5.284</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/MSC_i_10/rl_out_prev_o[3]:CLK</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_9/s_ramp_out[16]:D</cell>
 <cell>5.066</cell>
 <cell>4.723</cell>
 <cell>7.956</cell>
 <cell>12.679</cell>
 <cell>0.201</cell>
 <cell>5.277</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[17]:EN</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>12.662</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.094</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>4.568</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.923</cell>
 <cell>1.923</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.137</cell>
 <cell>2.060</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.113</cell>
 <cell>2.173</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.195</cell>
 <cell>2.368</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>2.541</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.266</cell>
 <cell>2.807</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.144</cell>
 <cell>2.951</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/CLK_BASE_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.150</cell>
 <cell>3.101</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_ADDR[11]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:MSS_010_IP</cell>
 <cell>+</cell>
 <cell>0.886</cell>
 <cell>3.987</cell>
 <cell>8</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_0:B</cell>
 <cell>net</cell>
 <cell>MC_System_0_AMBA_SLAVE_0_PADDR[11]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.553</cell>
 <cell>4.540</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_0:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.102</cell>
 <cell>4.642</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_2:D</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_0_Z</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.211</cell>
 <cell>4.853</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.186</cell>
 <cell>5.039</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_1:D</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_3_2_Z</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.488</cell>
 <cell>5.527</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/rate_limit_slew_cnt_o_1_sqmuxa_0_a2_1:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.186</cell>
 <cell>5.713</cell>
 <cell>8</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o_1_sqmuxa_0_a2:A</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/N_1865</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.130</cell>
 <cell>6.843</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o_1_sqmuxa_0_a2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.051</cell>
 <cell>6.894</cell>
 <cell>18</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[17]:EN</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o_1_sqmuxa</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.200</cell>
 <cell>8.094</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.094</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.923</cell>
 <cell>11.923</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.137</cell>
 <cell>12.060</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.113</cell>
 <cell>12.173</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB6:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.191</cell>
 <cell>12.364</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB6:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>12.537</cell>
 <cell>91</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[17]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB6_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.327</cell>
 <cell>12.864</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/idq_pi_ki_o[17]:EN</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.202</cell>
 <cell>12.662</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>12.662</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>External Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>HC_i</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell>5.469</cell>
 <cell>2.372</cell>
 <cell>10.392</cell>
 <cell>12.764</cell>
 <cell>0.244</cell>
 <cell>2.705</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>HC_i</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[3]</cell>
 <cell>5.349</cell>
 <cell>2.392</cell>
 <cell>10.272</cell>
 <cell>12.664</cell>
 <cell>0.344</cell>
 <cell>2.685</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>HC_i</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[1]</cell>
 <cell>5.454</cell>
 <cell>2.447</cell>
 <cell>10.377</cell>
 <cell>12.824</cell>
 <cell>0.184</cell>
 <cell>2.630</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>HB_i</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell>5.322</cell>
 <cell>2.519</cell>
 <cell>10.245</cell>
 <cell>12.764</cell>
 <cell>0.244</cell>
 <cell>2.558</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>HC_i</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[12]</cell>
 <cell>5.422</cell>
 <cell>2.521</cell>
 <cell>10.345</cell>
 <cell>12.866</cell>
 <cell>0.142</cell>
 <cell>2.556</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: HC_i</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>12.764</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>10.392</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>2.372</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.923</cell>
 <cell>1.923</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>HC_i</cell>
 <cell>Input Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.000</cell>
 <cell>4.923</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>HC_i_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>HC_i</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>4.923</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>HC_i_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>0.917</cell>
 <cell>5.840</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>HC_i_ibuf/U0/U_IOINFF:A</cell>
 <cell>net</cell>
 <cell>HC_i_ibuf/U0/YIN1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.283</cell>
 <cell>6.123</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>HC_i_ibuf/U0/U_IOINFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOINFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.108</cell>
 <cell>6.231</cell>
 <cell>6</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_15/s_angle_out_raw_12_0_.m4:A</cell>
 <cell>net</cell>
 <cell>HC_i_c</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.066</cell>
 <cell>7.297</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_15/s_angle_out_raw_12_0_.m4:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.153</cell>
 <cell>7.450</cell>
 <cell>14</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_15_i_m3_0_0_wmux[9]:C</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/HALL_INTERFACE_1_angle_out_raw_o[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.834</cell>
 <cell>8.284</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_15_i_m3_0_0_wmux[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.139</cell>
 <cell>8.423</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_15_i_m3_0_wmux_0[9]:A</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_15_i_m3_0_0_y0[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.063</cell>
 <cell>8.486</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_15_i_m3_0_wmux_0[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.051</cell>
 <cell>8.537</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_9_a2[9]:B</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/N_740</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.487</cell>
 <cell>9.024</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/apb3_hall_if_0/prdata_o_1_9_a2[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.051</cell>
 <cell>9.075</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CoreAPB3_0/u_mux_p_to_b3/PRDATA[9]:D</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0_N_1760</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.157</cell>
 <cell>9.232</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CoreAPB3_0/u_mux_p_to_b3/PRDATA[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.110</cell>
 <cell>9.342</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_TMP_0_FIC_0_APB_MASTER_PRDATA[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.736</cell>
 <cell>10.078</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.144</cell>
 <cell>10.222</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/F_HM0_RDATA_net[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.170</cell>
 <cell>10.392</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.392</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.866</cell>
 <cell>11.866</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.132</cell>
 <cell>11.998</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.110</cell>
 <cell>12.108</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.189</cell>
 <cell>12.297</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.168</cell>
 <cell>12.465</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.258</cell>
 <cell>12.723</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.140</cell>
 <cell>12.863</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_BASE</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/CLK_BASE_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.145</cell>
 <cell>13.008</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/MC_System_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_010_IP:F_HM0_RDATA[9]</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:MSS_010_IP</cell>
 <cell>-</cell>
 <cell>0.244</cell>
 <cell>12.764</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>12.764</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Clock to Output</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Clock to Out (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[8]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>5.159</cell>
 <cell>3.594</cell>
 <cell>8.029</cell>
 <cell>11.623</cell>
 <cell>8.029</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[0]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>5.135</cell>
 <cell>3.611</cell>
 <cell>8.012</cell>
 <cell>11.623</cell>
 <cell>8.012</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[7]:CLK</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell>4.990</cell>
 <cell>3.757</cell>
 <cell>7.866</cell>
 <cell>11.623</cell>
 <cell>7.866</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[8]:CLK</cell>
 <cell>A0_PWM_UL_O</cell>
 <cell>3.782</cell>
 <cell>4.971</cell>
 <cell>6.652</cell>
 <cell>11.623</cell>
 <cell>6.652</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[0]:CLK</cell>
 <cell>A0_PWM_UL_O</cell>
 <cell>3.758</cell>
 <cell>4.988</cell>
 <cell>6.635</cell>
 <cell>11.623</cell>
 <cell>6.635</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: BLDC_HALL_Axis_0/MSC_i_11/s_state[8]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: A0_RUNNING_LED</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>11.623</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.029</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>3.594</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.923</cell>
 <cell>1.923</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.137</cell>
 <cell>2.060</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST:YNn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GB</cell>
 <cell>+</cell>
 <cell>0.113</cell>
 <cell>2.173</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB10:An</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_YNn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.187</cell>
 <cell>2.360</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB10:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>2.533</cell>
 <cell>49</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[8]:CLK</cell>
 <cell>net</cell>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/GL0_INST/U0_RGB1_RGB10_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.337</cell>
 <cell>2.870</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/s_state[8]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.060</cell>
 <cell>2.930</cell>
 <cell>6</cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/ADC_START_PROC.un101_s_state_i_a2_0_a3:B</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/MSC_net_83</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.310</cell>
 <cell>3.240</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/ADC_START_PROC.un101_s_state_i_a2_0_a3:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.069</cell>
 <cell>3.309</cell>
 <cell>3</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/ADC_START_PROC.un103_s_state_i_a3_0_a2:A</cell>
 <cell>net</cell>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/MSC_net_285</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.072</cell>
 <cell>3.381</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BLDC_HALL_Axis_0/MSC_i_11/ADC_START_PROC.un103_s_state_i_a3_0_a2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.060</cell>
 <cell>3.441</cell>
 <cell>32</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOOUTFF:A</cell>
 <cell>net</cell>
 <cell>A0_PWM_UL_O_c</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.144</cell>
 <cell>5.585</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOOUTFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOOUTFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.226</cell>
 <cell>5.811</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOPAD:D</cell>
 <cell>net</cell>
 <cell>A0_RUNNING_LED_obuf/U0/DOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.481</cell>
 <cell>6.292</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED_obuf/U0/U_IOPAD:PAD</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_TRI</cell>
 <cell>+</cell>
 <cell>1.737</cell>
 <cell>8.029</cell>
 <cell>0</cell>
 <cell>f</cell>
</row>
<row>
 <cell>A0_RUNNING_LED</cell>
 <cell>net</cell>
 <cell>A0_RUNNING_LED</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.029</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.029</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.923</cell>
 <cell>11.923</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>A0_RUNNING_LED</cell>
 <cell>Output Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell>0.300</cell>
 <cell>11.623</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>11.623</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</name>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain MC_System_0/MC_System_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL1</name>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set Pin to Pin</name>
<section>
<name>SET Input to Output</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set User Sets</name>
</section>
</doc>
