--a=================================================================================================
-- File Name                           : adc_scaling.vhd

-- Description                         : This module computes the ADC offset and scales input 
--                                       values to the range required for control


-- Targeted device                     : Microsemi-SoC
-- Author                              : India Solutions Team
--
-- SVN Revision Information            :
-- SVN $Revision                       :
-- SVN $Date                           :
--
-- COPYRIGHT 2016 BY MICROSEMI
-- THE INFORMATION CONTAINED IN THIS DOCUMENT IS SUBJECT TO LICENSING RESTRICTIONS FROM MICROSEMI
-- CORP. IF YOU ARE NOT IN POSSESSION OF WRITTEN AUTHORIZATION FROM MICROSEMI FOR USE OF THIS
-- FILE, THEN THE FILE SHOULD BE IMMEDIATELY DESTROYED AND NO BACK-UP OF THE FILE SHOULD BE MADE.
--
--=================================================================================================

--=================================================================================================
-- Libraries
--=================================================================================================
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_SIGNED.ALL;

--=================================================================================================
-- adc_scaling entity declaration
--=================================================================================================
ENTITY ADC_SCALING IS
GENERIC(
-- Generic list
    -- Specifies whether adc_scaling is used for synthesis or simulation
    g_DEBUG                            : INTEGER := 0;

    -- Specifies if incoming data should be treated as signed or unsigned
    g_SIGNED                           : INTEGER := 1;
    
    -- Specifies the width of ADC current output ports
	g_ADC_RESULTS_WIDTH               : INTEGER := 18;

    -- Specifies the number of multi-cycle path delays introduced
    g_NO_MCYCLE_PATH                   : INTEGER RANGE 0 TO 4 := 2	
);
PORT (
-- Port list
	-- system reset
    reset_i                            : IN  STD_LOGIC;    

    -- system clock
    sys_clk_i                          : IN  STD_LOGIC;

    -- specifies that the raw current values are available from ADC
	adc_results_rdy_i                  : IN STD_LOGIC;
    
    -- Control input specifies the ADC scale value for Clarke input computation
    adc_scale_val_i                    : IN  STD_LOGIC_VECTOR(17 DOWNTO 0);
    
    -- Data input specifies the raw value of current from channel 0
    adc_result_ch0_i                   : IN STD_LOGIC_VECTOR(g_ADC_RESULTS_WIDTH-1 DOWNTO 0);

    -- Data input specifies the raw value of current from channel 1
    adc_result_ch1_i	               : IN STD_LOGIC_VECTOR(g_ADC_RESULTS_WIDTH-1 DOWNTO 0);

    -- Threshold value for fault detection
    fault_threshold_i                  : IN STD_LOGIC_VECTOR(17 DOWNTO 0);

    -- ADC scaling computation completed
    done_o                             : OUT STD_LOGIC;

    -- offset calibration done
	calib_done_o                       : OUT STD_LOGIC;

    -- Over current fault detected
	over_current_fault_o               : OUT STD_LOGIC;
    
    -- Data output specifies the A-phase current output value for Clarke computation
    ia_adc_o                    	   : OUT STD_LOGIC_VECTOR(17 DOWNTO 0);
    
    -- Data output specifies the B-phase current output value for Clarke computation
    ib_adc_o                    	   : OUT STD_LOGIC_VECTOR(17 DOWNTO 0)
);
END adc_scaling;
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