`

    #Build: Synplify Pro I-2013.09M-SP1 , Build 034R, Jan 17 2014
    #install: C:\Microsemi\Libero_v11.3\Synopsys\synplify_I201309MSP1
    #OS: Windows 7 6.1
    #Hostname: W764-PINNINTIA

    #Implementation: synthesis

    $ Start of Compile
    #Wed Oct 08 12:15:12 2014

    Synopsys VHDL Compiler, version comp201309rcp1, Build 078R, built Jan 14 2014
    @N: :  | Running in 64-bit mode
    Copyright (C) 1994-2013 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use or distribution of the software is strictly prohibited.

    @N:CD720 : std.vhd(123) | Setting time resolution to ns
    @N: : msmc_fab_toplevel_st.vhd(58) | Top entity is set to MSMC_Fab_Toplevel_st.
    @W:CD134 : pi_controller.vhd(155) | No such identifier, output_y_o, of proper type in current declarative region
    @W:CD134 : pi_controller.vhd(156) | No such identifier, acc_out_o, of proper type in current declarative region
    VHDL syntax check successful!
    @N:CD630 : msmc_fab_toplevel_st.vhd(58) | Synthesizing work.msmc_fab_toplevel_st.msmc_fab_toplevel_st
    @W:CD285 : msmc_fab_toplevel_st.vhd(1922) | Port map width mismatch (15 => 18) on port iq_pi_ki_scale_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1921) | Port map width mismatch (15 => 18) on port iq_pi_kp_scale_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1920) | Port map width mismatch (15 => 18) on port iq_pi_ymin_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1919) | Port map width mismatch (15 => 18) on port iq_pi_ymax_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1918) | Port map width mismatch (15 => 18) on port iq_pi_ki_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1917) | Port map width mismatch (15 => 18) on port iq_pi_kp_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1911) | Port map width mismatch (15 => 18) on port iq_pi_act_input_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1905) | Port map width mismatch (15 => 18) on port id_pi_ki_scale_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1904) | Port map width mismatch (15 => 18) on port id_pi_kp_scale_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1903) | Port map width mismatch (15 => 18) on port id_pi_ymin_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1902) | Port map width mismatch (15 => 18) on port id_pi_ymax_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1901) | Port map width mismatch (15 => 18) on port id_pi_ki_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1900) | Port map width mismatch (15 => 18) on port id_pi_kp_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1895) | Port map width mismatch (15 => 18) on port id_pi_act_input_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1894) | Port map width mismatch (15 => 18) on port id_pi_ref_input_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(1877) | Port map width mismatch (15 => 18) on port iq_init_i of component speed_id_iq_pi
    @W:CD285 : msmc_fab_toplevel_st.vhd(2312) | Port map width mismatch (16 => 18) on port PERIOD of component Core3PhasePWM_st
    @W:CD638 : msmc_fab_toplevel_st.vhd(259) | Signal ramp_start_count_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(260) | Signal pi_start_pul is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(261) | Signal pi_start_dly is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(262) | Signal counter_pi_start is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(263) | Signal waddr is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(264) | Signal wdata_in is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(265) | Signal wen is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(267) | Signal start_clarke_from_apb_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(271) | Signal ialpha_clarke_output_tmp is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(274) | Signal ibeta_clarke_output_tmp is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(281) | Signal i_alpha_park_input_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(282) | Signal i_beta_park_input_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(293) | Signal start_ipark_s_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(297) | Signal start_iclarke_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(298) | Signal valpha_iclarke_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(299) | Signal vbeta_iclarke_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(318) | Signal va_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(319) | Signal vb_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(320) | Signal vc_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(321) | Signal v_mag_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(324) | Signal a0_va3h_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(325) | Signal a0_vb3h_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(326) | Signal a0_vc3h_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(336) | Signal ramp_ref_max_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(337) | Signal ramp_ref_min_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(338) | Signal ramp_set_ref_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(339) | Signal ramp_slew_count_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(340) | Signal ramp_ref_value_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(341) | Signal ramp_ref_value_frm_ramp_profile_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(343) | Signal ramp_done_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(344) | Signal ramp_done_s_dly is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(345) | Signal ramp_done_pul is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(347) | Signal loop_sel_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(348) | Signal satrt_open_lp_angle_inc_sync is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(349) | Signal satrt_open_lp_angle_inc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(350) | Signal svpwm_done_s_sync is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(354) | Signal a0_svpwm_done_s_sync is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(355) | Signal a0_svpwm_done_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(357) | Signal a0_sub_mvs_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(360) | Signal a0_add_c_mvs_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(363) | Signal a0_mvs_done_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(364) | Signal a0_pwma_r is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(365) | Signal a0_pwmb_r is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(366) | Signal a0_pwmc_r is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(368) | Signal adc_control_reg_frm_apb_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(370) | Signal adc_control_reg_frm_adc_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(372) | Signal adc_control_reg_update_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(374) | Signal adc_result_ch0_frm_adc_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(375) | Signal adc_result_ch1_frm_adc_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(376) | Signal adc_result_ch2_frm_adc_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(377) | Signal adc_result_ch3_frm_adc_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(378) | Signal adc_result_ch4_frm_adc_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(379) | Signal adc_result_ch5_frm_adc_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(388) | Signal pwm_update_period_prescale_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(390) | Signal pwm_update_dead_time_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(392) | Signal pwm_update_delay_time_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(394) | Signal pwm_update_compare_match_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(396) | Signal pwm_load_config_reg_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(398) | Signal pwm_period_frm_apb_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(399) | Signal pwm_prescale_frm_apb_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(400) | Signal pwm_dead_time_frm_apb_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(401) | Signal pwm_delay_frm_apb_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(402) | Signal pwm_config_reg_frm_apb_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(403) | Signal pwm_period_to_pwm_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(405) | Signal pwm_compare_match_a_to_pwm_i is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(406) | Signal pwm_compare_match_b_to_pwm_i is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(407) | Signal pwm_compare_match_c_to_pwm_i is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(422) | Signal a0_pwm_compare_match_c_to_pwm_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(423) | Signal sin_cos_start_angl_est_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(426) | Signal sin_cos_avalbl_angl_est_s_r is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(428) | Signal sine_angl_est_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(429) | Signal cos_angl_est_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(432) | Signal sine_angl_est_sgnext_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(433) | Signal cos_angl_est_sgnext_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(435) | Signal start_angl_est_sync is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(436) | Signal direction_angl_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(437) | Signal busy_angl_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(438) | Signal done_angl_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(439) | Signal i_alpha_angl_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(440) | Signal i_beta_angl_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(441) | Signal v_alpha_angl_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(442) | Signal v_beta_angl_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(443) | Signal angle_pi_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(444) | Signal i_alpha_bar_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(445) | Signal i_beta_bar_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(446) | Signal e_alpha_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(447) | Signal e_beta_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(448) | Signal start_angl_frm_apb is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(449) | Signal angle_i_max is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(450) | Signal angle_i_min is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(451) | Signal angle_e_max is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(452) | Signal angle_e_min is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(458) | Signal angle_pi_ymax is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(459) | Signal angle_pi_ymin is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(474) | Signal speed_ref_in_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(475) | Signal a0_speed_ref_in_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(476) | Signal a1_speed_ref_in_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(477) | Signal a2_speed_ref_in_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(478) | Signal a3_speed_ref_in_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(479) | Signal a4_speed_ref_in_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(480) | Signal a5_speed_ref_in_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(482) | Signal speed_pi_start is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(484) | Signal speed_pi_busy_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(485) | Signal speed_pi_done_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(486) | Signal speed_pi_output_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(487) | Signal id_ref_in_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(494) | Signal id_pi_output_s_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(497) | Signal iq_pi_start is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(503) | Signal iq_pi_output_s_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(505) | Signal sin_cos_start_i is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(506) | Signal park_done_s_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(507) | Signal iq_pi_done_s_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(508) | Signal speed_pi_done_s_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(509) | Signal park_done_s_dtc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(510) | Signal iq_pi_done_s_dtc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(511) | Signal speed_pi_done_s_dtc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(512) | Signal ipark_done_s_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(513) | Signal id_pi_done_s_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(514) | Signal clarke_done_s_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(515) | Signal ipark_done_s_dtc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(516) | Signal id_pi_done_s_dtc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(517) | Signal clarke_done_s_dtc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(518) | Signal iclarke_done_s_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(519) | Signal iclarke_done_s_dtc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(520) | Signal done_angl_o_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(522) | Signal done_speed_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(523) | Signal done_speed_o_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(524) | Signal done_speed_o_dtc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(525) | Signal sin_cos_done_angl_est_s_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(526) | Signal sin_cos_done_angl_est_s_dtc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(527) | Signal id_pi_start_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(528) | Signal angle_apb is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(529) | Signal counter is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(530) | Signal ag_done_o_dtc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(532) | Signal wdata_in_angle is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(533) | Signal wen_angle is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(534) | Signal angl_pul is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(535) | Signal waddr_angle is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(536) | Signal counter_angle is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(537) | Signal en_speedpi_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(540) | Signal cl_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(541) | Signal theta_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(542) | Signal ol_theta_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(543) | Signal en_speedpi_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(544) | Signal en_idqpi_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(545) | Signal init_speedpi_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(546) | Signal init_iqpi_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(547) | Signal init_theta_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(548) | Signal theta_scl_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(549) | Signal mas_en_s_sqmng is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(550) | Signal mas_done_s_sqmng is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(551) | Signal sub_s_sqmng is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(552) | Signal mult_out_s_sqmng is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(553) | Signal mul_a_s_sqmng is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(554) | Signal mul_b_s_sqmng is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(555) | Signal add_c_s_sqmng is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(556) | Signal mas_en_s_est is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(557) | Signal mas_done_s_est is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(558) | Signal sub_s_est is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(559) | Signal mult_out_s_est is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(560) | Signal mul_a_s_est is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(561) | Signal mul_b_s_est is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(562) | Signal add_c_s_est is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(563) | Signal sub_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(565) | Signal ramp_start_pul is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(566) | Signal ramp_start_dly is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(579) | Signal omega_filter_out_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(580) | Signal omega_filter_out is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(581) | Signal omega_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(582) | Signal acc_out_o is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(583) | Signal pi_done_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(584) | Signal pi_busy_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(585) | Signal pi_ref_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(586) | Signal pi_act_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(588) | Signal pll_theta_done_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(589) | Signal pll_theta_done_dly is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(591) | Signal pll_theta_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(592) | Signal pll_theta_scl_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(593) | Signal pll_theta_tmp is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(594) | Signal e_beta_filter_out_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(596) | Signal e_beta_filter_out is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(597) | Signal e_alpha_filter_out_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(598) | Signal e_alpha_filter_out is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(602) | Signal est_done_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(603) | Signal done_est_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(604) | Signal add_c_i is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(605) | Signal pi_done_i_d is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(606) | Signal pi_done_i_dtc is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(608) | Signal done_omega_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(609) | Signal done_ealphs_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(610) | Signal done_ealphs_dly is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(612) | Signal done_ebeta_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(613) | Signal pll_theta_start_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(614) | Signal reset_ramp_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(616) | Signal soft_stop_ack_s is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(628) | Signal init_pll_theta is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(629) | Signal rate_limit_ref_in_tmp_ext is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(630) | Signal rate_limit_slew_cnt_ext is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(631) | Signal rate_limit_rate_cnt_ext is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(632) | Signal ramp_ref_value_buff_ext is undriven
    @W:CD638 : msmc_fab_toplevel_st.vhd(637) | Signal reset_ramp_tmp_s is undriven
    @N:CD630 : edge_detection_logic_st.vhd(32) | Synthesizing work.edge_detection_logic_st.edge_detection_logic_st
    @W:CG296 : edge_detection_logic_st.vhd(200) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : edge_detection_logic_st.vhd(202) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : edge_detection_logic_st.vhd(225) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : edge_detection_logic_st.vhd(227) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : edge_detection_logic_st.vhd(246) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : edge_detection_logic_st.vhd(248) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : edge_detection_logic_st.vhd(268) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : edge_detection_logic_st.vhd(270) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : edge_detection_logic_st.vhd(290) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : edge_detection_logic_st.vhd(292) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : edge_detection_logic_st.vhd(311) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : edge_detection_logic_st.vhd(313) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : edge_detection_logic_st.vhd(321) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : edge_detection_logic_st.vhd(323) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : edge_detection_logic_st.vhd(335) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : edge_detection_logic_st.vhd(337) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : edge_detection_logic_st.vhd(346) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : edge_detection_logic_st.vhd(348) | Referenced variable s_reset_state is not in sensitivity list
    @W:CD638 : edge_detection_logic_st.vhd(119) | Signal speed_pi_done_s is undriven
    Post processing for work.edge_detection_logic_st.edge_detection_logic_st
    @W:CL169 : edge_detection_logic_st.vhd(202) | Pruning register speed_pi_done_dly_2
    @N:CL177 : edge_detection_logic_st.vhd(227) | Sharing sequential element iq_pi_start_o.
    @N:CD630 : accumulator_st.vhd(31) | Synthesizing work.accumulator_st.accumulator_st
    @W:CG296 : accumulator_st.vhd(138) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(140) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(154) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(156) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(168) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(170) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(177) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(179) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(190) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(192) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(203) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(205) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(215) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(217) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(226) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(228) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(237) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(239) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(249) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(251) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(261) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(263) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(272) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(274) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : accumulator_st.vhd(284) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : accumulator_st.vhd(286) | Referenced variable s_reset_state is not in sensitivity list
    Post processing for work.accumulator_st.accumulator_st
    @N:CD630 : mas.vhd(32) | Synthesizing work.mas.mas
    @W:CG296 : mas.vhd(117) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : mas.vhd(119) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : mas.vhd(149) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : mas.vhd(151) | Referenced variable s_reset_state is not in sensitivity list
    @W:CD796 : mas.vhd(62) | Bit 2 of signal mas_done_sync is undriven. Possible simulation mismatch as initial value or default value is ignored. To avoid simulation mismatches, explicitly drive this bit.
    Post processing for work.mas.mas
    @N:CD630 : cpipic.vhd(39) | Synthesizing work.cpipic.cpipic
    @W:CD638 : cpipic.vhd(333) | Signal start_clarke_i_sync is undriven
    @W:CD638 : cpipic.vhd(334) | Signal start_clarke_i_sync1 is undriven
    @W:CD638 : cpipic.vhd(335) | Signal start_park_i_sync is undriven
    @W:CD638 : cpipic.vhd(336) | Signal start_park_i_sync1 is undriven
    @W:CD638 : cpipic.vhd(337) | Signal start_ipark_i_sync is undriven
    @W:CD638 : cpipic.vhd(338) | Signal start_ipark_i_sync1 is undriven
    @W:CD638 : cpipic.vhd(339) | Signal start_iclarke_i_sync is undriven
    @W:CD638 : cpipic.vhd(340) | Signal start_iclarke_i_sync1 is undriven
    @N:CD630 : mas_scheduler.vhd(37) | Synthesizing work.mas_scheduler.mas_scheduler
    @W:CG296 : mas_scheduler.vhd(121) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : mas_scheduler.vhd(123) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : mas_scheduler.vhd(139) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : mas_scheduler.vhd(141) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : mas_scheduler.vhd(156) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : mas_scheduler.vhd(158) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : mas_scheduler.vhd(175) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : mas_scheduler.vhd(177) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : mas_scheduler.vhd(198) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : mas_scheduler.vhd(200) | Referenced variable s_reset_state is not in sensitivity list
    Post processing for work.mas_scheduler.mas_scheduler
    @N:CD630 : inverse_clarke.vhd(30) | Synthesizing work.inverse_clarke.inverse_clarke
    @N:CD231 : inverse_clarke.vhd(80) | Using onehot encoding for type iclarke_trnsf_states (idle="100000")
    @W:CG296 : inverse_clarke.vhd(140) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : inverse_clarke.vhd(142) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : inverse_clarke.vhd(157) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : inverse_clarke.vhd(159) | Referenced variable s_reset_state is not in sensitivity list
    Post processing for work.inverse_clarke.inverse_clarke
    @N:CD630 : inverse_park.vhd(30) | Synthesizing work.inverse_park.inverse_park
    @N:CD231 : inverse_park.vhd(82) | Using onehot encoding for type ipark_trnsf_states (idle="100000")
    @W:CG296 : inverse_park.vhd(119) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : inverse_park.vhd(121) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : inverse_park.vhd(136) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : inverse_park.vhd(138) | Referenced variable s_reset_state is not in sensitivity list
    Post processing for work.inverse_park.inverse_park
    @N:CD630 : park.vhd(31) | Synthesizing work.park.park
    @N:CD231 : park.vhd(73) | Using onehot encoding for type park_trnsf_states (idle="100000")
    @W:CG296 : park.vhd(110) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : park.vhd(112) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : park.vhd(127) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : park.vhd(129) | Referenced variable s_reset_state is not in sensitivity list
    Post processing for work.park.park
    @N:CD630 : clarke.vhd(30) | Synthesizing work.clarke.clarke
    @N:CD233 : clarke.vhd(79) | Using sequential encoding for type clarke_trnsf_states
    @W:CG296 : clarke.vhd(126) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : clarke.vhd(128) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : clarke.vhd(143) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : clarke.vhd(145) | Referenced variable s_reset_state is not in sensitivity list
    Post processing for work.clarke.clarke
    @A:CL282 : clarke.vhd(145) | Feedback mux created for signal mul_b_to_mas_o[17:0] -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area.
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(1) is always 1, optimizing ...
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(2) is always 1, optimizing ...
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(3) is always 1, optimizing ...
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(5) is always 0, optimizing ...
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(8) is always 0, optimizing ...
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(11) is always 0, optimizing ...
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(12) is always 0, optimizing ...
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(13) is always 0, optimizing ...
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(14) is always 0, optimizing ...
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(15) is always 0, optimizing ...
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(16) is always 0, optimizing ...
    @W:CL189 : clarke.vhd(145) | Register bit mul_b_to_mas_o(17) is always 0, optimizing ...
    @W:CL279 : clarke.vhd(145) | Pruning register bits 17 to 11 of mul_b_to_mas_o(17 downto 0)
    @W:CL260 : clarke.vhd(145) | Pruning register bit 8 of mul_b_to_mas_o(17 downto 0)
    @W:CL260 : clarke.vhd(145) | Pruning register bit 5 of mul_b_to_mas_o(17 downto 0)
    @W:CL279 : clarke.vhd(145) | Pruning register bits 3 to 1 of mul_b_to_mas_o(17 downto 0)
    Post processing for work.cpipic.cpipic
    @N:CD630 : adc_measurements.vhd(31) | Synthesizing work.adc_measurements.adc_measurements
    @N:CD231 : adc_measurements.vhd(117) | Using onehot encoding for type adc_op_state (idle="1000000000")
    @W:CG296 : adc_measurements.vhd(228) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(230) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(250) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(252) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(270) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(272) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(293) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(295) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(338) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(340) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(404) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(406) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(439) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(441) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(505) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(507) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(526) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(528) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(565) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(567) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(623) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(625) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(650) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(652) | Referenced variable s_reset_state is not in sensitivity list
    @W:CD434 : adc_measurements.vhd(665) | Signal s_r_auto_scan in the sensitivity list is not used in the process
    @W:CD434 : adc_measurements.vhd(665) | Signal s_r_dual_trig in the sensitivity list is not used in the process
    @W:CD434 : adc_measurements.vhd(665) | Signal adc_sdi_i in the sensitivity list is not used in the process
    @W:CG296 : adc_measurements.vhd(665) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(801) | Referenced variable s_channel_cnt is not in sensitivity list
    @W:CG290 : adc_measurements.vhd(786) | Referenced variable s_r_sck_count is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(849) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(851) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(872) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(874) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : adc_measurements.vhd(1051) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : adc_measurements.vhd(1053) | Referenced variable s_reset_state is not in sensitivity list
    @W:CD638 : adc_measurements.vhd(174) | Signal s_control_data_1 is undriven
    @W:CD638 : adc_measurements.vhd(175) | Signal s_control_data_2 is undriven
    @W:CD638 : adc_measurements.vhd(176) | Signal s_control_data_3 is undriven
    @W:CD638 : adc_measurements.vhd(177) | Signal s_control_data_4 is undriven
    @W:CD638 : adc_measurements.vhd(180) | Signal sdo is undriven
    Post processing for work.adc_measurements.adc_measurements
    @W:CL240 : adc_measurements.vhd(94) | adc_result_ch5_o is not assigned a value (floating) -- simulation mismatch possible.
    @W:CL240 : adc_measurements.vhd(92) | adc_result_ch4_o is not assigned a value (floating) -- simulation mismatch possible.
    @W:CL169 : adc_measurements.vhd(874) | Pruning register s_r_adc_result_ch5_2(11 downto 0)
    @W:CL169 : adc_measurements.vhd(874) | Pruning register s_r_adc_result_ch4_2(11 downto 0)
    @W:CL169 : adc_measurements.vhd(874) | Pruning register s_r_adc_result_ch3_2(11 downto 0)
    @W:CL169 : adc_measurements.vhd(874) | Pruning register s_r_adc_result_ch2_2(11 downto 0)
    @W:CL169 : adc_measurements.vhd(874) | Pruning register s_r_adc_result_ch1_2(11 downto 0)
    @W:CL169 : adc_measurements.vhd(874) | Pruning register s_r_adc_result_ch0_2(11 downto 0)
    @W:CL169 : adc_measurements.vhd(874) | Pruning register adc_results_rdy_o_1
    @W:CL169 : adc_measurements.vhd(528) | Pruning register s_r_dual_trig_done_2
    @W:CL169 : adc_measurements.vhd(295) | Pruning register s_slave_select_cnt_5(4 downto 0)
    @W:CL169 : adc_measurements.vhd(272) | Pruning register s_slave_select_dly_2
    @A:CL282 : adc_measurements.vhd(874) | Feedback mux created for signal ADC_RESULTS_RDY_s -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area.
    @A:CL282 : adc_measurements.vhd(567) | Feedback mux created for signal adc_sdi_s -- possible set/reset assignment for signal missing. Specifying a reset value will improve timing and area.
    @N:CL177 : adc_measurements.vhd(406) | Sharing sequential element s_r_sck_sync.
    @W:CL190 : adc_measurements.vhd(230) | Optimizing register bit s_r_sck_max_count(1) to a constant 0
    @W:CL190 : adc_measurements.vhd(230) | Optimizing register bit s_r_sck_max_count(2) to a constant 0
    @W:CL190 : adc_measurements.vhd(230) | Optimizing register bit s_r_sck_max_count(3) to a constant 0
    @W:CL190 : adc_measurements.vhd(230) | Optimizing register bit s_r_sck_max_count(5) to a constant 0
    @W:CL190 : adc_measurements.vhd(230) | Optimizing register bit s_r_sck_max_count(6) to a constant 0
    @W:CL279 : adc_measurements.vhd(230) | Pruning register bits 6 to 5 of s_r_sck_max_count(6 downto 0)
    @W:CL279 : adc_measurements.vhd(230) | Pruning register bits 3 to 1 of s_r_sck_max_count(6 downto 0)
    @N:CD630 : core3phasepwm_st.vhd(29) | Synthesizing work.core3phasepwm_st.core3phasepwm_st
    @E:CD145 : core3phasepwm_st.vhd(51) | Formal, "period", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(2290) | Formal, "period", and actual agree on type but not on size
    @N:CD630 : apb3_if_st.vhd(36) | Synthesizing work.apb3_if_st.apb3_if_st
    @W:CG296 : apb3_if_st.vhd(303) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : apb3_if_st.vhd(305) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : apb3_if_st.vhd(490) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : apb3_if_st.vhd(500) | Referenced variable ib_clarke_in_i is not in sensitivity list
    @W:CG290 : apb3_if_st.vhd(496) | Referenced variable ia_clarke_in_i is not in sensitivity list
    @W:CG290 : apb3_if_st.vhd(625) | Referenced variable adc_results_rdy_i is not in sensitivity list
    @W:CG290 : apb3_if_st.vhd(622) | Referenced variable adc_ch3_val_i is not in sensitivity list
    @W:CG290 : apb3_if_st.vhd(619) | Referenced variable adc_ch2_val_i is not in sensitivity list
    @W:CG290 : apb3_if_st.vhd(615) | Referenced variable adc_ch1_val_i is not in sensitivity list
    @W:CG290 : apb3_if_st.vhd(610) | Referenced variable adc_ch0_val_i is not in sensitivity list
    @W:CG290 : apb3_if_st.vhd(586) | Referenced variable pi_act_i is not in sensitivity list
    @W:CG290 : apb3_if_st.vhd(583) | Referenced variable pi_ref_i is not in sensitivity list
    @N:CD630 : sine_cos.vhd(53) | Synthesizing work.sine_cos.sine_cos
    @N:CD231 : sine_cos.vhd(2193) | Using onehot encoding for type sine_cos_states (idle="10000")
    @W:CG296 : sine_cos.vhd(2247) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : sine_cos.vhd(2249) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : sine_cos.vhd(2367) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : sine_cos.vhd(2369) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : sine_cos.vhd(2402) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : sine_cos.vhd(2404) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : sine_cos.vhd(2413) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : sine_cos.vhd(2415) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : sine_cos.vhd(2426) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : sine_cos.vhd(2428) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : sine_cos.vhd(2441) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : sine_cos.vhd(2443) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : sine_cos.vhd(2455) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : sine_cos.vhd(2457) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : sine_cos.vhd(2498) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : sine_cos.vhd(2500) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : sine_cos.vhd(2509) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : sine_cos.vhd(2511) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : sine_cos.vhd(2520) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : sine_cos.vhd(2522) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : sine_cos.vhd(2531) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : sine_cos.vhd(2533) | Referenced variable s_reset_state is not in sensitivity list
    @W:CD638 : sine_cos.vhd(2173) | Signal write_data is undriven
    @W:CD638 : sine_cos.vhd(2174) | Signal write_addr is undriven
    @W:CD638 : sine_cos.vhd(2175) | Signal addr is undriven
    @W:CD638 : sine_cos.vhd(2176) | Signal ram_addr_inc is undriven
    @W:CD638 : sine_cos.vhd(2178) | Signal rom_addr_inc is undriven
    @W:CD638 : sine_cos.vhd(2179) | Signal write_enbls is undriven
    @W:CD638 : sine_cos.vhd(2184) | Signal wen is undriven
    @W:CD638 : sine_cos.vhd(2185) | Signal paddr_sel is undriven
    @W:CD638 : sine_cos.vhd(2186) | Signal cos_index_ang_est is undriven
    @W:CD638 : sine_cos.vhd(2187) | Signal read_data_ang_est is undriven
    @W:CD638 : sine_cos.vhd(2188) | Signal read_addr_ang_est is undriven
    @N:CD630 : svpwm.vhd(35) | Synthesizing work.svpwm.svpwm
    @N:CD231 : svpwm.vhd(92) | Using onehot encoding for type min_max_fsm (idle="10000000")
    @N:CD231 : svpwm.vhd(93) | Using onehot encoding for type third_har_fsm (idle="100000000")
    @W:CG296 : svpwm.vhd(191) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(193) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : svpwm.vhd(227) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(229) | Referenced variable s_reset_state is not in sensitivity list
    @W:CD454 : svpwm.vhd(315) | Storing to null range (17 downto 18) of variable s_r_va
    @W:CD454 : svpwm.vhd(318) | Storing to null range (17 downto 18) of variable s_r_vb
    @W:CD454 : svpwm.vhd(321) | Storing to null range (17 downto 18) of variable s_r_vc
    @W:CG296 : svpwm.vhd(304) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(306) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : svpwm.vhd(346) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(348) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : svpwm.vhd(389) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(391) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : svpwm.vhd(422) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(424) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : svpwm.vhd(445) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(447) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : svpwm.vhd(484) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(486) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : svpwm.vhd(501) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(503) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : svpwm.vhd(520) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(522) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : svpwm.vhd(537) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(539) | Referenced variable s_reset_state is not in sensitivity list
    @W:CG296 : svpwm.vhd(888) | Incomplete sensitivity list - assuming completeness
    @W:CG290 : svpwm.vhd(890) | Referenced variable s_reset_state is not in sensitivity list
    @W:CD638 : svpwm.vhd(96) | Signal third_har_state is undriven
    @W:CD638 : svpwm.vhd(114) | Signal s_r_va_mul_scale is undriven
    @W:CD638 : svpwm.vhd(115) | Signal s_r_vb_mul_scale is undriven
    @W:CD638 : svpwm.vhd(116) | Signal s_r_vc_mul_scale is undriven
    @W:CD638 : svpwm.vhd(117) | Signal s_r_sine_theta is undriven
    @W:CD638 : svpwm.vhd(118) | Signal s_r_sine_3theta is undriven
    @W:CD638 : svpwm.vhd(119) | Signal s_r_sine_theta_minus120 is undriven
    @W:CD638 : svpwm.vhd(120) | Signal s_r_sine_3theta_minus120 is undriven
    @W:CD638 : svpwm.vhd(121) | Signal s_r_sine_theta_plus120 is undriven
    @W:CD638 : svpwm.vhd(122) | Signal s_r_sine_3theta_plus120 is undriven
    @W:CD638 : svpwm.vhd(123) | Signal s_r_v_mag is undriven
    @W:CD638 : svpwm.vhd(124) | Signal s_r_theta_pl_3theta is undriven
    @W:CD638 : svpwm.vhd(125) | Signal s_r_theta_mi120_pl_3theta_mi120 is undriven
    @W:CD638 : svpwm.vhd(126) | Signal s_r_theta_pl120_pl_3theta_pl120 is undriven
    @W:CD638 : svpwm.vhd(127) | Signal s_r_3h_first_term is undriven
    @W:CD638 : svpwm.vhd(128) | Signal s_r_3h_scnd_term is undriven
    @W:CD638 : svpwm.vhd(129) | Signal s_r_3h_thrd_term is undriven
    @W:CD638 : svpwm.vhd(130) | Signal s_temp_min is undriven
    @W:CD638 : svpwm.vhd(131) | Signal s_temp_max is undriven
    @N:CD630 : speed_id_iq_pi.vhd(31) | Synthesizing work.speed_id_iq_pi.speed_id_iq_pi
    @E:CD145 : speed_id_iq_pi.vhd(55) | Formal, "iq_init_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "iq_init_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(70) | Formal, "id_pi_ref_input_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "id_pi_ref_input_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(71) | Formal, "id_pi_act_input_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "id_pi_act_input_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(73) | Formal, "id_pi_kp_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "id_pi_kp_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(74) | Formal, "id_pi_ki_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "id_pi_ki_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(75) | Formal, "id_pi_ymax_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "id_pi_ymax_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(76) | Formal, "id_pi_ymin_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "id_pi_ymin_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(77) | Formal, "id_pi_kp_scale_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "id_pi_kp_scale_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(78) | Formal, "id_pi_ki_scale_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "id_pi_ki_scale_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(81) | Formal, "id_pi_output_y_o", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "id_pi_output_y_o", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(83) | Formal, "iq_pi_act_input_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "iq_pi_act_input_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(85) | Formal, "iq_pi_kp_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "iq_pi_kp_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(86) | Formal, "iq_pi_ki_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "iq_pi_ki_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(87) | Formal, "iq_pi_ymax_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "iq_pi_ymax_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(88) | Formal, "iq_pi_ymin_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "iq_pi_ymin_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(89) | Formal, "iq_pi_kp_scale_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "iq_pi_kp_scale_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(90) | Formal, "iq_pi_ki_scale_i", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "iq_pi_ki_scale_i", and actual agree on type but not on size
    @E:CD145 : speed_id_iq_pi.vhd(93) | Formal, "iq_pi_output_y_o", and actual agree on type but not on size
    @E:CD145 : msmc_fab_toplevel_st.vhd(1853) | Formal, "iq_pi_output_y_o", and actual agree on type but not on size
    @N:CD630 : pwm_count.vhd(32) | Synthesizing work.pwm_count.pwm_count
    @E:CD297 : pwm_count.vhd(94) | Width mismatch, location has width 16, value 18
    @END
    Process took 0h:00m:01s realtime, 0h:00m:01s cputime
    # Wed Oct 08 12:15:13 2014

    ###########################################################]

`