[Library]
others = $MODEL_TECH/../modelsim.ini
SmartFusion2 = F:/Microsemi/Libero_SoC_v11.8/Designer/lib/modelsim/precompiled/vlog/SmartFusion2







presynth = presynth
COREAHBLITE_LIB = ../component/Actel/DirectCore/CoreAHBLite/5.0.100/mti/user_vhdl/COREAHBLITE_LIB
COREAPB3_LIB = COREAPB3_LIB











































































syncad_vhdl_lib = F:\Microsemi\Libero_SoC_v11.8\Designer/lib/actel/syncad_vhdl_lib

[vcom]
VHDL93 = 1

[vsim]
IterationLimit = 5000
