F:\Microsemi\Libero_SoC_v11.8\SynplifyPro\bin64\m_generic.exe  -prodtype  synplify_pro   -encrypt  -pro  -rundir  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis   -part M2S010  -package FBGA484  -grade -1    -overilog "MC_System_top_1.vm" -maxfan 10000 -clock_globalthreshold 2 -async_globalthreshold 12 -globalthreshold 5000 -low_power_ram_decomp 0 -seqshift_to_uram 0 -opcond COMTC -report_path 0 -RWCheckOnRam 0 -summaryfile F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\synlog\report\MC_System_top_1_fpga_mapper.xml  -top_level_module  work.MC_System_top  -licensetype  synplifypro_actel  -flow mapping  -mp  4  -prjfile  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\scratchproject.prs  -implementation  synthesis  -multisrs  -ovm  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.vm   -freq 100.000   -tcl  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top.fdc  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\synwork\MC_System_top_1_prem.srd  -sap  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.sap  -otap  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.tap  -omap  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.map  -devicelib  F:\Microsemi\Libero_SoC_v11.8\SynplifyPro\lib\generic\smartfusion2.v  -sap  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.sap  -ologparam  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\syntmp\MC_System_top_1.plg  -osyn  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.srm  -prjdir  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\  -prjname  MC_System_top_syn  -log  F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\synlog\MC_System_top_1_fpga_mapper.srr 
rc:1 success:1 runtime:17
file:F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\scratchproject.prs|io:o|time:1511937202|size:7889|exec:0
file:F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.vm|io:o|time:1511937226|size:2230181|exec:0
file:F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top.fdc|io:i|time:1437633025|size:1557|exec:0
file:F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\synwork\MC_System_top_1_prem.srd|io:i|time:1511937210|size:1294286|exec:0
file:F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.sap|io:o|time:1511937210|size:3885|exec:0
file:F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.tap|io:o|time:0|size:0|exec:0
file:F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.map|io:o|time:1511937228|size:28|exec:0
file:F:\Microsemi\Libero_SoC_v11.8\SynplifyPro\lib\generic\smartfusion2.v|io:i|time:1487925428|size:16359|exec:0
file:F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.sap|io:o|time:1511937210|size:3885|exec:0
file:F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\syntmp\MC_System_top_1.plg|io:o|time:1511937228|size:606|exec:0
file:F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\MC_System_top_1.srm|io:o|time:1511937226|size:10975|exec:0
file:F:\SVN\MotorControl\Release\WebRelease\LiberoProjects\SK1ABLEN10\LiberoProject\SK1ABLEN10\SK1ABLEN10_5_2_1\synthesis\synlog\MC_System_top_1_fpga_mapper.srr|io:o|time:1511937228|size:42359|exec:0
file:F:\Microsemi\Libero_SoC_v11.8\SynplifyPro\bin\m_generic.exe|io:i|time:1485288362|size:17958400|exec:1
file:F:\Microsemi\Libero_SoC_v11.8\SynplifyPro\bin64\m_generic.exe|io:i|time:1485289914|size:32495616|exec:1
