@P:  Worst Slack : 0.572
@P:  Linker_Design_FCCC_0_FCCC|GL0_net_inferred_clock - Estimated Frequency : 116.4 MHz
@P:  Linker_Design_FCCC_0_FCCC|GL0_net_inferred_clock - Requested Frequency : 100.0 MHz
@P:  Linker_Design_FCCC_0_FCCC|GL0_net_inferred_clock - Estimated Period : 8.589
@P:  Linker_Design_FCCC_0_FCCC|GL0_net_inferred_clock - Requested Period : 10.000
@P:  Linker_Design_FCCC_0_FCCC|GL0_net_inferred_clock - Slack : 1.411
@P:  System - Estimated Frequency : 895.2 MHz
@P:  System - Requested Frequency : 100.0 MHz
@P:  System - Estimated Period : 1.117
@P:  System - Requested Period : 10.000
@P:  System - Slack : 8.883
@P:  Worst Slack(min analysis) : 0.457
@P:  Linker_Design_FCCC_0_FCCC|GL0_net_inferred_clock - Estimated Frequency(min analysis) : 116.4 MHz
@P:  Linker_Design_FCCC_0_FCCC|GL0_net_inferred_clock - Requested Frequency(min analysis) : 100.0 MHz
@P:  Linker_Design_FCCC_0_FCCC|GL0_net_inferred_clock - Estimated Period(min analysis) : 8.589
@P:  Linker_Design_FCCC_0_FCCC|GL0_net_inferred_clock - Requested Period(min analysis) : 10.000
@P:  Linker_Design_FCCC_0_FCCC|GL0_net_inferred_clock - Slack(min analysis) : 1.411
@P:  System - Estimated Frequency(min analysis) : 895.2 MHz
@P:  System - Requested Frequency(min analysis) : 100.0 MHz
@P:  System - Estimated Period(min analysis) : 1.117
@P:  System - Requested Period(min analysis) : 10.000
@P:  System - Slack(min analysis) : 8.883
@P: Linker_Design Part : m2s050tfbga896std
@P: Linker_Design Register bits  : 114 
@P: Linker_Design DSP Blocks  : 0
@P: Linker_Design I/O primitives : 2
@P: Linker_Design Block Rams (RAM1K18)  : 32
@P:  CPU Time : 0h:00m:03s
