@W: CG775 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":13:0:13:10|Found Component CoreAHBLite in library COREAHBLITE_LIB
@W: CG360 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":413:0:413:8|No assignment to wire CAHBLTlIl
@W: CG775 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\COREAHBTOAPB3\3.0.4\rtl\vlog\core_obfuscated\coreahbtoapb3.v":8:0:8:12|Found Component COREAHBTOAPB3 in library COREAHBTOAPB3_LIB
@W: CG775 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":13:0:13:7|Found Component CoreAPB3 in library COREAPB3_LIB
@W: CG360 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":1484:0:1484:8|No assignment to wire CAPB3IlOI
@W: CG360 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\FABRIC_SRAM_INIT_MSS\FABRIC_SRAM_INIT_MSS.v":61:14:61:33|No assignment to wire FIC_0_AHB_M_HTRANS_0
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\hdl\mem_apb_wrp.v":40:11:40:17|Input PENABLE is unused
@W: CL157 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\OSC_0\Top_OSC_0_OSC.v":18:7:18:24|*Output RCOSC_25_50MHZ_MSS has undriven bits -- simulation mismatch possible.
@W: CL157 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\OSC_0\Top_OSC_0_OSC.v":20:7:20:24|*Output RCOSC_25_50MHZ_O2F has undriven bits -- simulation mismatch possible.
@W: CL157 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\OSC_0\Top_OSC_0_OSC.v":21:7:21:20|*Output RCOSC_1MHZ_MSS has undriven bits -- simulation mismatch possible.
@W: CL157 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\OSC_0\Top_OSC_0_OSC.v":22:7:22:20|*Output RCOSC_1MHZ_CCC has undriven bits -- simulation mismatch possible.
@W: CL157 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\OSC_0\Top_OSC_0_OSC.v":23:7:23:20|*Output RCOSC_1MHZ_O2F has undriven bits -- simulation mismatch possible.
@W: CL157 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\OSC_0\Top_OSC_0_OSC.v":24:7:24:16|*Output XTLOSC_MSS has undriven bits -- simulation mismatch possible.
@W: CL157 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\OSC_0\Top_OSC_0_OSC.v":25:7:25:16|*Output XTLOSC_CCC has undriven bits -- simulation mismatch possible.
@W: CL157 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\OSC_0\Top_OSC_0_OSC.v":26:7:26:16|*Output XTLOSC_O2F has undriven bits -- simulation mismatch possible.
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\OSC_0\Top_OSC_0_OSC.v":17:7:17:9|Input XTL is unused
@W: CL157 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\FABRIC_SRAM_INIT_MSS\FABRIC_SRAM_INIT_MSS.v":46:14:46:31|*Output FIC_0_AHB_M_HTRANS has undriven bits -- simulation mismatch possible.
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":378:0:378:4|Input IADDR is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":380:0:380:6|Input PRESETN is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":382:0:382:3|Input PCLK is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":503:0:503:7|Input PRDATAS1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":510:0:510:7|Input PRDATAS2 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":517:0:517:7|Input PRDATAS3 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":524:0:524:7|Input PRDATAS4 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":531:0:531:7|Input PRDATAS5 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":538:0:538:7|Input PRDATAS6 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":545:0:545:7|Input PRDATAS7 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":552:0:552:7|Input PRDATAS8 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":559:0:559:7|Input PRDATAS9 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":566:0:566:8|Input PRDATAS10 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":573:0:573:8|Input PRDATAS11 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":580:0:580:8|Input PRDATAS12 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":587:0:587:8|Input PRDATAS13 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":594:0:594:8|Input PRDATAS14 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":601:0:601:8|Input PRDATAS15 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":612:0:612:7|Input PREADYS1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":614:0:614:7|Input PREADYS2 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":616:0:616:7|Input PREADYS3 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":618:0:618:7|Input PREADYS4 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":620:0:620:7|Input PREADYS5 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":622:0:622:7|Input PREADYS6 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":624:0:624:7|Input PREADYS7 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":626:0:626:7|Input PREADYS8 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":628:0:628:7|Input PREADYS9 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":630:0:630:8|Input PREADYS10 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":632:0:632:8|Input PREADYS11 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":634:0:634:8|Input PREADYS12 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":636:0:636:8|Input PREADYS13 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":638:0:638:8|Input PREADYS14 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":640:0:640:8|Input PREADYS15 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":646:0:646:8|Input PSLVERRS1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":648:0:648:8|Input PSLVERRS2 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":650:0:650:8|Input PSLVERRS3 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":652:0:652:8|Input PSLVERRS4 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":654:0:654:8|Input PSLVERRS5 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":656:0:656:8|Input PSLVERRS6 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":658:0:658:8|Input PSLVERRS7 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":660:0:660:8|Input PSLVERRS8 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":662:0:662:8|Input PSLVERRS9 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":664:0:664:9|Input PSLVERRS10 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":666:0:666:9|Input PSLVERRS11 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":668:0:668:9|Input PSLVERRS12 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":670:0:670:9|Input PSLVERRS13 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":672:0:672:9|Input PSLVERRS14 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":674:0:674:9|Input PSLVERRS15 is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\COREAHBTOAPB3\3.0.4\rtl\vlog\core_obfuscated\coreahbtoapb3.v":40:0:40:5|Input port bit 0 of HTRANS[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":565:0:565:8|Input port bit 0 of HTRANS_M0[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":630:0:630:8|Input port bit 0 of HTRANS_M1[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":688:0:688:7|Input port bit 1 of HRESP_S0[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":764:0:764:7|Input port bit 1 of HRESP_S1[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":840:0:840:7|Input port bit 1 of HRESP_S2[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":916:0:916:7|Input port bit 1 of HRESP_S3[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":992:0:992:7|Input port bit 1 of HRESP_S4[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1068:0:1068:7|Input port bit 1 of HRESP_S5[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1144:0:1144:7|Input port bit 1 of HRESP_S6[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1220:0:1220:7|Input port bit 1 of HRESP_S7[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1296:0:1296:7|Input port bit 1 of HRESP_S8[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1372:0:1372:7|Input port bit 1 of HRESP_S9[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1448:0:1448:8|Input port bit 1 of HRESP_S10[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1524:0:1524:8|Input port bit 1 of HRESP_S11[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1600:0:1600:8|Input port bit 1 of HRESP_S12[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1676:0:1676:8|Input port bit 1 of HRESP_S13[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1752:0:1752:8|Input port bit 1 of HRESP_S14[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1828:0:1828:8|Input port bit 1 of HRESP_S15[1:0] is unused
@W: CL247 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":1904:0:1904:8|Input port bit 1 of HRESP_S16[1:0] is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":581:0:581:8|Input HBURST_M0 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":588:0:588:7|Input HPROT_M0 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":646:0:646:8|Input HBURST_M1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":653:0:653:7|Input HPROT_M1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":142:0:142:8|Input HWDATA_M1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":163:0:163:8|Input HRDATA_S0 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":165:0:165:11|Input HREADYOUT_S0 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":167:0:167:7|Input HRESP_S0 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":213:0:213:8|Input HRDATA_S1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":215:0:215:11|Input HREADYOUT_S1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":217:0:217:7|Input HRESP_S1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":263:0:263:8|Input HRDATA_S2 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":265:0:265:11|Input HREADYOUT_S2 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":267:0:267:7|Input HRESP_S2 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":363:0:363:8|Input HRDATA_S4 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":365:0:365:11|Input HREADYOUT_S4 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":367:0:367:7|Input HRESP_S4 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":413:0:413:8|Input HRDATA_S5 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":415:0:415:11|Input HREADYOUT_S5 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":417:0:417:7|Input HRESP_S5 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":463:0:463:8|Input HRDATA_S6 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":465:0:465:11|Input HREADYOUT_S6 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":467:0:467:7|Input HRESP_S6 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":513:0:513:8|Input HRDATA_S7 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":515:0:515:11|Input HREADYOUT_S7 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":517:0:517:7|Input HRESP_S7 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":563:0:563:8|Input HRDATA_S8 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":565:0:565:11|Input HREADYOUT_S8 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":567:0:567:7|Input HRESP_S8 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":613:0:613:8|Input HRDATA_S9 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":615:0:615:11|Input HREADYOUT_S9 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":617:0:617:7|Input HRESP_S9 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":663:0:663:9|Input HRDATA_S10 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":665:0:665:12|Input HREADYOUT_S10 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":667:0:667:8|Input HRESP_S10 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":713:0:713:9|Input HRDATA_S11 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":715:0:715:12|Input HREADYOUT_S11 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":717:0:717:8|Input HRESP_S11 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":763:0:763:9|Input HRDATA_S12 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":765:0:765:12|Input HREADYOUT_S12 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":767:0:767:8|Input HRESP_S12 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":813:0:813:9|Input HRDATA_S13 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":815:0:815:12|Input HREADYOUT_S13 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":817:0:817:8|Input HRESP_S13 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":863:0:863:9|Input HRDATA_S14 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":865:0:865:12|Input HREADYOUT_S14 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":867:0:867:8|Input HRESP_S14 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":913:0:913:9|Input HRDATA_S15 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":915:0:915:12|Input HREADYOUT_S15 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":917:0:917:8|Input HRESP_S15 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":963:0:963:9|Input HRDATA_S16 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":965:0:965:12|Input HREADYOUT_S16 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":967:0:967:8|Input HRESP_S16 is unused
@W: CL156 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":413:0:413:8|*Input CAHBLTlIl to expression [instance] has undriven bits that are tied to 0 -- simulation mismatch possible.
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":106:0:106:8|Input CAHBLTl01 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":113:0:113:8|Input CAHBLTO11 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":164:0:164:8|Input HRDATA_S0 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":166:0:166:11|Input HREADYOUT_S0 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":173:0:173:8|Input HRDATA_S1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":175:0:175:11|Input HREADYOUT_S1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":182:0:182:8|Input HRDATA_S2 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":184:0:184:11|Input HREADYOUT_S2 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":191:0:191:8|Input HRDATA_S3 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":193:0:193:11|Input HREADYOUT_S3 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":200:0:200:8|Input HRDATA_S4 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":202:0:202:11|Input HREADYOUT_S4 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":209:0:209:8|Input HRDATA_S5 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":211:0:211:11|Input HREADYOUT_S5 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":218:0:218:8|Input HRDATA_S6 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":220:0:220:11|Input HREADYOUT_S6 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":227:0:227:8|Input HRDATA_S7 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":229:0:229:11|Input HREADYOUT_S7 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":236:0:236:8|Input HRDATA_S8 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":238:0:238:11|Input HREADYOUT_S8 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":245:0:245:8|Input HRDATA_S9 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":247:0:247:11|Input HREADYOUT_S9 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":254:0:254:9|Input HRDATA_S10 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":256:0:256:12|Input HREADYOUT_S10 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":263:0:263:9|Input HRDATA_S11 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":265:0:265:12|Input HREADYOUT_S11 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":272:0:272:9|Input HRDATA_S12 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":274:0:274:12|Input HREADYOUT_S12 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":281:0:281:9|Input HRDATA_S13 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":283:0:283:12|Input HREADYOUT_S13 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":290:0:290:9|Input HRDATA_S14 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":292:0:292:12|Input HREADYOUT_S14 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":299:0:299:9|Input HRDATA_S15 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":301:0:301:12|Input HREADYOUT_S15 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":308:0:308:9|Input HRDATA_S16 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":310:0:310:12|Input HREADYOUT_S16 is unused
@W: CL246 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":106:0:106:8|Input port bits 16 to 4 of CAHBLTl01[16:0] are unused
@W: CL246 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":106:0:106:8|Input port bits 2 to 0 of CAHBLTl01[16:0] are unused
@W: CL246 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":113:0:113:8|Input port bits 16 to 4 of CAHBLTO11[16:0] are unused
@W: CL246 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":113:0:113:8|Input port bits 2 to 0 of CAHBLTO11[16:0] are unused
@W: CL156 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":413:0:413:8|*Input CAHBLTlIl to expression [instance] has undriven bits that are tied to 0 -- simulation mismatch possible.
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":164:0:164:8|Input HRDATA_S0 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":166:0:166:11|Input HREADYOUT_S0 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":173:0:173:8|Input HRDATA_S1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":175:0:175:11|Input HREADYOUT_S1 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":182:0:182:8|Input HRDATA_S2 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":184:0:184:11|Input HREADYOUT_S2 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":200:0:200:8|Input HRDATA_S4 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":202:0:202:11|Input HREADYOUT_S4 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":209:0:209:8|Input HRDATA_S5 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":211:0:211:11|Input HREADYOUT_S5 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":218:0:218:8|Input HRDATA_S6 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":220:0:220:11|Input HREADYOUT_S6 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":227:0:227:8|Input HRDATA_S7 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":229:0:229:11|Input HREADYOUT_S7 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":236:0:236:8|Input HRDATA_S8 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":238:0:238:11|Input HREADYOUT_S8 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":245:0:245:8|Input HRDATA_S9 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":247:0:247:11|Input HREADYOUT_S9 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":254:0:254:9|Input HRDATA_S10 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":256:0:256:12|Input HREADYOUT_S10 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":263:0:263:9|Input HRDATA_S11 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":265:0:265:12|Input HREADYOUT_S11 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":272:0:272:9|Input HRDATA_S12 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":274:0:274:12|Input HREADYOUT_S12 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":281:0:281:9|Input HRDATA_S13 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":283:0:283:12|Input HREADYOUT_S13 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":290:0:290:9|Input HRDATA_S14 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":292:0:292:12|Input HREADYOUT_S14 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":299:0:299:9|Input HRDATA_S15 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":301:0:301:12|Input HREADYOUT_S15 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":308:0:308:9|Input HRDATA_S16 is unused
@W: CL159 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":310:0:310:12|Input HREADYOUT_S16 is unused

