@N|Running in 64-bit mode
@N: CG364 :"C:\Actel\Libero_v11.0_Beta\Synopsys\synplify_F201203MSP2SF2\lib\generic\smartfusion2.v":371:7:371:9|Synthesizing module VCC
@N: CG364 :"C:\Actel\Libero_v11.0_Beta\Synopsys\synplify_F201203MSP2SF2\lib\generic\smartfusion2.v":367:7:367:9|Synthesizing module GND
@N: CG364 :"C:\Actel\Libero_v11.0_Beta\Synopsys\synplify_F201203MSP2SF2\lib\generic\smartfusion2.v":362:7:362:12|Synthesizing module CLKINT
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\SgCore\CCC\2.0.005\ccc_comps.v":2:7:2:9|Synthesizing module CCC
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\CCC_0\Top_CCC_0_CCC.v":5:7:5:19|Synthesizing module Top_CCC_0_CCC
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_addrdec.v":13:0:13:6|Synthesizing module CAHBLTO
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_defaultslavesm.v":13:0:13:8|Synthesizing module CAHBLTIIl
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":13:0:13:8|Synthesizing module CAHBLTIO1
@N: CL177 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":2568:0:2568:5|Sharing sequential element CAHBLTO0OI.
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_addrdec.v":13:0:13:6|Synthesizing module CAHBLTO
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":13:0:13:8|Synthesizing module CAHBLTIO1
@N: CL177 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_masterstage.v":2568:0:2568:5|Sharing sequential element CAHBLTO0OI.
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_slavearbiter.v":13:0:13:8|Synthesizing module CAHBLTO1l
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_slavestage.v":13:0:13:9|Synthesizing module CAHBLTO1lI
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_matrix2x16.v":13:0:13:9|Synthesizing module CAHBLTII0l
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite.v":13:0:13:10|Synthesizing module CoreAHBLite
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\COREAHBTOAPB3\3.0.4\rtl\vlog\core_obfuscated\coreahbtoapb3_ahbtoapbsm.v":8:0:8:10|Synthesizing module CAHBtoAPB3O
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\COREAHBTOAPB3\3.0.4\rtl\vlog\core_obfuscated\coreahbtoapb3_penablescheduler.v":8:0:8:12|Synthesizing module CAHBtoAPB3IOl
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\COREAHBTOAPB3\3.0.4\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":8:0:8:12|Synthesizing module CAHBtoAPB3O1I
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\COREAHBTOAPB3\3.0.4\rtl\vlog\core_obfuscated\coreahbtoapb3.v":8:0:8:12|Synthesizing module COREAHBTOAPB3
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3_muxptob3.v":13:0:13:5|Synthesizing module CAPB3l
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAPB3\4.0.5\rtl\vlog\core_obfuscated\coreapb3.v":13:0:13:7|Synthesizing module CoreAPB3
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\FABRIC_SRAM_INIT_MSS\FABRIC_SRAM_INIT_MSS_tmp_syn.v":5:7:5:13|Synthesizing module MSS_050
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\FABRIC_SRAM_INIT_MSS\FABRIC_SRAM_INIT_MSS.v":9:7:9:26|Synthesizing module FABRIC_SRAM_INIT_MSS
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\FABRIC_SRAM_INIT\FABRIC_SRAM_INIT.v":9:7:9:22|Synthesizing module FABRIC_SRAM_INIT
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\SgCore\OSC\0.0.502\osc_comps.v":11:7:11:20|Synthesizing module RCOSC_25_50MHZ
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\OSC_0\Top_OSC_0_OSC.v":5:7:5:19|Synthesizing module Top_OSC_0_OSC
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\hdl\mem_apb_wrp.v":19:7:19:17|Synthesizing module mem_apb_wrp
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\hdl\mux_blk.v":19:7:19:13|Synthesizing module mux_blk
@N: CG364 :"C:\Actel\Libero_v11.0_Beta\Synopsys\synplify_F201203MSP2SF2\lib\generic\smartfusion2.v":377:7:377:13|Synthesizing module RAM1K18
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\RAM_with_wrapper\SRAM_64x8_0\RAM_with_wrapper_SRAM_64x8_0_TPSRAM.v":5:7:5:41|Synthesizing module RAM_with_wrapper_SRAM_64x8_0_TPSRAM
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\RAM_with_wrapper\RAM_with_wrapper.v":9:7:9:22|Synthesizing module RAM_with_wrapper
@N: CG364 :"C:\Actel\Libero_v11.0_Beta\Synopsys\synplify_F201203MSP2SF2\lib\generic\smartfusion2.v":741:7:741:14|Synthesizing module SYSRESET
@N: CG364 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\work\Top\Top.v":9:7:9:9|Synthesizing module Top
@N: CL201 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\hdl\mem_apb_wrp.v":78:0:78:5|Trying to extract state machine for register fsm
@N: CL201 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\COREAHBTOAPB3\3.0.4\rtl\vlog\core_obfuscated\coreahbtoapb3_penablescheduler.v":152:0:152:5|Trying to extract state machine for register CAHBtoAPB3OIl
@N: CL201 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\COREAHBTOAPB3\3.0.4\rtl\vlog\core_obfuscated\coreahbtoapb3_ahbtoapbsm.v":646:0:646:5|Trying to extract state machine for register CAHBtoAPB3IOI
@N: CL201 :"D:\Appsnotes\2012\RAM_initilization\FROM_MSS\Posted_design\M2S_AC392_DF\FABRIC_SRAM_INIT\component\Actel\DirectCore\CoreAHBLite\4.0.9\rtl\vlog\core_obfuscated\coreahblite_slavearbiter.v":494:0:494:5|Trying to extract state machine for register CAHBLTOO1

