// Actel Corporation Proprietary and Confidential
// Copyright 2010 Actel Corporation.  All rights reserved.
// ANY USE OR REDISTRIBUTION IN PART OR IN WHOLE MUST BE HANDLED IN
// ACCORDANCE WITH THE ACTEL LICENSE AGREEMENT AND MUST BE APPROVED
// IN ADVANCE IN WRITING.
// Revision Information:
// 10Feb10              Production Release Version 3.1
// SVN Revision Information:
// SVN $Revision: 15830 $
// SVN $Date: 2011-09-02 07:10:38 -0700 (Fri, 02 Sep 2011) $
`timescale 1ns/1ps
module
CAHBLTIO1
#
(
parameter
[
0
:
0
]
MEMSPACE
=
0
,
parameter
[
15
:
0
]
CAHBLTI
=
0
,
parameter
[
16
:
0
]
CAHBLTl
=
(
2
**
17
)
-
1
)
(
input
HCLK,
input
HRESETN,
input
[
31
:
0
]
CAHBLTlO1,
input
CAHBLTOI1,
input
[
2
:
0
]
CAHBLTII1,
input
CAHBLTlI1,
input
CAHBLTOl1,
output
reg
CAHBLTIl1,
output
reg
[
31
:
0
]
CAHBLTll1,
output
wire
CAHBLTO01,
input
CAHBLTII,
input
[
16
:
0
]
CAHBLTI01,
input
[
16
:
0
]
CAHBLTl01,
input
[
16
:
0
]
CAHBLTO11,
output
wire
[
31
:
0
]
CAHBLTI11,
output
reg
CAHBLTl11,
output
reg
[
2
:
0
]
CAHBLTOOOI,
output
reg
CAHBLTIOOI,
output
reg
CAHBLTlOOI,
output
wire
[
16
:
0
]
CAHBLTOIOI,
output
wire
[
16
:
0
]
CAHBLTIIOI,
output
reg
CAHBLTlIOI,
input
[
31
:
0
]
HRDATA_S0,
input
HREADYOUT_S0,
input
[
31
:
0
]
HRDATA_S1,
input
HREADYOUT_S1,
input
[
31
:
0
]
HRDATA_S2,
input
HREADYOUT_S2,
input
[
31
:
0
]
HRDATA_S3,
input
HREADYOUT_S3,
input
[
31
:
0
]
HRDATA_S4,
input
HREADYOUT_S4,
input
[
31
:
0
]
HRDATA_S5,
input
HREADYOUT_S5,
input
[
31
:
0
]
HRDATA_S6,
input
HREADYOUT_S6,
input
[
31
:
0
]
HRDATA_S7,
input
HREADYOUT_S7,
input
[
31
:
0
]
HRDATA_S8,
input
HREADYOUT_S8,
input
[
31
:
0
]
HRDATA_S9,
input
HREADYOUT_S9,
input
[
31
:
0
]
HRDATA_S10,
input
HREADYOUT_S10,
input
[
31
:
0
]
HRDATA_S11,
input
HREADYOUT_S11,
input
[
31
:
0
]
HRDATA_S12,
input
HREADYOUT_S12,
input
[
31
:
0
]
HRDATA_S13,
input
HREADYOUT_S13,
input
[
31
:
0
]
HRDATA_S14,
input
HREADYOUT_S14,
input
[
31
:
0
]
HRDATA_S15,
input
HREADYOUT_S15,
input
[
31
:
0
]
HRDATA_S16,
input
HREADYOUT_S16
)
;
localparam
CAHBLTlll
=
1
'b
0
;
localparam
CAHBLTOlOI
=
1
'b
1
;
localparam
CAHBLTIlOI
=
17
'b
0_0000_0000_0000_0000
;
reg
[
31
:
0
]
CAHBLTllOI
;
reg
CAHBLTO0OI
;
reg
CAHBLTI0OI
;
reg
CAHBLTl0OI
;
reg
[
31
:
0
]
CAHBLTO1OI
;
reg
CAHBLTI1OI
;
reg
[
2
:
0
]
CAHBLTl1OI
;
reg
CAHBLTOOII
;
reg
CAHBLTIOII
;
reg
CAHBLTlOII
;
reg
CAHBLTOIII
;
wire
[
16
:
0
]
CAHBLTIIII
;
reg
[
16
:
0
]
CAHBLTlIII
;
reg
[
16
:
0
]
CAHBLTOlII
;
wire
CAHBLTOll
;
wire
CAHBLTIll
;
wire
CAHBLTlIl
;
wire
CAHBLTIlII
;
wire
CAHBLTllII
;
wire
CAHBLTO0II
;
wire
CAHBLTI0II
;
wire
CAHBLTl0II
;
wire
CAHBLTO1II
;
wire
CAHBLTI1II
;
wire
CAHBLTl1II
;
wire
CAHBLTOOlI
;
wire
CAHBLTIOlI
;
wire
CAHBLTlOlI
;
wire
CAHBLTOIlI
;
wire
CAHBLTIIlI
;
wire
CAHBLTlIlI
;
wire
CAHBLTOllI
;
wire
CAHBLTIllI
;
wire
CAHBLTlllI
;
reg
CAHBLTO0lI
;
assign
CAHBLTOIOI
=
CAHBLTlIII
[
16
:
0
]
;
assign
CAHBLTIIOI
=
CAHBLTOlII
[
16
:
0
]
;
assign
CAHBLTIlII
=
(
CAHBLTOlII
[
0
]
&
(
!
CAHBLTl
[
0
]
)
)
;
assign
CAHBLTllII
=
(
CAHBLTOlII
[
1
]
&
(
!
CAHBLTl
[
1
]
)
)
;
assign
CAHBLTO0II
=
(
CAHBLTOlII
[
2
]
&
(
!
CAHBLTl
[
2
]
)
)
;
assign
CAHBLTI0II
=
(
CAHBLTOlII
[
3
]
&
(
!
CAHBLTl
[
3
]
)
)
;
assign
CAHBLTl0II
=
(
CAHBLTOlII
[
4
]
&
(
!
CAHBLTl
[
4
]
)
)
;
assign
CAHBLTO1II
=
(
CAHBLTOlII
[
5
]
&
(
!
CAHBLTl
[
5
]
)
)
;
assign
CAHBLTI1II
=
(
CAHBLTOlII
[
6
]
&
(
!
CAHBLTl
[
6
]
)
)
;
assign
CAHBLTl1II
=
(
CAHBLTOlII
[
7
]
&
(
!
CAHBLTl
[
7
]
)
)
;
assign
CAHBLTOOlI
=
(
CAHBLTOlII
[
8
]
&
(
!
CAHBLTl
[
8
]
)
)
;
assign
CAHBLTIOlI
=
(
CAHBLTOlII
[
9
]
&
(
!
CAHBLTl
[
9
]
)
)
;
assign
CAHBLTlOlI
=
(
CAHBLTOlII
[
10
]
&
(
!
CAHBLTl
[
10
]
)
)
;
assign
CAHBLTOIlI
=
(
CAHBLTOlII
[
11
]
&
(
!
CAHBLTl
[
11
]
)
)
;
assign
CAHBLTIIlI
=
(
CAHBLTOlII
[
12
]
&
(
!
CAHBLTl
[
12
]
)
)
;
assign
CAHBLTlIlI
=
(
CAHBLTOlII
[
13
]
&
(
!
CAHBLTl
[
13
]
)
)
;
assign
CAHBLTOllI
=
(
CAHBLTOlII
[
14
]
&
(
!
CAHBLTl
[
14
]
)
)
;
assign
CAHBLTIllI
=
(
CAHBLTOlII
[
15
]
&
(
!
CAHBLTl
[
15
]
)
)
;
assign
CAHBLTlllI
=
(
CAHBLTOlII
[
16
]
&
(
!
CAHBLTl
[
16
]
)
)
;
always
@
(
posedge
HCLK
or
negedge
HRESETN
)
begin
if
(
!
HRESETN
)
begin
CAHBLTO1OI
<=
32
'h
0
;
CAHBLTI1OI
<=
1
'b
0
;
CAHBLTl1OI
<=
3
'b
0
;
CAHBLTOOII
<=
1
'b
0
;
CAHBLTIOII
<=
1
'b
0
;
end
else
begin
if
(
CAHBLTl0OI
)
begin
CAHBLTO1OI
<=
CAHBLTlO1
;
CAHBLTI1OI
<=
CAHBLTOI1
;
CAHBLTl1OI
<=
CAHBLTII1
;
CAHBLTOOII
<=
CAHBLTlI1
;
CAHBLTIOII
<=
CAHBLTOl1
;
end
end
end
always
@(*)
begin
if
(
CAHBLTO0OI
==
1
'b
0
)
begin
CAHBLTllOI
=
CAHBLTlO1
;
CAHBLTl11
=
CAHBLTOI1
;
CAHBLTOOOI
=
CAHBLTII1
;
CAHBLTIOOI
=
CAHBLTlI1
;
CAHBLTlOOI
=
CAHBLTOl1
;
end
else
begin
CAHBLTllOI
=
CAHBLTO1OI
;
CAHBLTl11
=
CAHBLTI1OI
;
CAHBLTOOOI
=
CAHBLTl1OI
;
CAHBLTIOOI
=
CAHBLTOOII
;
CAHBLTlOOI
=
CAHBLTIOII
;
end
end
CAHBLTO
#
(
.MEMSPACE
(
MEMSPACE
)
,
.CAHBLTI
(
CAHBLTI
)
,
.CAHBLTl
(
CAHBLTl
)
)
CAHBLTI0lI
(
.CAHBLTOI
(
CAHBLTllOI
)
,
.CAHBLTII
(
CAHBLTII
)
,
.CAHBLTlI
(
CAHBLTIIII
[
16
:
0
]
)
,
.CAHBLTOl
(
CAHBLTI11
[
31
:
0
]
)
)
;
always
@(*)
begin
if
(
CAHBLTIOOI
)
begin
CAHBLTlIII
=
CAHBLTIIII
;
end
else
begin
CAHBLTlIII
=
CAHBLTIlOI
;
end
end
always
@
(
posedge
HCLK
or
negedge
HRESETN
)
begin
if
(
!
HRESETN
)
CAHBLTOlII
<=
CAHBLTIlOI
;
else
if
(
CAHBLTlIOI
)
CAHBLTOlII
<=
CAHBLTlIII
;
end
always
@(*)
begin
casez
(
CAHBLTOlII
[
16
:
0
]
)
17
'b
????????????????1
:
begin
if
(
CAHBLTl
[
0
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
0
]
;
CAHBLTIl1
=
CAHBLTO11
[
0
]
;
CAHBLTll1
=
HRDATA_S0
;
CAHBLTlIOI
=
HREADYOUT_S0
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
???????????????1?
:
begin
if
(
CAHBLTl
[
1
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
1
]
;
CAHBLTIl1
=
CAHBLTO11
[
1
]
;
CAHBLTll1
=
HRDATA_S1
;
CAHBLTlIOI
=
HREADYOUT_S1
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
??????????????1??
:
begin
if
(
CAHBLTl
[
2
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
2
]
;
CAHBLTIl1
=
CAHBLTO11
[
2
]
;
CAHBLTll1
=
HRDATA_S2
;
CAHBLTlIOI
=
HREADYOUT_S2
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
?????????????1???
:
begin
if
(
CAHBLTl
[
3
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
3
]
;
CAHBLTIl1
=
CAHBLTO11
[
3
]
;
CAHBLTll1
=
HRDATA_S3
;
CAHBLTlIOI
=
HREADYOUT_S3
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
????????????1????
:
begin
if
(
CAHBLTl
[
4
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
4
]
;
CAHBLTIl1
=
CAHBLTO11
[
4
]
;
CAHBLTll1
=
HRDATA_S4
;
CAHBLTlIOI
=
HREADYOUT_S4
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
???????????1?????
:
begin
if
(
CAHBLTl
[
5
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
5
]
;
CAHBLTIl1
=
CAHBLTO11
[
5
]
;
CAHBLTll1
=
HRDATA_S5
;
CAHBLTlIOI
=
HREADYOUT_S5
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
??????????1??????
:
begin
if
(
CAHBLTl
[
6
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
6
]
;
CAHBLTIl1
=
CAHBLTO11
[
6
]
;
CAHBLTll1
=
HRDATA_S6
;
CAHBLTlIOI
=
HREADYOUT_S6
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
?????????1???????
:
begin
if
(
CAHBLTl
[
7
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
7
]
;
CAHBLTIl1
=
CAHBLTO11
[
7
]
;
CAHBLTll1
=
HRDATA_S7
;
CAHBLTlIOI
=
HREADYOUT_S7
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
????????1????????
:
begin
if
(
CAHBLTl
[
8
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
8
]
;
CAHBLTIl1
=
CAHBLTO11
[
8
]
;
CAHBLTll1
=
HRDATA_S8
;
CAHBLTlIOI
=
HREADYOUT_S8
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
???????1?????????
:
begin
if
(
CAHBLTl
[
9
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
9
]
;
CAHBLTIl1
=
CAHBLTO11
[
9
]
;
CAHBLTll1
=
HRDATA_S9
;
CAHBLTlIOI
=
HREADYOUT_S9
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
??????1??????????
:
begin
if
(
CAHBLTl
[
10
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
10
]
;
CAHBLTIl1
=
CAHBLTO11
[
10
]
;
CAHBLTll1
=
HRDATA_S10
;
CAHBLTlIOI
=
HREADYOUT_S10
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
?????1???????????
:
begin
if
(
CAHBLTl
[
11
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
11
]
;
CAHBLTIl1
=
CAHBLTO11
[
11
]
;
CAHBLTll1
=
HRDATA_S11
;
CAHBLTlIOI
=
HREADYOUT_S11
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
????1????????????
:
begin
if
(
CAHBLTl
[
12
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
12
]
;
CAHBLTIl1
=
CAHBLTO11
[
12
]
;
CAHBLTll1
=
HRDATA_S12
;
CAHBLTlIOI
=
HREADYOUT_S12
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
???1?????????????
:
begin
if
(
CAHBLTl
[
13
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
13
]
;
CAHBLTIl1
=
CAHBLTO11
[
13
]
;
CAHBLTll1
=
HRDATA_S13
;
CAHBLTlIOI
=
HREADYOUT_S13
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
??1??????????????
:
begin
if
(
CAHBLTl
[
14
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
14
]
;
CAHBLTIl1
=
CAHBLTO11
[
14
]
;
CAHBLTll1
=
HRDATA_S14
;
CAHBLTlIOI
=
HREADYOUT_S14
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
?1???????????????
:
begin
if
(
CAHBLTl
[
15
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
15
]
;
CAHBLTIl1
=
CAHBLTO11
[
15
]
;
CAHBLTll1
=
HRDATA_S15
;
CAHBLTlIOI
=
HREADYOUT_S15
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
17
'b
1????????????????
:
begin
if
(
CAHBLTl
[
16
]
)
begin
CAHBLTO0lI
=
CAHBLTl01
[
16
]
;
CAHBLTIl1
=
CAHBLTO11
[
16
]
;
CAHBLTll1
=
HRDATA_S16
;
CAHBLTlIOI
=
HREADYOUT_S16
;
end
else
begin
CAHBLTO0lI
=
CAHBLTOll
;
CAHBLTIl1
=
CAHBLTIll
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
CAHBLTOll
;
end
end
default
:
begin
CAHBLTO0lI
=
1
'b
1
;
CAHBLTIl1
=
1
'b
0
;
CAHBLTll1
=
32
'h
0
;
CAHBLTlIOI
=
1
'b
1
;
end
endcase
end
always
@(*)
begin
CAHBLTl0OI
=
1
'b
0
;
CAHBLTI0OI
=
1
'b
0
;
case
(
CAHBLTlOII
)
CAHBLTlll
:
begin
if
(
CAHBLTlI1
&&
CAHBLTO01
&&
(
(
CAHBLTIIII
[
0
]
&&
!
CAHBLTI01
[
0
]
)
||
(
CAHBLTIIII
[
1
]
&&
!
CAHBLTI01
[
1
]
)
||
(
CAHBLTIIII
[
2
]
&&
!
CAHBLTI01
[
2
]
)
||
(
CAHBLTIIII
[
3
]
&&
!
CAHBLTI01
[
3
]
)
||
(
CAHBLTIIII
[
4
]
&&
!
CAHBLTI01
[
4
]
)
||
(
CAHBLTIIII
[
5
]
&&
!
CAHBLTI01
[
5
]
)
||
(
CAHBLTIIII
[
6
]
&&
!
CAHBLTI01
[
6
]
)
||
(
CAHBLTIIII
[
7
]
&&
!
CAHBLTI01
[
7
]
)
||
(
CAHBLTIIII
[
8
]
&&
!
CAHBLTI01
[
8
]
)
||
(
CAHBLTIIII
[
9
]
&&
!
CAHBLTI01
[
9
]
)
||
(
CAHBLTIIII
[
10
]
&&
!
CAHBLTI01
[
10
]
)
||
(
CAHBLTIIII
[
11
]
&&
!
CAHBLTI01
[
11
]
)
||
(
CAHBLTIIII
[
12
]
&&
!
CAHBLTI01
[
12
]
)
||
(
CAHBLTIIII
[
13
]
&&
!
CAHBLTI01
[
13
]
)
||
(
CAHBLTIIII
[
14
]
&&
!
CAHBLTI01
[
14
]
)
||
(
CAHBLTIIII
[
15
]
&&
!
CAHBLTI01
[
15
]
)
||
(
CAHBLTIIII
[
16
]
&&
!
CAHBLTI01
[
16
]
)
)
)
begin
CAHBLTl0OI
=
1
'b
1
;
CAHBLTI0OI
=
1
'b
1
;
CAHBLTOIII
=
CAHBLTOlOI
;
end
else
CAHBLTOIII
=
CAHBLTlll
;
end
CAHBLTOlOI
:
begin
if
(
(
CAHBLTIIII
[
0
]
&&
CAHBLTI01
[
0
]
)
||
(
CAHBLTIIII
[
1
]
&&
CAHBLTI01
[
1
]
)
||
(
CAHBLTIIII
[
2
]
&&
CAHBLTI01
[
2
]
)
||
(
CAHBLTIIII
[
3
]
&&
CAHBLTI01
[
3
]
)
||
(
CAHBLTIIII
[
4
]
&&
CAHBLTI01
[
4
]
)
||
(
CAHBLTIIII
[
5
]
&&
CAHBLTI01
[
5
]
)
||
(
CAHBLTIIII
[
6
]
&&
CAHBLTI01
[
6
]
)
||
(
CAHBLTIIII
[
7
]
&&
CAHBLTI01
[
7
]
)
||
(
CAHBLTIIII
[
8
]
&&
CAHBLTI01
[
8
]
)
||
(
CAHBLTIIII
[
9
]
&&
CAHBLTI01
[
9
]
)
||
(
CAHBLTIIII
[
10
]
&&
CAHBLTI01
[
10
]
)
||
(
CAHBLTIIII
[
11
]
&&
CAHBLTI01
[
11
]
)
||
(
CAHBLTIIII
[
12
]
&&
CAHBLTI01
[
12
]
)
||
(
CAHBLTIIII
[
13
]
&&
CAHBLTI01
[
13
]
)
||
(
CAHBLTIIII
[
14
]
&&
CAHBLTI01
[
14
]
)
||
(
CAHBLTIIII
[
15
]
&&
CAHBLTI01
[
15
]
)
||
(
CAHBLTIIII
[
16
]
&&
CAHBLTI01
[
16
]
)
)
CAHBLTOIII
=
CAHBLTlll
;
else
begin
CAHBLTI0OI
=
1
'b
1
;
CAHBLTOIII
=
CAHBLTOlOI
;
end
end
default
:
CAHBLTOIII
=
CAHBLTlll
;
endcase
end
always
@
(
posedge
HCLK
or
negedge
HRESETN
)
begin
if
(
!
HRESETN
)
begin
CAHBLTlOII
<=
CAHBLTlll
;
CAHBLTO0OI
<=
1
'b
0
;
end
else
begin
CAHBLTlOII
<=
CAHBLTOIII
;
CAHBLTO0OI
<=
CAHBLTI0OI
;
end
end
CAHBLTIIl
CAHBLTl0lI
(
.HCLK
(
HCLK
)
,
.HRESETN
(
HRESETN
)
,
.CAHBLTlIl
(
CAHBLTlIl
)
,
.CAHBLTOll
(
CAHBLTOll
)
,
.CAHBLTIll
(
CAHBLTIll
)
)
;
assign
CAHBLTO01
=
CAHBLTO0lI
;
endmodule
