/*******************************************************************************
 * (c) Copyright 2008 Actel Corporation.  All rights reserved.
 * 
 * Cortex-M1 example linker script: Boot from Actel CoreAHBNVM Flash memory
 *
 * This version expects startup to boot from flash ROM and copy code to RAM,
 * then execute code from RAM.
 *
 * To use this linker script:
 *   1) First bring in the HAL support files which are required for correct
 *      use of the linker script:
 *  1a) Right-click on your project and select "Import...".
 *  1b) Select General, then File System, and click Next>.
 *  1c) Click on Browse..., navigate your way to the SoftConsole install
 *      directory and select
 *          src\Cortex-M1\Cortex-M1_hal
 *      Select the "Create Selected Folders Only" radio button in Import window,
 *      then click OK.
 *  1d) Click to add a checkmark next to the 'Cortex-M1_hal' directory.
 *  1e) Click Finish to make the hal directory of sources become part of
 *       your project.
 *   2) Copy or import this linker script into your project.  
 *      Double-click on the new copy in your project.
 *      Change the base address (ORIGIN) and size (LENGTH) of each
 *      of your flash memory (named 'rom') and your SRAM (named 'ram'),
 *      if they are different from the current default values.
 *      NOTE: make sure you also change RAM_START_ADDRESS and RAM_SIZE
 *            which come after the MEMORY section; both locations need
 *            to be given the correct values
 *   3) in the SoftConsole IDE, in the "Project Explorer" on the left-hand
 *      side, select your project
 *   4) right-click on Properties
 *   5) open "C/C++ Build" and select Settings
 *   6) under the "Tool settings" tab, open "GNU C Linker"
 *   7) select Miscellaneous
 *   8) in the "Linker flags" box, type
 *         -T../boot-from-actel-coreahbnvm.ld
 *       ** NOTE: Do not add it by clicking '+' to make it be provided
 *                as an '-Xlinker ...' option; this will not make the
 *                compiler use your linker script properly.
 *   9) In addition, your project will need to find the headers required for
 *      compiling the HAL support code.  Still on the Tool Settings tab,
 *      under "GNU C Compiler" select Directories.
 *  10a) Click on the '+' icon, and an "Add directory path" dialog box will appear.
 *  10b) Click on the "Workspace..." button.
 *  10c) Click on the '+' to expand your project, select the 'hal' folder,
 *      and click OK.
 *  10d) In the "Add directory path" dialog, click OK.
 *  11a) Click on the '+' icon, and an "Add directory path" dialog box will appear.
 *  11b) Click on the "Workspace..." button.
 *  11c) Click on the '+' to expand your project, click on the '+' to expand the
 *       'hal' folder, select the 'CortexM1' folder, and click OK.
 *  11d) In the "Add directory path" dialog, click OK.
 *  12a) Click on the '+' icon, and an "Add directory path" dialog box will appear.
 *  12b) Click on the "Workspace..." button.
 *  12c) Click on the '+' to expand your project, click on the '+' to expand the
 *       'hal' folder, click on the '+' to expand the 'CortexM1' folder,
 *       select the 'GNU' folder, and click OK.
 *  12d) In the "Add directory path" dialog, click OK.
 *  13) click Apply and OK.
 *  14) In the "Project Explorer" on the left-hand side, select your project
 *  15) Right-click on the project and click "Clean Project".
 *
 * Your project will recompile, and the executable will be linked using
 * this linker script.  A memory map will be generated which is used by
 * the SoftConsole debug sprite to properly handle the location and size
 * of memory on your target.
 *
 * When you start a debug session ( Run -> Open Debug Dialog... and double-click
 * on Actel Cortex-M1), the sprite will be started automatically by GDB to make it
 * possible to talk to the hardware.  By marking the memory region as 'rom' above,
 * the debugger and the sprite will take care of actually doing the flash
 * programming for you when SoftConsole gives the debugger the 'load' command.
 */
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm",
	      "elf32-littlearm")
GROUP(-lc -lrdimon -lgcc)
OUTPUT_ARCH(arm)
ENTRY(_start)
SEARCH_DIR(.)
__DYNAMIC  =  0;

/*******************************************************************************
 * Start of board customization.
 *******************************************************************************/
MEMORY
{
  /*
   * WARNING: The words "SOFTCONSOLE", "FLASH", and "USE", the colon ":", and
   *          the name of the type of flash memory are all in a specific order.
   *          Please do not modify that comment line, in order to ensure
   *          debugging of your application will use the flash memory correctly.
   */

  /* SOFTCONSOLE FLASH USE: actel-coreahbnvm */
  rom (rx)  : ORIGIN = 0x00000000, LENGTH = 256k
  
  /* Normal SRAM */
  ram (rwx) : ORIGIN = 0x18000000, LENGTH = 1M
}

RAM_START_ADDRESS = 0x18000000;	/* Must be the same value MEMORY region ram ORIGIN above. */
RAM_SIZE = 1M;					/* Must be the same value MEMORY region ram LENGTH above. */
MAIN_STACK_SIZE = 256k;			/* Cortex main stack size. */
PROCESS_STACK_SIZE	= 64k;		/* Cortex process stack size (only available with OS extensions).*/

/*******************************************************************************
 * End of board customization.
 *******************************************************************************/
 
PROVIDE (__main_stack_start = RAM_START_ADDRESS + RAM_SIZE);
PROVIDE (__process_stack_start = __main_stack_start - MAIN_STACK_SIZE);

SECTIONS
{
  .reset :
  {
    *(.isr_vector)
    *sys_boot.o(.text)
    . = ALIGN(0x4);
  } >rom
  
  .text :
  {
    CREATE_OBJECT_SYMBOLS
    __text_load = LOADADDR(.text);
    __text_start = .;
    
    *(.text .text.* .gnu.linkonce.t.*)
    *(.plt)
    *(.gnu.warning)
    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)

    . = ALIGN(0x4);
    /* These are for running static constructors and destructors under ELF.  */
    KEEP (*crtbegin.o(.ctors))
    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
    KEEP (*(SORT(.ctors.*)))
    KEEP (*crtend.o(.ctors))
    KEEP (*crtbegin.o(.dtors))
    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
    KEEP (*(SORT(.dtors.*)))
    KEEP (*crtend.o(.dtors))

    *(.rodata .rodata.* .gnu.linkonce.r.*)

    *(.ARM.extab* .gnu.linkonce.armextab.*)
    *(.gcc_except_table) 
    *(.eh_frame_hdr)
    *(.eh_frame)

    KEEP (*(.init))
    KEEP (*(.fini))

    PROVIDE_HIDDEN (__preinit_array_start = .);
    KEEP (*(.preinit_array))
    PROVIDE_HIDDEN (__preinit_array_end = .);
    PROVIDE_HIDDEN (__init_array_start = .);
    KEEP (*(SORT(.init_array.*)))
    KEEP (*(.init_array))
    PROVIDE_HIDDEN (__init_array_end = .);
    PROVIDE_HIDDEN (__fini_array_start = .);
    KEEP (*(.fini_array))
    KEEP (*(SORT(.fini_array.*)))
    PROVIDE_HIDDEN (__fini_array_end = .);
  } >ram AT>rom
  /* .ARM.exidx is sorted, so has to go in its own output section.  */
   __exidx_start = .;
  .ARM.exidx :
  {
    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
  } >ram AT>rom
  __exidx_end = .;
  _etext = .;

  .data :
  {
    __data_load = LOADADDR(.data);
    __data_start = .;
    KEEP(*(.jcr))
    *(.got.plt) *(.got)
    *(.shdata)
    *(.data .data.* .gnu.linkonce.d.*)
    . = ALIGN (4);
  	_edata = .;
  } >ram AT>rom

  .bss :
  {
    __bss_start__ = . ;
    *(.shbss)
    *(.bss .bss.* .gnu.linkonce.b.*)
    *(COMMON)
    . = ALIGN (8);
    __bss_end__ = .;
    _end = .;
    __end = _end;
    PROVIDE(end = .);
  } >ram AT>rom

  .stab 0 (NOLOAD) :
  {
    *(.stab)
  }

  .stabstr 0 (NOLOAD) :
  {
    *(.stabstr)
  }
  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the beginning
     of the section so we begin them at 0.  */
  /* DWARF 1 */
  .debug          0 : { *(.debug) }
  .line           0 : { *(.line) }
  /* GNU DWARF 1 extensions */
  .debug_srcinfo  0 : { *(.debug_srcinfo) }
  .debug_sfnames  0 : { *(.debug_sfnames) }
  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }
  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
  /* SGI/MIPS DWARF 2 extensions */
  .debug_weaknames 0 : { *(.debug_weaknames) }
  .debug_funcnames 0 : { *(.debug_funcnames) }
  .debug_typenames 0 : { *(.debug_typenames) }
  .debug_varnames  0 : { *(.debug_varnames) }
  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
  /DISCARD/ : { *(.note.GNU-stack)  }
}
