
test:     file format elf32-littlearm

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .reset        00000120  00000000  00000000  00008000  2**3
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .text         00001300  18000000  00000120  00010000  2**2
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .data         00000850  18001300  00001420  00011300  2**3
                  CONTENTS, ALLOC, LOAD, DATA
  3 .bss          00000070  18001b50  00001c70  00011b50  2**2
                  ALLOC
  4 .comment      00000126  00000000  00000000  00011b50  2**0
                  CONTENTS, READONLY
  5 .debug_aranges 000000e0  00000000  00000000  00011c76  2**0
                  CONTENTS, READONLY, DEBUGGING
  6 .debug_pubnames 0000027c  00000000  00000000  00011d56  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_info   00000fdd  00000000  00000000  00011fd2  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_abbrev 00000443  00000000  00000000  00012faf  2**0
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_line   00000de0  00000000  00000000  000133f2  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_frame  000007d4  00000000  00000000  000141d4  2**2
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_str    000005f2  00000000  00000000  000149a8  2**0
                  CONTENTS, READONLY, DEBUGGING
 12 .debug_loc    000006f6  00000000  00000000  00014f9a  2**0
                  CONTENTS, READONLY, DEBUGGING
 13 .debug_macinfo 000110af  00000000  00000000  00015690  2**0
                  CONTENTS, READONLY, DEBUGGING
 14 .ARM.attributes 00000027  00000000  00000000  0002673f  2**0
                  CONTENTS, READONLY

Disassembly of section .reset:

00000000 <vector_table>:
   0:	18100000 	ldmdane	r0, {}
   4:	00000061 	andeq	r0, r0, r1, rrx
   8:	18000129 	stmdane	r0, {r0, r3, r5, r8}
   c:	18000131 	stmdane	r0, {r0, r4, r5, r8}
	...
  2c:	18000139 	stmdane	r0, {r0, r3, r4, r5, r8}
	...
  38:	18000141 	stmdane	r0, {r0, r6, r8}
	...

00000060 <_start>:

/*------------------------------------------------------------------------------
 * _start() function called invoked on power up and warm reset.
 */
void _start( void)
{
  60:	b580      	push	{r7, lr}
  62:	b088      	sub	sp, #32
  64:	af00      	add	r7, sp, #0
	/*
	 * Copy text section if required (copy executable from LMA to VMA).
	 */
	{
		unsigned int * text_lma = &__text_load;
  66:	4b24      	ldr	r3, [pc, #144]	; (f8 <_start+0x98>)
  68:	603b      	str	r3, [r7, #0]
		unsigned int * end_text_vma = &_etext;
  6a:	4b24      	ldr	r3, [pc, #144]	; (fc <_start+0x9c>)
  6c:	607b      	str	r3, [r7, #4]
		unsigned int * text_vma = &__text_start;
  6e:	4b24      	ldr	r3, [pc, #144]	; (100 <_start+0xa0>)
  70:	60bb      	str	r3, [r7, #8]
		
		if ( text_vma != text_lma)
  72:	68ba      	ldr	r2, [r7, #8]
  74:	683b      	ldr	r3, [r7, #0]
  76:	429a      	cmp	r2, r3
  78:	d00e      	beq.n	98 <_start+0x38>
		{
			while ( text_vma <= end_text_vma)
  7a:	e009      	b.n	90 <_start+0x30>
			{
				*text_vma++ = *text_lma++;
  7c:	683b      	ldr	r3, [r7, #0]
  7e:	681a      	ldr	r2, [r3, #0]
  80:	68bb      	ldr	r3, [r7, #8]
  82:	601a      	str	r2, [r3, #0]
  84:	68bb      	ldr	r3, [r7, #8]
  86:	3304      	adds	r3, #4
  88:	60bb      	str	r3, [r7, #8]
  8a:	683b      	ldr	r3, [r7, #0]
  8c:	3304      	adds	r3, #4
  8e:	603b      	str	r3, [r7, #0]
		unsigned int * end_text_vma = &_etext;
		unsigned int * text_vma = &__text_start;
		
		if ( text_vma != text_lma)
		{
			while ( text_vma <= end_text_vma)
  90:	68ba      	ldr	r2, [r7, #8]
  92:	687b      	ldr	r3, [r7, #4]
  94:	429a      	cmp	r2, r3
  96:	d9f1      	bls.n	7c <_start+0x1c>

	/*
	 * Copy data section if required (initialised variables).
	 */
	{
		unsigned int * data_lma = &__data_load;
  98:	4b1a      	ldr	r3, [pc, #104]	; (104 <_start+0xa4>)
  9a:	60fb      	str	r3, [r7, #12]
		unsigned int * end_data_vma = &_edata;
  9c:	4b1a      	ldr	r3, [pc, #104]	; (108 <_start+0xa8>)
  9e:	613b      	str	r3, [r7, #16]
		unsigned int * data_vma = &__data_start;
  a0:	4b1a      	ldr	r3, [pc, #104]	; (10c <_start+0xac>)
  a2:	617b      	str	r3, [r7, #20]
		
		if ( data_vma != data_lma )
  a4:	697a      	ldr	r2, [r7, #20]
  a6:	68fb      	ldr	r3, [r7, #12]
  a8:	429a      	cmp	r2, r3
  aa:	d00e      	beq.n	ca <_start+0x6a>
		{
			while ( data_vma <= end_data_vma )
  ac:	e009      	b.n	c2 <_start+0x62>
			{
				*data_vma++ = *data_lma++;
  ae:	68fb      	ldr	r3, [r7, #12]
  b0:	681a      	ldr	r2, [r3, #0]
  b2:	697b      	ldr	r3, [r7, #20]
  b4:	601a      	str	r2, [r3, #0]
  b6:	697b      	ldr	r3, [r7, #20]
  b8:	3304      	adds	r3, #4
  ba:	617b      	str	r3, [r7, #20]
  bc:	68fb      	ldr	r3, [r7, #12]
  be:	3304      	adds	r3, #4
  c0:	60fb      	str	r3, [r7, #12]
		unsigned int * end_data_vma = &_edata;
		unsigned int * data_vma = &__data_start;
		
		if ( data_vma != data_lma )
		{
			while ( data_vma <= end_data_vma )
  c2:	697a      	ldr	r2, [r7, #20]
  c4:	693b      	ldr	r3, [r7, #16]
  c6:	429a      	cmp	r2, r3
  c8:	d9f1      	bls.n	ae <_start+0x4e>
	
	/*
	 * Zero out the bss section (set non-initialised variables to 0). 
	 */
	{
		unsigned int * bss = &__bss_start__;
  ca:	4b11      	ldr	r3, [pc, #68]	; (110 <_start+0xb0>)
  cc:	61bb      	str	r3, [r7, #24]
		unsigned int * bss_end = &__bss_end__;
  ce:	4b11      	ldr	r3, [pc, #68]	; (114 <_start+0xb4>)
  d0:	61fb      	str	r3, [r7, #28]
		
		if ( bss_end > bss)
  d2:	69fa      	ldr	r2, [r7, #28]
  d4:	69bb      	ldr	r3, [r7, #24]
  d6:	429a      	cmp	r2, r3
  d8:	d90a      	bls.n	f0 <_start+0x90>
		{
			while ( bss <= bss_end )
  da:	e005      	b.n	e8 <_start+0x88>
			{
				*bss++ = 0;
  dc:	69bb      	ldr	r3, [r7, #24]
  de:	2200      	movs	r2, #0
  e0:	601a      	str	r2, [r3, #0]
  e2:	69bb      	ldr	r3, [r7, #24]
  e4:	3304      	adds	r3, #4
  e6:	61bb      	str	r3, [r7, #24]
		unsigned int * bss = &__bss_start__;
		unsigned int * bss_end = &__bss_end__;
		
		if ( bss_end > bss)
		{
			while ( bss <= bss_end )
  e8:	69ba      	ldr	r2, [r7, #24]
  ea:	69fb      	ldr	r3, [r7, #28]
  ec:	429a      	cmp	r2, r3
  ee:	d9f5      	bls.n	dc <_start+0x7c>
	}
	
	/*
	 * Call main.
	 */
	main();
  f0:	f000 e812 	blx	118 <__main_veneer>
	 * We should never return from _start().
	 */
	while( 1 )
	{
		;
	}
  f4:	e7fe      	b.n	f4 <_start+0x94>
  f6:	46c0      	nop			; (mov r8, r8)
  f8:	00000120 	.word	0x00000120
  fc:	18001300 	.word	0x18001300
 100:	18000000 	.word	0x18000000
 104:	00001420 	.word	0x00001420
 108:	18001b50 	.word	0x18001b50
 10c:	18001300 	.word	0x18001300
 110:	18001b50 	.word	0x18001b50
 114:	18001bc0 	.word	0x18001bc0

00000118 <__main_veneer>:
 118:	e51ff004 	ldr	pc, [pc, #-4]	; 11c <__main_veneer+0x4>
 11c:	18000061 	.word	0x18000061

Disassembly of section .text:

18000000 <__do_global_dtors_aux>:
18000000:	b510      	push	{r4, lr}
18000002:	4c06      	ldr	r4, [pc, #24]	; (1800001c <__do_global_dtors_aux+0x1c>)
18000004:	7823      	ldrb	r3, [r4, #0]
18000006:	2b00      	cmp	r3, #0
18000008:	d107      	bne.n	1800001a <__do_global_dtors_aux+0x1a>
1800000a:	4805      	ldr	r0, [pc, #20]	; (18000020 <__do_global_dtors_aux+0x20>)
1800000c:	2800      	cmp	r0, #0
1800000e:	d002      	beq.n	18000016 <__do_global_dtors_aux+0x16>
18000010:	4804      	ldr	r0, [pc, #16]	; (18000024 <__do_global_dtors_aux+0x24>)
18000012:	e000      	b.n	18000016 <__do_global_dtors_aux+0x16>
18000014:	bf00      	nop
18000016:	2101      	movs	r1, #1
18000018:	7021      	strb	r1, [r4, #0]
1800001a:	bd10      	pop	{r4, pc}
1800001c:	18001b50 	.word	0x18001b50
18000020:	00000000 	.word	0x00000000
18000024:	180012dc 	.word	0x180012dc

18000028 <frame_dummy>:
18000028:	b508      	push	{r3, lr}
1800002a:	4b08      	ldr	r3, [pc, #32]	; (1800004c <frame_dummy+0x24>)
1800002c:	2b00      	cmp	r3, #0
1800002e:	d003      	beq.n	18000038 <frame_dummy+0x10>
18000030:	4807      	ldr	r0, [pc, #28]	; (18000050 <frame_dummy+0x28>)
18000032:	4908      	ldr	r1, [pc, #32]	; (18000054 <frame_dummy+0x2c>)
18000034:	e000      	b.n	18000038 <frame_dummy+0x10>
18000036:	bf00      	nop
18000038:	4807      	ldr	r0, [pc, #28]	; (18000058 <frame_dummy+0x30>)
1800003a:	6801      	ldr	r1, [r0, #0]
1800003c:	2900      	cmp	r1, #0
1800003e:	d003      	beq.n	18000048 <frame_dummy+0x20>
18000040:	4b06      	ldr	r3, [pc, #24]	; (1800005c <frame_dummy+0x34>)
18000042:	2b00      	cmp	r3, #0
18000044:	d000      	beq.n	18000048 <frame_dummy+0x20>
18000046:	4798      	blx	r3
18000048:	bd08      	pop	{r3, pc}
1800004a:	46c0      	nop			; (mov r8, r8)
1800004c:	00000000 	.word	0x00000000
18000050:	180012dc 	.word	0x180012dc
18000054:	18001b54 	.word	0x18001b54
18000058:	18001300 	.word	0x18001300
1800005c:	00000000 	.word	0x00000000

18000060 <main>:
#include "hal.h"

#define BAUD_VALUE_57600    42

int main()
{
18000060:	b580      	push	{r7, lr}
18000062:	af00      	add	r7, sp, #0
//printf("hey I am working man!!");
	while(1);
18000064:	e7fe      	b.n	18000064 <main+0x4>
18000066:	46c0      	nop			; (mov r8, r8)

18000068 <NVIC_init>:
/***************************************************************************//**
 * NVIC_init()
 * See "cortex_nvic.h" for details of how to use this function.
 */
void NVIC_init( void )
{
18000068:	b580      	push	{r7, lr}
1800006a:	af00      	add	r7, sp, #0
    /* Disable external interrupts. */
	HAL_set_32bit_reg(NVIC_BASE_ADDR, CLRENA, DISABLE_INTERRUPTS );
1800006c:	4a07      	ldr	r2, [pc, #28]	; (1800008c <NVIC_init+0x24>)
1800006e:	2301      	movs	r3, #1
18000070:	425b      	negs	r3, r3
18000072:	1c10      	adds	r0, r2, #0
18000074:	1c19      	adds	r1, r3, #0
18000076:	f000 f885 	bl	18000184 <HW_set_32bit_reg>

    /* Clear pending external interrupts. */
    HAL_set_32bit_reg(NVIC_BASE_ADDR, CLRPEND, CLEAR_INTERRUPTS );
1800007a:	4a05      	ldr	r2, [pc, #20]	; (18000090 <NVIC_init+0x28>)
1800007c:	2301      	movs	r3, #1
1800007e:	425b      	negs	r3, r3
18000080:	1c10      	adds	r0, r2, #0
18000082:	1c19      	adds	r1, r3, #0
18000084:	f000 f87e 	bl	18000184 <HW_set_32bit_reg>
}
18000088:	46bd      	mov	sp, r7
1800008a:	bd80      	pop	{r7, pc}
1800008c:	e000e180 	.word	0xe000e180
18000090:	e000e280 	.word	0xe000e280

18000094 <NVIC_set_priority>:
void NVIC_set_priority
(
	uint32_t interrupt_nb,
	uint32_t priority_level
)
{
18000094:	b580      	push	{r7, lr}
18000096:	b082      	sub	sp, #8
18000098:	af00      	add	r7, sp, #0
1800009a:	6078      	str	r0, [r7, #4]
1800009c:	6039      	str	r1, [r7, #0]
}
1800009e:	46bd      	mov	sp, r7
180000a0:	b002      	add	sp, #8
180000a2:	bd80      	pop	{r7, pc}

180000a4 <NVIC_enable_interrupt>:
/***************************************************************************//**
 * NVIC_enable_interrupt()
 * See "cortex_nvic.h" for details of how to use this function.
 */
void NVIC_enable_interrupt( uint32_t interrupt_nb )
{
180000a4:	b580      	push	{r7, lr}
180000a6:	b084      	sub	sp, #16
180000a8:	af00      	add	r7, sp, #0
180000aa:	6078      	str	r0, [r7, #4]
    uint32_t int_mask = 1 << interrupt_nb;
180000ac:	687b      	ldr	r3, [r7, #4]
180000ae:	2201      	movs	r2, #1
180000b0:	1c11      	adds	r1, r2, #0
180000b2:	4099      	lsls	r1, r3
180000b4:	1c0b      	adds	r3, r1, #0
180000b6:	60fb      	str	r3, [r7, #12]
	HAL_set_32bit_reg( NVIC_BASE_ADDR, SETENA, int_mask );
180000b8:	4a04      	ldr	r2, [pc, #16]	; (180000cc <NVIC_enable_interrupt+0x28>)
180000ba:	68fb      	ldr	r3, [r7, #12]
180000bc:	1c10      	adds	r0, r2, #0
180000be:	1c19      	adds	r1, r3, #0
180000c0:	f000 f860 	bl	18000184 <HW_set_32bit_reg>
}
180000c4:	46bd      	mov	sp, r7
180000c6:	b004      	add	sp, #16
180000c8:	bd80      	pop	{r7, pc}
180000ca:	46c0      	nop			; (mov r8, r8)
180000cc:	e000e100 	.word	0xe000e100

180000d0 <NVIC_disable_interrupt>:
/***************************************************************************//**
 * NVIC_disable_interrupt()
 * See "cortex_nvic.h" for details of how to use this function.
 */
void NVIC_disable_interrupt( uint32_t interrupt_nb )
{
180000d0:	b580      	push	{r7, lr}
180000d2:	b084      	sub	sp, #16
180000d4:	af00      	add	r7, sp, #0
180000d6:	6078      	str	r0, [r7, #4]
    uint32_t int_mask = 1 << interrupt_nb;
180000d8:	687b      	ldr	r3, [r7, #4]
180000da:	2201      	movs	r2, #1
180000dc:	1c11      	adds	r1, r2, #0
180000de:	4099      	lsls	r1, r3
180000e0:	1c0b      	adds	r3, r1, #0
180000e2:	60fb      	str	r3, [r7, #12]
	HAL_set_32bit_reg(NVIC_BASE_ADDR, CLRENA, int_mask );
180000e4:	4a04      	ldr	r2, [pc, #16]	; (180000f8 <NVIC_disable_interrupt+0x28>)
180000e6:	68fb      	ldr	r3, [r7, #12]
180000e8:	1c10      	adds	r0, r2, #0
180000ea:	1c19      	adds	r1, r3, #0
180000ec:	f000 f84a 	bl	18000184 <HW_set_32bit_reg>
}
180000f0:	46bd      	mov	sp, r7
180000f2:	b004      	add	sp, #16
180000f4:	bd80      	pop	{r7, pc}
180000f6:	46c0      	nop			; (mov r8, r8)
180000f8:	e000e180 	.word	0xe000e180

180000fc <NVIC_clear_interrupt>:
/***************************************************************************//**
 * NVIC_clear_interrupt()
 * See "cortex_nvic.h" for details of how to use this function.
 */
void NVIC_clear_interrupt( uint32_t interrupt_nb )
{
180000fc:	b580      	push	{r7, lr}
180000fe:	b084      	sub	sp, #16
18000100:	af00      	add	r7, sp, #0
18000102:	6078      	str	r0, [r7, #4]
    uint32_t int_mask = 1 << interrupt_nb;
18000104:	687b      	ldr	r3, [r7, #4]
18000106:	2201      	movs	r2, #1
18000108:	1c11      	adds	r1, r2, #0
1800010a:	4099      	lsls	r1, r3
1800010c:	1c0b      	adds	r3, r1, #0
1800010e:	60fb      	str	r3, [r7, #12]
	HAL_set_32bit_reg(NVIC_BASE_ADDR, CLRPEND, int_mask );
18000110:	4a04      	ldr	r2, [pc, #16]	; (18000124 <NVIC_clear_interrupt+0x28>)
18000112:	68fb      	ldr	r3, [r7, #12]
18000114:	1c10      	adds	r0, r2, #0
18000116:	1c19      	adds	r1, r3, #0
18000118:	f000 f834 	bl	18000184 <HW_set_32bit_reg>
}
1800011c:	46bd      	mov	sp, r7
1800011e:	b004      	add	sp, #16
18000120:	bd80      	pop	{r7, pc}
18000122:	46c0      	nop			; (mov r8, r8)
18000124:	e000e280 	.word	0xe000e280

18000128 <NMI_Handler>:

 /***************************************************************************//**
 * Non Maskable Interrupt.
 */
__attribute__((__interrupt__)) void NMI_Handler( void )
{
18000128:	b580      	push	{r7, lr}
1800012a:	af00      	add	r7, sp, #0
	while( 1 )
	{
		;
	}
1800012c:	e7fe      	b.n	1800012c <NMI_Handler+0x4>
1800012e:	46c0      	nop			; (mov r8, r8)

18000130 <HardFault_Handler>:
 
/***************************************************************************//**
 * Hard Fault.
 */
__attribute__((__interrupt__)) void HardFault_Handler( void )
{
18000130:	b580      	push	{r7, lr}
18000132:	af00      	add	r7, sp, #0
	while( 1 )
	{
		;
	}
18000134:	e7fe      	b.n	18000134 <HardFault_Handler+0x4>
18000136:	46c0      	nop			; (mov r8, r8)

18000138 <SVC_Handler>:

/***************************************************************************//**
 * SVCall.
 */
__attribute__((__interrupt__)) void SVC_Handler( void )
{
18000138:	b580      	push	{r7, lr}
1800013a:	af00      	add	r7, sp, #0
	while( 1 )
	{
		;
	}
1800013c:	e7fe      	b.n	1800013c <SVC_Handler+0x4>
1800013e:	46c0      	nop			; (mov r8, r8)

18000140 <PendSV_Handler>:

/***************************************************************************//**
 * PendSV.
 */
__attribute__((__interrupt__)) void PendSV_Handler( void )
{
18000140:	b580      	push	{r7, lr}
18000142:	af00      	add	r7, sp, #0
	while( 1 )
	{
		;
	}
18000144:	e7fe      	b.n	18000144 <PendSV_Handler+0x4>
18000146:	46c0      	nop			; (mov r8, r8)

18000148 <HAL_disable_interrupts>:
18000148:	f3ef 8010 	mrs	r0, PRIMASK
1800014c:	b672      	cpsid	i
1800014e:	4770      	bx	lr

18000150 <HAL_restore_interrupts>:
18000150:	f380 8810 	msr	PRIMASK, r0
18000154:	4770      	bx	lr
	...

18000158 <HAL_assert_fail>:
void HAL_assert_fail
(
    const uint8_t * file_name,
    uint32_t line_no
)
{
18000158:	b580      	push	{r7, lr}
1800015a:	b086      	sub	sp, #24
1800015c:	af00      	add	r7, sp, #0
1800015e:	6078      	str	r0, [r7, #4]
18000160:	6039      	str	r1, [r7, #0]
    while(1)
    {
        volatile const uint8_t * assert_file = file_name;
18000162:	687b      	ldr	r3, [r7, #4]
18000164:	617b      	str	r3, [r7, #20]
        volatile uint32_t assert_line = line_no;
18000166:	683b      	ldr	r3, [r7, #0]
18000168:	613b      	str	r3, [r7, #16]
        volatile char dummy;
		volatile uint32_t i_dummy;
		
		/* following lines to avoid compiler warnings: */
        dummy = *assert_file;
1800016a:	697b      	ldr	r3, [r7, #20]
1800016c:	781b      	ldrb	r3, [r3, #0]
1800016e:	b2da      	uxtb	r2, r3
18000170:	1c3b      	adds	r3, r7, #0
18000172:	330f      	adds	r3, #15
18000174:	701a      	strb	r2, [r3, #0]
		i_dummy = assert_line;
18000176:	693b      	ldr	r3, [r7, #16]
18000178:	60bb      	str	r3, [r7, #8]
		i_dummy++;
1800017a:	68bb      	ldr	r3, [r7, #8]
1800017c:	3301      	adds	r3, #1
1800017e:	60bb      	str	r3, [r7, #8]
    }
18000180:	e7ef      	b.n	18000162 <HAL_assert_fail+0xa>
18000182:	46c0      	nop			; (mov r8, r8)

18000184 <HW_set_32bit_reg>:
18000184:	6001      	str	r1, [r0, #0]
18000186:	4770      	bx	lr

18000188 <HW_get_32bit_reg>:
18000188:	6800      	ldr	r0, [r0, #0]
1800018a:	4770      	bx	lr

1800018c <HW_set_32bit_reg_field>:
1800018c:	b50e      	push	{r1, r2, r3, lr}
1800018e:	408b      	lsls	r3, r1
18000190:	4013      	ands	r3, r2
18000192:	6801      	ldr	r1, [r0, #0]
18000194:	43d2      	mvns	r2, r2
18000196:	4011      	ands	r1, r2
18000198:	4319      	orrs	r1, r3
1800019a:	6001      	str	r1, [r0, #0]
1800019c:	bd0e      	pop	{r1, r2, r3, pc}

1800019e <HW_get_32bit_reg_field>:
1800019e:	6800      	ldr	r0, [r0, #0]
180001a0:	4010      	ands	r0, r2
180001a2:	40c8      	lsrs	r0, r1
180001a4:	4770      	bx	lr

180001a6 <HW_set_16bit_reg>:
180001a6:	8001      	strh	r1, [r0, #0]
180001a8:	4770      	bx	lr

180001aa <HW_get_16bit_reg>:
180001aa:	8800      	ldrh	r0, [r0, #0]
180001ac:	4770      	bx	lr

180001ae <HW_set_16bit_reg_field>:
180001ae:	b50e      	push	{r1, r2, r3, lr}
180001b0:	408b      	lsls	r3, r1
180001b2:	4013      	ands	r3, r2
180001b4:	8801      	ldrh	r1, [r0, #0]
180001b6:	43d2      	mvns	r2, r2
180001b8:	4011      	ands	r1, r2
180001ba:	4319      	orrs	r1, r3
180001bc:	8001      	strh	r1, [r0, #0]
180001be:	bd0e      	pop	{r1, r2, r3, pc}

180001c0 <HW_get_16bit_reg_field>:
180001c0:	8800      	ldrh	r0, [r0, #0]
180001c2:	4010      	ands	r0, r2
180001c4:	40c8      	lsrs	r0, r1
180001c6:	4770      	bx	lr

180001c8 <HW_set_8bit_reg>:
180001c8:	7001      	strb	r1, [r0, #0]
180001ca:	4770      	bx	lr

180001cc <HW_get_8bit_reg>:
180001cc:	7800      	ldrb	r0, [r0, #0]
180001ce:	4770      	bx	lr

180001d0 <HW_set_8bit_reg_field>:
180001d0:	b50e      	push	{r1, r2, r3, lr}
180001d2:	408b      	lsls	r3, r1
180001d4:	4013      	ands	r3, r2
180001d6:	7801      	ldrb	r1, [r0, #0]
180001d8:	43d2      	mvns	r2, r2
180001da:	4011      	ands	r1, r2
180001dc:	4319      	orrs	r1, r3
180001de:	7001      	strb	r1, [r0, #0]
180001e0:	bd0e      	pop	{r1, r2, r3, pc}

180001e2 <HW_get_8bit_reg_field>:
180001e2:	7800      	ldrb	r0, [r0, #0]
180001e4:	4010      	ands	r0, r2
180001e6:	40c8      	lsrs	r0, r1
180001e8:	4770      	bx	lr
	...

180001ec <_close>:

/*==============================================================================
 * Close a file.
 */
int _close(int file)
{
180001ec:	b580      	push	{r7, lr}
180001ee:	b082      	sub	sp, #8
180001f0:	af00      	add	r7, sp, #0
180001f2:	6078      	str	r0, [r7, #4]
    return -1;
180001f4:	2301      	movs	r3, #1
180001f6:	425b      	negs	r3, r3
}
180001f8:	1c18      	adds	r0, r3, #0
180001fa:	46bd      	mov	sp, r7
180001fc:	b002      	add	sp, #8
180001fe:	bd80      	pop	{r7, pc}

18000200 <_execve>:

/*==============================================================================
 * Transfer control to a new process.
 */
int _execve(char *name, char **argv, char **env)
{
18000200:	b580      	push	{r7, lr}
18000202:	b084      	sub	sp, #16
18000204:	af00      	add	r7, sp, #0
18000206:	60f8      	str	r0, [r7, #12]
18000208:	60b9      	str	r1, [r7, #8]
1800020a:	607a      	str	r2, [r7, #4]
    errno = ENOMEM;
1800020c:	4b04      	ldr	r3, [pc, #16]	; (18000220 <_execve+0x20>)
1800020e:	220c      	movs	r2, #12
18000210:	601a      	str	r2, [r3, #0]
    return -1;
18000212:	2301      	movs	r3, #1
18000214:	425b      	negs	r3, r3
}
18000216:	1c18      	adds	r0, r3, #0
18000218:	46bd      	mov	sp, r7
1800021a:	b004      	add	sp, #16
1800021c:	bd80      	pop	{r7, pc}
1800021e:	46c0      	nop			; (mov r8, r8)
18000220:	18001bb8 	.word	0x18001bb8

18000224 <_exit>:
{
	/* Should we force a system reset? */
	while( 1 )
	{
		;
	}
18000224:	b580      	push	{r7, lr}
18000226:	b082      	sub	sp, #8
18000228:	af00      	add	r7, sp, #0
1800022a:	6078      	str	r0, [r7, #4]
1800022c:	e7fe      	b.n	1800022c <_exit+0x8>
1800022e:	46c0      	nop			; (mov r8, r8)

18000230 <_fork>:

/*==============================================================================
 * Create a new process.
 */
int _fork(void)
{
18000230:	b580      	push	{r7, lr}
18000232:	af00      	add	r7, sp, #0
    errno = EAGAIN;
18000234:	4b03      	ldr	r3, [pc, #12]	; (18000244 <_fork+0x14>)
18000236:	220b      	movs	r2, #11
18000238:	601a      	str	r2, [r3, #0]
    return -1;
1800023a:	2301      	movs	r3, #1
1800023c:	425b      	negs	r3, r3
}
1800023e:	1c18      	adds	r0, r3, #0
18000240:	46bd      	mov	sp, r7
18000242:	bd80      	pop	{r7, pc}
18000244:	18001bb8 	.word	0x18001bb8

18000248 <_fstat>:

/*==============================================================================
 * Status of an open file.
 */
int _fstat(int file, struct stat *st)
{
18000248:	b580      	push	{r7, lr}
1800024a:	b082      	sub	sp, #8
1800024c:	af00      	add	r7, sp, #0
1800024e:	6078      	str	r0, [r7, #4]
18000250:	6039      	str	r1, [r7, #0]
    st->st_mode = S_IFCHR;
18000252:	683a      	ldr	r2, [r7, #0]
18000254:	2380      	movs	r3, #128	; 0x80
18000256:	019b      	lsls	r3, r3, #6
18000258:	6053      	str	r3, [r2, #4]
    return 0;
1800025a:	2300      	movs	r3, #0
}
1800025c:	1c18      	adds	r0, r3, #0
1800025e:	46bd      	mov	sp, r7
18000260:	b002      	add	sp, #8
18000262:	bd80      	pop	{r7, pc}

18000264 <_getpid>:

/*==============================================================================
 * Process-ID
 */
int _getpid(void)
{
18000264:	b580      	push	{r7, lr}
18000266:	af00      	add	r7, sp, #0
    return 1;
18000268:	2301      	movs	r3, #1
}
1800026a:	1c18      	adds	r0, r3, #0
1800026c:	46bd      	mov	sp, r7
1800026e:	bd80      	pop	{r7, pc}

18000270 <_isatty>:

/*==============================================================================
 * Query whether output stream is a terminal.
 */
int _isatty(int file)
{
18000270:	b580      	push	{r7, lr}
18000272:	b082      	sub	sp, #8
18000274:	af00      	add	r7, sp, #0
18000276:	6078      	str	r0, [r7, #4]
    return 1;
18000278:	2301      	movs	r3, #1
}
1800027a:	1c18      	adds	r0, r3, #0
1800027c:	46bd      	mov	sp, r7
1800027e:	b002      	add	sp, #8
18000280:	bd80      	pop	{r7, pc}
18000282:	46c0      	nop			; (mov r8, r8)

18000284 <_kill>:

/*==============================================================================
 * Send a signal.
 */
int _kill(int pid, int sig)
{
18000284:	b580      	push	{r7, lr}
18000286:	b082      	sub	sp, #8
18000288:	af00      	add	r7, sp, #0
1800028a:	6078      	str	r0, [r7, #4]
1800028c:	6039      	str	r1, [r7, #0]
    errno = EINVAL;
1800028e:	4b04      	ldr	r3, [pc, #16]	; (180002a0 <_kill+0x1c>)
18000290:	2216      	movs	r2, #22
18000292:	601a      	str	r2, [r3, #0]
    return -1;
18000294:	2301      	movs	r3, #1
18000296:	425b      	negs	r3, r3
}
18000298:	1c18      	adds	r0, r3, #0
1800029a:	46bd      	mov	sp, r7
1800029c:	b002      	add	sp, #8
1800029e:	bd80      	pop	{r7, pc}
180002a0:	18001bb8 	.word	0x18001bb8

180002a4 <_link>:

/*==============================================================================
 * Establish a new name for an existing file.
 */
int _link(char *old, char *new)
{
180002a4:	b580      	push	{r7, lr}
180002a6:	b082      	sub	sp, #8
180002a8:	af00      	add	r7, sp, #0
180002aa:	6078      	str	r0, [r7, #4]
180002ac:	6039      	str	r1, [r7, #0]
    errno = EMLINK;
180002ae:	4b04      	ldr	r3, [pc, #16]	; (180002c0 <_link+0x1c>)
180002b0:	221f      	movs	r2, #31
180002b2:	601a      	str	r2, [r3, #0]
    return -1;
180002b4:	2301      	movs	r3, #1
180002b6:	425b      	negs	r3, r3
}
180002b8:	1c18      	adds	r0, r3, #0
180002ba:	46bd      	mov	sp, r7
180002bc:	b002      	add	sp, #8
180002be:	bd80      	pop	{r7, pc}
180002c0:	18001bb8 	.word	0x18001bb8

180002c4 <_lseek>:

/*==============================================================================
 * Set position in a file.
 */
int _lseek(int file, int ptr, int dir)
{
180002c4:	b580      	push	{r7, lr}
180002c6:	b084      	sub	sp, #16
180002c8:	af00      	add	r7, sp, #0
180002ca:	60f8      	str	r0, [r7, #12]
180002cc:	60b9      	str	r1, [r7, #8]
180002ce:	607a      	str	r2, [r7, #4]
    return 0;
180002d0:	2300      	movs	r3, #0
}
180002d2:	1c18      	adds	r0, r3, #0
180002d4:	46bd      	mov	sp, r7
180002d6:	b004      	add	sp, #16
180002d8:	bd80      	pop	{r7, pc}
180002da:	46c0      	nop			; (mov r8, r8)

180002dc <_open>:

/*==============================================================================
 * Open a file.
 */
int _open(const char *name, int flags, int mode)
{
180002dc:	b580      	push	{r7, lr}
180002de:	b084      	sub	sp, #16
180002e0:	af00      	add	r7, sp, #0
180002e2:	60f8      	str	r0, [r7, #12]
180002e4:	60b9      	str	r1, [r7, #8]
180002e6:	607a      	str	r2, [r7, #4]
    return -1;
180002e8:	2301      	movs	r3, #1
180002ea:	425b      	negs	r3, r3
}
180002ec:	1c18      	adds	r0, r3, #0
180002ee:	46bd      	mov	sp, r7
180002f0:	b004      	add	sp, #16
180002f2:	bd80      	pop	{r7, pc}

180002f4 <_read>:

/*==============================================================================
 * Read from a file.
 */
int _read(int file, char *ptr, int len)
{
180002f4:	b580      	push	{r7, lr}
180002f6:	b084      	sub	sp, #16
180002f8:	af00      	add	r7, sp, #0
180002fa:	60f8      	str	r0, [r7, #12]
180002fc:	60b9      	str	r1, [r7, #8]
180002fe:	607a      	str	r2, [r7, #4]
    return 0;
18000300:	2300      	movs	r3, #0
}
18000302:	1c18      	adds	r0, r3, #0
18000304:	46bd      	mov	sp, r7
18000306:	b004      	add	sp, #16
18000308:	bd80      	pop	{r7, pc}
1800030a:	46c0      	nop			; (mov r8, r8)

1800030c <_sbrk>:
 * it is useful to have a working implementation. The following suffices for a
 * standalone system; it exploits the symbol _end automatically defined by the
 * GNU linker. 
 */
caddr_t _sbrk(int incr)
{
1800030c:	b580      	push	{r7, lr}
1800030e:	b084      	sub	sp, #16
18000310:	af00      	add	r7, sp, #0
18000312:	6078      	str	r0, [r7, #4]
    extern char _end;		/* Defined by the linker */
    static char *heap_end;
    char *prev_heap_end;
    char * stack_ptr;
    
    if (heap_end == 0)
18000314:	4b13      	ldr	r3, [pc, #76]	; (18000364 <_sbrk+0x58>)
18000316:	681b      	ldr	r3, [r3, #0]
18000318:	2b00      	cmp	r3, #0
1800031a:	d102      	bne.n	18000322 <_sbrk+0x16>
    {
      heap_end = &_end;
1800031c:	4b11      	ldr	r3, [pc, #68]	; (18000364 <_sbrk+0x58>)
1800031e:	4a12      	ldr	r2, [pc, #72]	; (18000368 <_sbrk+0x5c>)
18000320:	601a      	str	r2, [r3, #0]
    }
    
    prev_heap_end = heap_end;
18000322:	4b10      	ldr	r3, [pc, #64]	; (18000364 <_sbrk+0x58>)
18000324:	681b      	ldr	r3, [r3, #0]
18000326:	60bb      	str	r3, [r7, #8]
    asm volatile ("MRS %0, msp" : "=r" (stack_ptr) );
18000328:	f3ef 8308 	mrs	r3, MSP
1800032c:	60fb      	str	r3, [r7, #12]
    if (heap_end + incr > stack_ptr)
1800032e:	4b0d      	ldr	r3, [pc, #52]	; (18000364 <_sbrk+0x58>)
18000330:	681a      	ldr	r2, [r3, #0]
18000332:	687b      	ldr	r3, [r7, #4]
18000334:	18d2      	adds	r2, r2, r3
18000336:	68fb      	ldr	r3, [r7, #12]
18000338:	429a      	cmp	r2, r3
1800033a:	d907      	bls.n	1800034c <_sbrk+0x40>
    {
      write (1, "Heap and stack collision\n", 25);
1800033c:	4b0b      	ldr	r3, [pc, #44]	; (1800036c <_sbrk+0x60>)
1800033e:	2001      	movs	r0, #1
18000340:	1c19      	adds	r1, r3, #0
18000342:	2219      	movs	r2, #25
18000344:	f000 fbde 	bl	18000b04 <write>
      abort ();
18000348:	f000 fa8c 	bl	18000864 <abort>
    }
  
    heap_end += incr;
1800034c:	4b05      	ldr	r3, [pc, #20]	; (18000364 <_sbrk+0x58>)
1800034e:	681a      	ldr	r2, [r3, #0]
18000350:	687b      	ldr	r3, [r7, #4]
18000352:	18d2      	adds	r2, r2, r3
18000354:	4b03      	ldr	r3, [pc, #12]	; (18000364 <_sbrk+0x58>)
18000356:	601a      	str	r2, [r3, #0]
    return (caddr_t) prev_heap_end;
18000358:	68bb      	ldr	r3, [r7, #8]
}
1800035a:	1c18      	adds	r0, r3, #0
1800035c:	46bd      	mov	sp, r7
1800035e:	b004      	add	sp, #16
18000360:	bd80      	pop	{r7, pc}
18000362:	46c0      	nop			; (mov r8, r8)
18000364:	18001b78 	.word	0x18001b78
18000368:	18001bc0 	.word	0x18001bc0
1800036c:	18001290 	.word	0x18001290

18000370 <_stat>:

/*==============================================================================
 * Status of a file (by name).
 */
int _stat(char *file, struct stat *st)
{
18000370:	b580      	push	{r7, lr}
18000372:	b082      	sub	sp, #8
18000374:	af00      	add	r7, sp, #0
18000376:	6078      	str	r0, [r7, #4]
18000378:	6039      	str	r1, [r7, #0]
    st->st_mode = S_IFCHR;
1800037a:	683a      	ldr	r2, [r7, #0]
1800037c:	2380      	movs	r3, #128	; 0x80
1800037e:	019b      	lsls	r3, r3, #6
18000380:	6053      	str	r3, [r2, #4]
    return 0;
18000382:	2300      	movs	r3, #0
}
18000384:	1c18      	adds	r0, r3, #0
18000386:	46bd      	mov	sp, r7
18000388:	b002      	add	sp, #8
1800038a:	bd80      	pop	{r7, pc}

1800038c <_times>:

/*==============================================================================
 * Timing information for current process.
 */
int _times(struct tms *buf)
{
1800038c:	b580      	push	{r7, lr}
1800038e:	b082      	sub	sp, #8
18000390:	af00      	add	r7, sp, #0
18000392:	6078      	str	r0, [r7, #4]
    return -1;
18000394:	2301      	movs	r3, #1
18000396:	425b      	negs	r3, r3
}
18000398:	1c18      	adds	r0, r3, #0
1800039a:	46bd      	mov	sp, r7
1800039c:	b002      	add	sp, #8
1800039e:	bd80      	pop	{r7, pc}

180003a0 <_unlink>:

/*==============================================================================
 * Remove a file's directory entry.
 */
int _unlink(char *name)
{
180003a0:	b580      	push	{r7, lr}
180003a2:	b082      	sub	sp, #8
180003a4:	af00      	add	r7, sp, #0
180003a6:	6078      	str	r0, [r7, #4]
    errno = ENOENT;
180003a8:	4b04      	ldr	r3, [pc, #16]	; (180003bc <_unlink+0x1c>)
180003aa:	2202      	movs	r2, #2
180003ac:	601a      	str	r2, [r3, #0]
    return -1;
180003ae:	2301      	movs	r3, #1
180003b0:	425b      	negs	r3, r3
}
180003b2:	1c18      	adds	r0, r3, #0
180003b4:	46bd      	mov	sp, r7
180003b6:	b002      	add	sp, #8
180003b8:	bd80      	pop	{r7, pc}
180003ba:	46c0      	nop			; (mov r8, r8)
180003bc:	18001bb8 	.word	0x18001bb8

180003c0 <_wait>:

/*==============================================================================
 * Wait for a child process.
 */
int _wait(int *status)
{
180003c0:	b580      	push	{r7, lr}
180003c2:	b082      	sub	sp, #8
180003c4:	af00      	add	r7, sp, #0
180003c6:	6078      	str	r0, [r7, #4]
    errno = ECHILD;
180003c8:	4b04      	ldr	r3, [pc, #16]	; (180003dc <_wait+0x1c>)
180003ca:	220a      	movs	r2, #10
180003cc:	601a      	str	r2, [r3, #0]
    return -1;
180003ce:	2301      	movs	r3, #1
180003d0:	425b      	negs	r3, r3
}
180003d2:	1c18      	adds	r0, r3, #0
180003d4:	46bd      	mov	sp, r7
180003d6:	b002      	add	sp, #8
180003d8:	bd80      	pop	{r7, pc}
180003da:	46c0      	nop			; (mov r8, r8)
180003dc:	18001bb8 	.word	0x18001bb8

180003e0 <_write_r>:
 * all files, including stdoutso if you need to generate any output, for
 * example to a serial port for debugging, you should make your minimal write
 * capable of doing this.
 */
int _write_r( void * reent, int file, char * ptr, int len )
{
180003e0:	b580      	push	{r7, lr}
180003e2:	b084      	sub	sp, #16
180003e4:	af00      	add	r7, sp, #0
180003e6:	60f8      	str	r0, [r7, #12]
180003e8:	60b9      	str	r1, [r7, #8]
180003ea:	607a      	str	r2, [r7, #4]
180003ec:	603b      	str	r3, [r7, #0]
#ifdef ACTEL_STDIO_THRU_CORE_UART_APB
	/*--------------------------------------------------------------------------
	 * Initialize the UART driver if it is the first time this function is
	 * called.
	 */
	if ( !g_stdio_uart_init_done )
180003ee:	4b0e      	ldr	r3, [pc, #56]	; (18000428 <_write_r+0x48>)
180003f0:	681b      	ldr	r3, [r3, #0]
180003f2:	2b00      	cmp	r3, #0
180003f4:	d10b      	bne.n	1800040e <_write_r+0x2e>
	{
		UART_init( &g_stdio_uart, ACTEL_STDIO_UART_BASE_ADDR, ACTEL_STDIO_BAUD_VALUE, (DATA_8_BITS | NO_PARITY));
180003f6:	4a0d      	ldr	r2, [pc, #52]	; (1800042c <_write_r+0x4c>)
180003f8:	23c3      	movs	r3, #195	; 0xc3
180003fa:	061b      	lsls	r3, r3, #24
180003fc:	1c10      	adds	r0, r2, #0
180003fe:	1c19      	adds	r1, r3, #0
18000400:	222a      	movs	r2, #42	; 0x2a
18000402:	2301      	movs	r3, #1
18000404:	f000 f814 	bl	18000430 <UART_init>
		g_stdio_uart_init_done = 1;
18000408:	4b07      	ldr	r3, [pc, #28]	; (18000428 <_write_r+0x48>)
1800040a:	2201      	movs	r2, #1
1800040c:	601a      	str	r2, [r3, #0]
	}
	
	/*--------------------------------------------------------------------------
	 * Output text to the UART.
	 */
	UART_send( &g_stdio_uart, (uint8_t *)ptr, len );
1800040e:	683b      	ldr	r3, [r7, #0]
18000410:	4906      	ldr	r1, [pc, #24]	; (1800042c <_write_r+0x4c>)
18000412:	687a      	ldr	r2, [r7, #4]
18000414:	1c08      	adds	r0, r1, #0
18000416:	1c11      	adds	r1, r2, #0
18000418:	1c1a      	adds	r2, r3, #0
1800041a:	f000 f88b 	bl	18000534 <UART_send>
	
	return len;
1800041e:	683b      	ldr	r3, [r7, #0]
#else	/* ACTEL_STDIO_THRU_CORE_UART_APB */
	return 0;
#endif	/* ACTEL_STDIO_THRU_CORE_UART_APB */
}
18000420:	1c18      	adds	r0, r3, #0
18000422:	46bd      	mov	sp, r7
18000424:	b004      	add	sp, #16
18000426:	bd80      	pop	{r7, pc}
18000428:	18001b70 	.word	0x18001b70
1800042c:	18001b6c 	.word	0x18001b6c

18000430 <UART_init>:
	UART_instance_t * this_uart,
	addr_t base_addr,
	uint8_t baud_value,
	uint8_t line_config
)
{
18000430:	b590      	push	{r4, r7, lr}
18000432:	b091      	sub	sp, #68	; 0x44
18000434:	af00      	add	r7, sp, #0
18000436:	60f8      	str	r0, [r7, #12]
18000438:	60b9      	str	r1, [r7, #8]
1800043a:	1c11      	adds	r1, r2, #0
1800043c:	1c1a      	adds	r2, r3, #0
1800043e:	1dfb      	adds	r3, r7, #7
18000440:	7019      	strb	r1, [r3, #0]
18000442:	1dbb      	adds	r3, r7, #6
18000444:	701a      	strb	r2, [r3, #0]
    uint8_t rx_full;
    
	HAL_ASSERT( this_uart != NULL_instance )
18000446:	4b39      	ldr	r3, [pc, #228]	; (1800052c <UART_init+0xfc>)
18000448:	681b      	ldr	r3, [r3, #0]
1800044a:	68fa      	ldr	r2, [r7, #12]
1800044c:	429a      	cmp	r2, r3
1800044e:	d112      	bne.n	18000476 <UART_init+0x46>
18000450:	1c3b      	adds	r3, r7, #0
18000452:	3314      	adds	r3, #20
18000454:	4a36      	ldr	r2, [pc, #216]	; (18000530 <UART_init+0x100>)
18000456:	ca13      	ldmia	r2!, {r0, r1, r4}
18000458:	c313      	stmia	r3!, {r0, r1, r4}
1800045a:	ca13      	ldmia	r2!, {r0, r1, r4}
1800045c:	c313      	stmia	r3!, {r0, r1, r4}
1800045e:	ca13      	ldmia	r2!, {r0, r1, r4}
18000460:	c313      	stmia	r3!, {r0, r1, r4}
18000462:	8811      	ldrh	r1, [r2, #0]
18000464:	8019      	strh	r1, [r3, #0]
18000466:	7892      	ldrb	r2, [r2, #2]
18000468:	709a      	strb	r2, [r3, #2]
1800046a:	1c3b      	adds	r3, r7, #0
1800046c:	3314      	adds	r3, #20
1800046e:	1c18      	adds	r0, r3, #0
18000470:	2125      	movs	r1, #37	; 0x25
18000472:	f7ff fe71 	bl	18000158 <HAL_assert_fail>
	HAL_ASSERT( line_config <= MAX_LINE_CONFIG )
18000476:	1dbb      	adds	r3, r7, #6
18000478:	781b      	ldrb	r3, [r3, #0]
1800047a:	2b07      	cmp	r3, #7
1800047c:	d912      	bls.n	180004a4 <UART_init+0x74>
1800047e:	1c3b      	adds	r3, r7, #0
18000480:	3314      	adds	r3, #20
18000482:	4a2b      	ldr	r2, [pc, #172]	; (18000530 <UART_init+0x100>)
18000484:	ca13      	ldmia	r2!, {r0, r1, r4}
18000486:	c313      	stmia	r3!, {r0, r1, r4}
18000488:	ca13      	ldmia	r2!, {r0, r1, r4}
1800048a:	c313      	stmia	r3!, {r0, r1, r4}
1800048c:	ca13      	ldmia	r2!, {r0, r1, r4}
1800048e:	c313      	stmia	r3!, {r0, r1, r4}
18000490:	8811      	ldrh	r1, [r2, #0]
18000492:	8019      	strh	r1, [r3, #0]
18000494:	7892      	ldrb	r2, [r2, #2]
18000496:	709a      	strb	r2, [r3, #2]
18000498:	1c3b      	adds	r3, r7, #0
1800049a:	3314      	adds	r3, #20
1800049c:	1c18      	adds	r0, r3, #0
1800049e:	2126      	movs	r1, #38	; 0x26
180004a0:	f7ff fe5a 	bl	18000158 <HAL_assert_fail>
      
    HAL_set_8bit_reg(base_addr, CTRL1, (uint_fast8_t)baud_value);
180004a4:	68bb      	ldr	r3, [r7, #8]
180004a6:	1c1a      	adds	r2, r3, #0
180004a8:	3208      	adds	r2, #8
180004aa:	1dfb      	adds	r3, r7, #7
180004ac:	781b      	ldrb	r3, [r3, #0]
180004ae:	1c10      	adds	r0, r2, #0
180004b0:	1c19      	adds	r1, r3, #0
180004b2:	f7ff fe89 	bl	180001c8 <HW_set_8bit_reg>
    HAL_set_8bit_reg(base_addr, CTRL2, (uint_fast8_t)line_config);
180004b6:	68bb      	ldr	r3, [r7, #8]
180004b8:	1c1a      	adds	r2, r3, #0
180004ba:	320c      	adds	r2, #12
180004bc:	1dbb      	adds	r3, r7, #6
180004be:	781b      	ldrb	r3, [r3, #0]
180004c0:	1c10      	adds	r0, r2, #0
180004c2:	1c19      	adds	r1, r3, #0
180004c4:	f7ff fe80 	bl	180001c8 <HW_set_8bit_reg>

    this_uart->base_address = base_addr;
180004c8:	68fb      	ldr	r3, [r7, #12]
180004ca:	68ba      	ldr	r2, [r7, #8]
180004cc:	601a      	str	r2, [r3, #0]
    
    /*
     * Flush the receive FIFO of data that may have been received before the
     * driver was initialised.
     */
    rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_RXFULL_MASK;
180004ce:	68fb      	ldr	r3, [r7, #12]
180004d0:	681b      	ldr	r3, [r3, #0]
180004d2:	3310      	adds	r3, #16
180004d4:	1c18      	adds	r0, r3, #0
180004d6:	f7ff fe79 	bl	180001cc <HW_get_8bit_reg>
180004da:	1c03      	adds	r3, r0, #0
180004dc:	1c19      	adds	r1, r3, #0
180004de:	1c3b      	adds	r3, r7, #0
180004e0:	333f      	adds	r3, #63	; 0x3f
180004e2:	2202      	movs	r2, #2
180004e4:	400a      	ands	r2, r1
180004e6:	701a      	strb	r2, [r3, #0]
    while ( rx_full )
180004e8:	e017      	b.n	1800051a <UART_init+0xea>
    {
        volatile uint8_t rx_byte;
        rx_byte = HAL_get_8bit_reg( this_uart->base_address, RXDATA );
180004ea:	68fb      	ldr	r3, [r7, #12]
180004ec:	681b      	ldr	r3, [r3, #0]
180004ee:	3304      	adds	r3, #4
180004f0:	1c18      	adds	r0, r3, #0
180004f2:	f7ff fe6b 	bl	180001cc <HW_get_8bit_reg>
180004f6:	1c03      	adds	r3, r0, #0
180004f8:	1c1a      	adds	r2, r3, #0
180004fa:	1c3b      	adds	r3, r7, #0
180004fc:	333e      	adds	r3, #62	; 0x3e
180004fe:	701a      	strb	r2, [r3, #0]
        rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_RXFULL_MASK;
18000500:	68fb      	ldr	r3, [r7, #12]
18000502:	681b      	ldr	r3, [r3, #0]
18000504:	3310      	adds	r3, #16
18000506:	1c18      	adds	r0, r3, #0
18000508:	f7ff fe60 	bl	180001cc <HW_get_8bit_reg>
1800050c:	1c03      	adds	r3, r0, #0
1800050e:	1c19      	adds	r1, r3, #0
18000510:	1c3b      	adds	r3, r7, #0
18000512:	333f      	adds	r3, #63	; 0x3f
18000514:	2202      	movs	r2, #2
18000516:	400a      	ands	r2, r1
18000518:	701a      	strb	r2, [r3, #0]
    /*
     * Flush the receive FIFO of data that may have been received before the
     * driver was initialised.
     */
    rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_RXFULL_MASK;
    while ( rx_full )
1800051a:	1c3b      	adds	r3, r7, #0
1800051c:	333f      	adds	r3, #63	; 0x3f
1800051e:	781b      	ldrb	r3, [r3, #0]
18000520:	2b00      	cmp	r3, #0
18000522:	d1e2      	bne.n	180004ea <UART_init+0xba>
    {
        volatile uint8_t rx_byte;
        rx_byte = HAL_get_8bit_reg( this_uart->base_address, RXDATA );
        rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_RXFULL_MASK;
    }
}
18000524:	46bd      	mov	sp, r7
18000526:	b011      	add	sp, #68	; 0x44
18000528:	bd90      	pop	{r4, r7, pc}
1800052a:	46c0      	nop			; (mov r8, r8)
1800052c:	18001b7c 	.word	0x18001b7c
18000530:	180012ac 	.word	0x180012ac

18000534 <UART_send>:
(
    UART_instance_t * this_uart,
    const uint8_t * tx_buffer,
    size_t tx_size
)
{
18000534:	b590      	push	{r4, r7, lr}
18000536:	b091      	sub	sp, #68	; 0x44
18000538:	af00      	add	r7, sp, #0
1800053a:	60f8      	str	r0, [r7, #12]
1800053c:	60b9      	str	r1, [r7, #8]
1800053e:	607a      	str	r2, [r7, #4]
	size_t char_idx;
    uint8_t tx_ready;

	HAL_ASSERT( this_uart != NULL_instance )
18000540:	4b37      	ldr	r3, [pc, #220]	; (18000620 <UART_send+0xec>)
18000542:	681b      	ldr	r3, [r3, #0]
18000544:	68fa      	ldr	r2, [r7, #12]
18000546:	429a      	cmp	r2, r3
18000548:	d112      	bne.n	18000570 <UART_send+0x3c>
1800054a:	1c3b      	adds	r3, r7, #0
1800054c:	3310      	adds	r3, #16
1800054e:	4a35      	ldr	r2, [pc, #212]	; (18000624 <UART_send+0xf0>)
18000550:	ca13      	ldmia	r2!, {r0, r1, r4}
18000552:	c313      	stmia	r3!, {r0, r1, r4}
18000554:	ca13      	ldmia	r2!, {r0, r1, r4}
18000556:	c313      	stmia	r3!, {r0, r1, r4}
18000558:	ca13      	ldmia	r2!, {r0, r1, r4}
1800055a:	c313      	stmia	r3!, {r0, r1, r4}
1800055c:	8811      	ldrh	r1, [r2, #0]
1800055e:	8019      	strh	r1, [r3, #0]
18000560:	7892      	ldrb	r2, [r2, #2]
18000562:	709a      	strb	r2, [r3, #2]
18000564:	1c3b      	adds	r3, r7, #0
18000566:	3310      	adds	r3, #16
18000568:	1c18      	adds	r0, r3, #0
1800056a:	2149      	movs	r1, #73	; 0x49
1800056c:	f7ff fdf4 	bl	18000158 <HAL_assert_fail>
	HAL_ASSERT( tx_buffer != NULL_buffer )
18000570:	4b2d      	ldr	r3, [pc, #180]	; (18000628 <UART_send+0xf4>)
18000572:	681b      	ldr	r3, [r3, #0]
18000574:	68ba      	ldr	r2, [r7, #8]
18000576:	429a      	cmp	r2, r3
18000578:	d112      	bne.n	180005a0 <UART_send+0x6c>
1800057a:	1c3b      	adds	r3, r7, #0
1800057c:	3310      	adds	r3, #16
1800057e:	4a29      	ldr	r2, [pc, #164]	; (18000624 <UART_send+0xf0>)
18000580:	ca13      	ldmia	r2!, {r0, r1, r4}
18000582:	c313      	stmia	r3!, {r0, r1, r4}
18000584:	ca13      	ldmia	r2!, {r0, r1, r4}
18000586:	c313      	stmia	r3!, {r0, r1, r4}
18000588:	ca13      	ldmia	r2!, {r0, r1, r4}
1800058a:	c313      	stmia	r3!, {r0, r1, r4}
1800058c:	8811      	ldrh	r1, [r2, #0]
1800058e:	8019      	strh	r1, [r3, #0]
18000590:	7892      	ldrb	r2, [r2, #2]
18000592:	709a      	strb	r2, [r3, #2]
18000594:	1c3b      	adds	r3, r7, #0
18000596:	3310      	adds	r3, #16
18000598:	1c18      	adds	r0, r3, #0
1800059a:	214a      	movs	r1, #74	; 0x4a
1800059c:	f7ff fddc 	bl	18000158 <HAL_assert_fail>
	HAL_ASSERT( tx_size > 0 )
180005a0:	687b      	ldr	r3, [r7, #4]
180005a2:	2b00      	cmp	r3, #0
180005a4:	d112      	bne.n	180005cc <UART_send+0x98>
180005a6:	1c3b      	adds	r3, r7, #0
180005a8:	3310      	adds	r3, #16
180005aa:	4a1e      	ldr	r2, [pc, #120]	; (18000624 <UART_send+0xf0>)
180005ac:	ca13      	ldmia	r2!, {r0, r1, r4}
180005ae:	c313      	stmia	r3!, {r0, r1, r4}
180005b0:	ca13      	ldmia	r2!, {r0, r1, r4}
180005b2:	c313      	stmia	r3!, {r0, r1, r4}
180005b4:	ca13      	ldmia	r2!, {r0, r1, r4}
180005b6:	c313      	stmia	r3!, {r0, r1, r4}
180005b8:	8811      	ldrh	r1, [r2, #0]
180005ba:	8019      	strh	r1, [r3, #0]
180005bc:	7892      	ldrb	r2, [r2, #2]
180005be:	709a      	strb	r2, [r3, #2]
180005c0:	1c3b      	adds	r3, r7, #0
180005c2:	3310      	adds	r3, #16
180005c4:	1c18      	adds	r0, r3, #0
180005c6:	214b      	movs	r1, #75	; 0x4b
180005c8:	f7ff fdc6 	bl	18000158 <HAL_assert_fail>
      
    for ( char_idx = 0; char_idx < tx_size; char_idx++ )
180005cc:	2300      	movs	r3, #0
180005ce:	63bb      	str	r3, [r7, #56]	; 0x38
180005d0:	e01e      	b.n	18000610 <UART_send+0xdc>
    {
        /* Wait for UART to become ready to transmit. */
        do {
            tx_ready = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_TXRDY_MASK;
180005d2:	68fb      	ldr	r3, [r7, #12]
180005d4:	681b      	ldr	r3, [r3, #0]
180005d6:	3310      	adds	r3, #16
180005d8:	1c18      	adds	r0, r3, #0
180005da:	f7ff fdf7 	bl	180001cc <HW_get_8bit_reg>
180005de:	1c03      	adds	r3, r0, #0
180005e0:	1c19      	adds	r1, r3, #0
180005e2:	1c3b      	adds	r3, r7, #0
180005e4:	333f      	adds	r3, #63	; 0x3f
180005e6:	2201      	movs	r2, #1
180005e8:	400a      	ands	r2, r1
180005ea:	701a      	strb	r2, [r3, #0]
        } while ( !tx_ready );
180005ec:	1c3b      	adds	r3, r7, #0
180005ee:	333f      	adds	r3, #63	; 0x3f
180005f0:	781b      	ldrb	r3, [r3, #0]
180005f2:	2b00      	cmp	r3, #0
180005f4:	d0ed      	beq.n	180005d2 <UART_send+0x9e>
        /* Send next character in the buffer. */
        HAL_set_8bit_reg( this_uart->base_address, TXDATA, (uint_fast8_t)tx_buffer[char_idx] );
180005f6:	68fb      	ldr	r3, [r7, #12]
180005f8:	681a      	ldr	r2, [r3, #0]
180005fa:	68b9      	ldr	r1, [r7, #8]
180005fc:	6bbb      	ldr	r3, [r7, #56]	; 0x38
180005fe:	18cb      	adds	r3, r1, r3
18000600:	781b      	ldrb	r3, [r3, #0]
18000602:	1c10      	adds	r0, r2, #0
18000604:	1c19      	adds	r1, r3, #0
18000606:	f7ff fddf 	bl	180001c8 <HW_set_8bit_reg>

	HAL_ASSERT( this_uart != NULL_instance )
	HAL_ASSERT( tx_buffer != NULL_buffer )
	HAL_ASSERT( tx_size > 0 )
      
    for ( char_idx = 0; char_idx < tx_size; char_idx++ )
1800060a:	6bbb      	ldr	r3, [r7, #56]	; 0x38
1800060c:	3301      	adds	r3, #1
1800060e:	63bb      	str	r3, [r7, #56]	; 0x38
18000610:	6bba      	ldr	r2, [r7, #56]	; 0x38
18000612:	687b      	ldr	r3, [r7, #4]
18000614:	429a      	cmp	r2, r3
18000616:	d3dc      	bcc.n	180005d2 <UART_send+0x9e>
            tx_ready = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_TXRDY_MASK;
        } while ( !tx_ready );
        /* Send next character in the buffer. */
        HAL_set_8bit_reg( this_uart->base_address, TXDATA, (uint_fast8_t)tx_buffer[char_idx] );
    }
}
18000618:	46bd      	mov	sp, r7
1800061a:	b011      	add	sp, #68	; 0x44
1800061c:	bd90      	pop	{r4, r7, pc}
1800061e:	46c0      	nop			; (mov r8, r8)
18000620:	18001b7c 	.word	0x18001b7c
18000624:	180012ac 	.word	0x180012ac
18000628:	18001b80 	.word	0x18001b80

1800062c <UART_fill_tx_fifo>:
(
	UART_instance_t * this_uart,
	const uint8_t * tx_buffer,
	size_t tx_size
)
{
1800062c:	b590      	push	{r4, r7, lr}
1800062e:	b091      	sub	sp, #68	; 0x44
18000630:	af00      	add	r7, sp, #0
18000632:	60f8      	str	r0, [r7, #12]
18000634:	60b9      	str	r1, [r7, #8]
18000636:	607a      	str	r2, [r7, #4]
    uint8_t tx_ready;
    size_t size_sent = 0;
18000638:	2300      	movs	r3, #0
1800063a:	63fb      	str	r3, [r7, #60]	; 0x3c
    
	HAL_ASSERT( this_uart != NULL_instance )
1800063c:	4b3f      	ldr	r3, [pc, #252]	; (1800073c <UART_fill_tx_fifo+0x110>)
1800063e:	681b      	ldr	r3, [r3, #0]
18000640:	68fa      	ldr	r2, [r7, #12]
18000642:	429a      	cmp	r2, r3
18000644:	d112      	bne.n	1800066c <UART_fill_tx_fifo+0x40>
18000646:	1c3b      	adds	r3, r7, #0
18000648:	3314      	adds	r3, #20
1800064a:	4a3d      	ldr	r2, [pc, #244]	; (18000740 <UART_fill_tx_fifo+0x114>)
1800064c:	ca13      	ldmia	r2!, {r0, r1, r4}
1800064e:	c313      	stmia	r3!, {r0, r1, r4}
18000650:	ca13      	ldmia	r2!, {r0, r1, r4}
18000652:	c313      	stmia	r3!, {r0, r1, r4}
18000654:	ca13      	ldmia	r2!, {r0, r1, r4}
18000656:	c313      	stmia	r3!, {r0, r1, r4}
18000658:	8811      	ldrh	r1, [r2, #0]
1800065a:	8019      	strh	r1, [r3, #0]
1800065c:	7892      	ldrb	r2, [r2, #2]
1800065e:	709a      	strb	r2, [r3, #2]
18000660:	1c3b      	adds	r3, r7, #0
18000662:	3314      	adds	r3, #20
18000664:	1c18      	adds	r0, r3, #0
18000666:	2167      	movs	r1, #103	; 0x67
18000668:	f7ff fd76 	bl	18000158 <HAL_assert_fail>
	HAL_ASSERT( tx_buffer != NULL_buffer )
1800066c:	4b35      	ldr	r3, [pc, #212]	; (18000744 <UART_fill_tx_fifo+0x118>)
1800066e:	681b      	ldr	r3, [r3, #0]
18000670:	68ba      	ldr	r2, [r7, #8]
18000672:	429a      	cmp	r2, r3
18000674:	d112      	bne.n	1800069c <UART_fill_tx_fifo+0x70>
18000676:	1c3b      	adds	r3, r7, #0
18000678:	3314      	adds	r3, #20
1800067a:	4a31      	ldr	r2, [pc, #196]	; (18000740 <UART_fill_tx_fifo+0x114>)
1800067c:	ca13      	ldmia	r2!, {r0, r1, r4}
1800067e:	c313      	stmia	r3!, {r0, r1, r4}
18000680:	ca13      	ldmia	r2!, {r0, r1, r4}
18000682:	c313      	stmia	r3!, {r0, r1, r4}
18000684:	ca13      	ldmia	r2!, {r0, r1, r4}
18000686:	c313      	stmia	r3!, {r0, r1, r4}
18000688:	8811      	ldrh	r1, [r2, #0]
1800068a:	8019      	strh	r1, [r3, #0]
1800068c:	7892      	ldrb	r2, [r2, #2]
1800068e:	709a      	strb	r2, [r3, #2]
18000690:	1c3b      	adds	r3, r7, #0
18000692:	3314      	adds	r3, #20
18000694:	1c18      	adds	r0, r3, #0
18000696:	2168      	movs	r1, #104	; 0x68
18000698:	f7ff fd5e 	bl	18000158 <HAL_assert_fail>
	HAL_ASSERT( tx_size > 0 )
1800069c:	687b      	ldr	r3, [r7, #4]
1800069e:	2b00      	cmp	r3, #0
180006a0:	d112      	bne.n	180006c8 <UART_fill_tx_fifo+0x9c>
180006a2:	1c3b      	adds	r3, r7, #0
180006a4:	3314      	adds	r3, #20
180006a6:	4a26      	ldr	r2, [pc, #152]	; (18000740 <UART_fill_tx_fifo+0x114>)
180006a8:	ca13      	ldmia	r2!, {r0, r1, r4}
180006aa:	c313      	stmia	r3!, {r0, r1, r4}
180006ac:	ca13      	ldmia	r2!, {r0, r1, r4}
180006ae:	c313      	stmia	r3!, {r0, r1, r4}
180006b0:	ca13      	ldmia	r2!, {r0, r1, r4}
180006b2:	c313      	stmia	r3!, {r0, r1, r4}
180006b4:	8811      	ldrh	r1, [r2, #0]
180006b6:	8019      	strh	r1, [r3, #0]
180006b8:	7892      	ldrb	r2, [r2, #2]
180006ba:	709a      	strb	r2, [r3, #2]
180006bc:	1c3b      	adds	r3, r7, #0
180006be:	3314      	adds	r3, #20
180006c0:	1c18      	adds	r0, r3, #0
180006c2:	2169      	movs	r1, #105	; 0x69
180006c4:	f7ff fd48 	bl	18000158 <HAL_assert_fail>
      
    /* Fill the UART's Tx FIFO until the FIFO is full or the complete input 
     * buffer has been written. */
    tx_ready = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_TXRDY_MASK;
180006c8:	68fb      	ldr	r3, [r7, #12]
180006ca:	681b      	ldr	r3, [r3, #0]
180006cc:	3310      	adds	r3, #16
180006ce:	1c18      	adds	r0, r3, #0
180006d0:	f7ff fd7c 	bl	180001cc <HW_get_8bit_reg>
180006d4:	1c03      	adds	r3, r0, #0
180006d6:	1c19      	adds	r1, r3, #0
180006d8:	1c3b      	adds	r3, r7, #0
180006da:	333b      	adds	r3, #59	; 0x3b
180006dc:	2201      	movs	r2, #1
180006de:	400a      	ands	r2, r1
180006e0:	701a      	strb	r2, [r3, #0]
    if ( tx_ready )
180006e2:	1c3b      	adds	r3, r7, #0
180006e4:	333b      	adds	r3, #59	; 0x3b
180006e6:	781b      	ldrb	r3, [r3, #0]
180006e8:	2b00      	cmp	r3, #0
180006ea:	d022      	beq.n	18000732 <UART_fill_tx_fifo+0x106>
    {
        do {
            HAL_set_8bit_reg( this_uart->base_address, TXDATA, (uint_fast8_t)tx_buffer[size_sent] );
180006ec:	68fb      	ldr	r3, [r7, #12]
180006ee:	681a      	ldr	r2, [r3, #0]
180006f0:	68b9      	ldr	r1, [r7, #8]
180006f2:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
180006f4:	18cb      	adds	r3, r1, r3
180006f6:	781b      	ldrb	r3, [r3, #0]
180006f8:	1c10      	adds	r0, r2, #0
180006fa:	1c19      	adds	r1, r3, #0
180006fc:	f7ff fd64 	bl	180001c8 <HW_set_8bit_reg>
            size_sent++;
18000700:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
18000702:	3301      	adds	r3, #1
18000704:	63fb      	str	r3, [r7, #60]	; 0x3c
            tx_ready = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_TXRDY_MASK;
18000706:	68fb      	ldr	r3, [r7, #12]
18000708:	681b      	ldr	r3, [r3, #0]
1800070a:	3310      	adds	r3, #16
1800070c:	1c18      	adds	r0, r3, #0
1800070e:	f7ff fd5d 	bl	180001cc <HW_get_8bit_reg>
18000712:	1c03      	adds	r3, r0, #0
18000714:	1c19      	adds	r1, r3, #0
18000716:	1c3b      	adds	r3, r7, #0
18000718:	333b      	adds	r3, #59	; 0x3b
1800071a:	2201      	movs	r2, #1
1800071c:	400a      	ands	r2, r1
1800071e:	701a      	strb	r2, [r3, #0]
        } while ( (tx_ready) && ( size_sent < tx_size ) );
18000720:	1c3b      	adds	r3, r7, #0
18000722:	333b      	adds	r3, #59	; 0x3b
18000724:	781b      	ldrb	r3, [r3, #0]
18000726:	2b00      	cmp	r3, #0
18000728:	d003      	beq.n	18000732 <UART_fill_tx_fifo+0x106>
1800072a:	6bfa      	ldr	r2, [r7, #60]	; 0x3c
1800072c:	687b      	ldr	r3, [r7, #4]
1800072e:	429a      	cmp	r2, r3
18000730:	d3dc      	bcc.n	180006ec <UART_fill_tx_fifo+0xc0>
    }
    
    return size_sent;
18000732:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
}
18000734:	1c18      	adds	r0, r3, #0
18000736:	46bd      	mov	sp, r7
18000738:	b011      	add	sp, #68	; 0x44
1800073a:	bd90      	pop	{r4, r7, pc}
1800073c:	18001b7c 	.word	0x18001b7c
18000740:	180012ac 	.word	0x180012ac
18000744:	18001b80 	.word	0x18001b80

18000748 <UART_get_rx>:
(
    UART_instance_t * this_uart,
    uint8_t * rx_buffer,
    size_t buff_size
)
{
18000748:	b590      	push	{r4, r7, lr}
1800074a:	b091      	sub	sp, #68	; 0x44
1800074c:	af00      	add	r7, sp, #0
1800074e:	60f8      	str	r0, [r7, #12]
18000750:	60b9      	str	r1, [r7, #8]
18000752:	607a      	str	r2, [r7, #4]
    uint8_t rx_full;
	size_t rx_idx = 0;
18000754:	2300      	movs	r3, #0
18000756:	63fb      	str	r3, [r7, #60]	; 0x3c
    
	HAL_ASSERT( this_uart != NULL_instance )
18000758:	4b3f      	ldr	r3, [pc, #252]	; (18000858 <UART_get_rx+0x110>)
1800075a:	681b      	ldr	r3, [r3, #0]
1800075c:	68fa      	ldr	r2, [r7, #12]
1800075e:	429a      	cmp	r2, r3
18000760:	d112      	bne.n	18000788 <UART_get_rx+0x40>
18000762:	1c3b      	adds	r3, r7, #0
18000764:	3314      	adds	r3, #20
18000766:	4a3d      	ldr	r2, [pc, #244]	; (1800085c <UART_get_rx+0x114>)
18000768:	ca13      	ldmia	r2!, {r0, r1, r4}
1800076a:	c313      	stmia	r3!, {r0, r1, r4}
1800076c:	ca13      	ldmia	r2!, {r0, r1, r4}
1800076e:	c313      	stmia	r3!, {r0, r1, r4}
18000770:	ca13      	ldmia	r2!, {r0, r1, r4}
18000772:	c313      	stmia	r3!, {r0, r1, r4}
18000774:	8811      	ldrh	r1, [r2, #0]
18000776:	8019      	strh	r1, [r3, #0]
18000778:	7892      	ldrb	r2, [r2, #2]
1800077a:	709a      	strb	r2, [r3, #2]
1800077c:	1c3b      	adds	r3, r7, #0
1800077e:	3314      	adds	r3, #20
18000780:	1c18      	adds	r0, r3, #0
18000782:	2189      	movs	r1, #137	; 0x89
18000784:	f7ff fce8 	bl	18000158 <HAL_assert_fail>
	HAL_ASSERT( rx_buffer != NULL_buffer )
18000788:	4b35      	ldr	r3, [pc, #212]	; (18000860 <UART_get_rx+0x118>)
1800078a:	681b      	ldr	r3, [r3, #0]
1800078c:	68ba      	ldr	r2, [r7, #8]
1800078e:	429a      	cmp	r2, r3
18000790:	d112      	bne.n	180007b8 <UART_get_rx+0x70>
18000792:	1c3b      	adds	r3, r7, #0
18000794:	3314      	adds	r3, #20
18000796:	4a31      	ldr	r2, [pc, #196]	; (1800085c <UART_get_rx+0x114>)
18000798:	ca13      	ldmia	r2!, {r0, r1, r4}
1800079a:	c313      	stmia	r3!, {r0, r1, r4}
1800079c:	ca13      	ldmia	r2!, {r0, r1, r4}
1800079e:	c313      	stmia	r3!, {r0, r1, r4}
180007a0:	ca13      	ldmia	r2!, {r0, r1, r4}
180007a2:	c313      	stmia	r3!, {r0, r1, r4}
180007a4:	8811      	ldrh	r1, [r2, #0]
180007a6:	8019      	strh	r1, [r3, #0]
180007a8:	7892      	ldrb	r2, [r2, #2]
180007aa:	709a      	strb	r2, [r3, #2]
180007ac:	1c3b      	adds	r3, r7, #0
180007ae:	3314      	adds	r3, #20
180007b0:	1c18      	adds	r0, r3, #0
180007b2:	218a      	movs	r1, #138	; 0x8a
180007b4:	f7ff fcd0 	bl	18000158 <HAL_assert_fail>
	HAL_ASSERT( buff_size > 0 )
180007b8:	687b      	ldr	r3, [r7, #4]
180007ba:	2b00      	cmp	r3, #0
180007bc:	d112      	bne.n	180007e4 <UART_get_rx+0x9c>
180007be:	1c3b      	adds	r3, r7, #0
180007c0:	3314      	adds	r3, #20
180007c2:	4a26      	ldr	r2, [pc, #152]	; (1800085c <UART_get_rx+0x114>)
180007c4:	ca13      	ldmia	r2!, {r0, r1, r4}
180007c6:	c313      	stmia	r3!, {r0, r1, r4}
180007c8:	ca13      	ldmia	r2!, {r0, r1, r4}
180007ca:	c313      	stmia	r3!, {r0, r1, r4}
180007cc:	ca13      	ldmia	r2!, {r0, r1, r4}
180007ce:	c313      	stmia	r3!, {r0, r1, r4}
180007d0:	8811      	ldrh	r1, [r2, #0]
180007d2:	8019      	strh	r1, [r3, #0]
180007d4:	7892      	ldrb	r2, [r2, #2]
180007d6:	709a      	strb	r2, [r3, #2]
180007d8:	1c3b      	adds	r3, r7, #0
180007da:	3314      	adds	r3, #20
180007dc:	1c18      	adds	r0, r3, #0
180007de:	218b      	movs	r1, #139	; 0x8b
180007e0:	f7ff fcba 	bl	18000158 <HAL_assert_fail>
      
    rx_idx = 0;
180007e4:	2300      	movs	r3, #0
180007e6:	63fb      	str	r3, [r7, #60]	; 0x3c
    rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_RXFULL_MASK;
180007e8:	68fb      	ldr	r3, [r7, #12]
180007ea:	681b      	ldr	r3, [r3, #0]
180007ec:	3310      	adds	r3, #16
180007ee:	1c18      	adds	r0, r3, #0
180007f0:	f7ff fcec 	bl	180001cc <HW_get_8bit_reg>
180007f4:	1c03      	adds	r3, r0, #0
180007f6:	1c19      	adds	r1, r3, #0
180007f8:	1c3b      	adds	r3, r7, #0
180007fa:	333b      	adds	r3, #59	; 0x3b
180007fc:	2202      	movs	r2, #2
180007fe:	400a      	ands	r2, r1
18000800:	701a      	strb	r2, [r3, #0]
    while ( ( rx_full ) && ( rx_idx < buff_size ) )
18000802:	e01a      	b.n	1800083a <UART_get_rx+0xf2>
    {
        rx_buffer[rx_idx] = HAL_get_8bit_reg( this_uart->base_address, RXDATA );
18000804:	68ba      	ldr	r2, [r7, #8]
18000806:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
18000808:	18d4      	adds	r4, r2, r3
1800080a:	68fb      	ldr	r3, [r7, #12]
1800080c:	681b      	ldr	r3, [r3, #0]
1800080e:	3304      	adds	r3, #4
18000810:	1c18      	adds	r0, r3, #0
18000812:	f7ff fcdb 	bl	180001cc <HW_get_8bit_reg>
18000816:	1c03      	adds	r3, r0, #0
18000818:	7023      	strb	r3, [r4, #0]
        rx_idx++;
1800081a:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
1800081c:	3301      	adds	r3, #1
1800081e:	63fb      	str	r3, [r7, #60]	; 0x3c
        rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_RXFULL_MASK;
18000820:	68fb      	ldr	r3, [r7, #12]
18000822:	681b      	ldr	r3, [r3, #0]
18000824:	3310      	adds	r3, #16
18000826:	1c18      	adds	r0, r3, #0
18000828:	f7ff fcd0 	bl	180001cc <HW_get_8bit_reg>
1800082c:	1c03      	adds	r3, r0, #0
1800082e:	1c19      	adds	r1, r3, #0
18000830:	1c3b      	adds	r3, r7, #0
18000832:	333b      	adds	r3, #59	; 0x3b
18000834:	2202      	movs	r2, #2
18000836:	400a      	ands	r2, r1
18000838:	701a      	strb	r2, [r3, #0]
	HAL_ASSERT( rx_buffer != NULL_buffer )
	HAL_ASSERT( buff_size > 0 )
      
    rx_idx = 0;
    rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_RXFULL_MASK;
    while ( ( rx_full ) && ( rx_idx < buff_size ) )
1800083a:	1c3b      	adds	r3, r7, #0
1800083c:	333b      	adds	r3, #59	; 0x3b
1800083e:	781b      	ldrb	r3, [r3, #0]
18000840:	2b00      	cmp	r3, #0
18000842:	d003      	beq.n	1800084c <UART_get_rx+0x104>
18000844:	6bfa      	ldr	r2, [r7, #60]	; 0x3c
18000846:	687b      	ldr	r3, [r7, #4]
18000848:	429a      	cmp	r2, r3
1800084a:	d3db      	bcc.n	18000804 <UART_get_rx+0xbc>
        rx_buffer[rx_idx] = HAL_get_8bit_reg( this_uart->base_address, RXDATA );
        rx_idx++;
        rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) & STATUS_RXFULL_MASK;
    }
    
	return rx_idx;
1800084c:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
}
1800084e:	1c18      	adds	r0, r3, #0
18000850:	46bd      	mov	sp, r7
18000852:	b011      	add	sp, #68	; 0x44
18000854:	bd90      	pop	{r4, r7, pc}
18000856:	46c0      	nop			; (mov r8, r8)
18000858:	18001b7c 	.word	0x18001b7c
1800085c:	180012ac 	.word	0x180012ac
18000860:	18001b80 	.word	0x18001b80

18000864 <abort>:
18000864:	b508      	push	{r3, lr}
18000866:	2006      	movs	r0, #6
18000868:	f000 f8ac 	bl	180009c4 <raise>
1800086c:	2001      	movs	r0, #1
1800086e:	f7ff fcd9 	bl	18000224 <_exit>
18000872:	46c0      	nop			; (mov r8, r8)

18000874 <_wrapup_reent>:
18000874:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
18000876:	1c07      	adds	r7, r0, #0
18000878:	2800      	cmp	r0, #0
1800087a:	d018      	beq.n	180008ae <_wrapup_reent+0x3a>
1800087c:	23a4      	movs	r3, #164	; 0xa4
1800087e:	005b      	lsls	r3, r3, #1
18000880:	58fe      	ldr	r6, [r7, r3]
18000882:	2e00      	cmp	r6, #0
18000884:	d00d      	beq.n	180008a2 <_wrapup_reent+0x2e>
18000886:	6873      	ldr	r3, [r6, #4]
18000888:	1e5c      	subs	r4, r3, #1
1800088a:	d407      	bmi.n	1800089c <_wrapup_reent+0x28>
1800088c:	1c5d      	adds	r5, r3, #1
1800088e:	00ad      	lsls	r5, r5, #2
18000890:	1975      	adds	r5, r6, r5
18000892:	682b      	ldr	r3, [r5, #0]
18000894:	4798      	blx	r3
18000896:	3d04      	subs	r5, #4
18000898:	3c01      	subs	r4, #1
1800089a:	d5fa      	bpl.n	18000892 <_wrapup_reent+0x1e>
1800089c:	6836      	ldr	r6, [r6, #0]
1800089e:	2e00      	cmp	r6, #0
180008a0:	d1f1      	bne.n	18000886 <_wrapup_reent+0x12>
180008a2:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
180008a4:	2b00      	cmp	r3, #0
180008a6:	d001      	beq.n	180008ac <_wrapup_reent+0x38>
180008a8:	1c38      	adds	r0, r7, #0
180008aa:	4798      	blx	r3
180008ac:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
180008ae:	4b01      	ldr	r3, [pc, #4]	; (180008b4 <_wrapup_reent+0x40>)
180008b0:	681f      	ldr	r7, [r3, #0]
180008b2:	e7e3      	b.n	1800087c <_wrapup_reent+0x8>
180008b4:	18001310 	.word	0x18001310

180008b8 <cleanup_glue>:
180008b8:	b538      	push	{r3, r4, r5, lr}
180008ba:	1c0c      	adds	r4, r1, #0
180008bc:	6809      	ldr	r1, [r1, #0]
180008be:	1c05      	adds	r5, r0, #0
180008c0:	2900      	cmp	r1, #0
180008c2:	d001      	beq.n	180008c8 <cleanup_glue+0x10>
180008c4:	f7ff fff8 	bl	180008b8 <cleanup_glue>
180008c8:	1c28      	adds	r0, r5, #0
180008ca:	1c21      	adds	r1, r4, #0
180008cc:	f000 f978 	bl	18000bc0 <_free_r>
180008d0:	bd38      	pop	{r3, r4, r5, pc}
180008d2:	46c0      	nop			; (mov r8, r8)

180008d4 <_reclaim_reent>:
180008d4:	b570      	push	{r4, r5, r6, lr}
180008d6:	4b24      	ldr	r3, [pc, #144]	; (18000968 <_reclaim_reent+0x94>)
180008d8:	1c05      	adds	r5, r0, #0
180008da:	681b      	ldr	r3, [r3, #0]
180008dc:	4298      	cmp	r0, r3
180008de:	d035      	beq.n	1800094c <_reclaim_reent+0x78>
180008e0:	6cc3      	ldr	r3, [r0, #76]	; 0x4c
180008e2:	2b00      	cmp	r3, #0
180008e4:	d011      	beq.n	1800090a <_reclaim_reent+0x36>
180008e6:	2600      	movs	r6, #0
180008e8:	5999      	ldr	r1, [r3, r6]
180008ea:	2900      	cmp	r1, #0
180008ec:	d006      	beq.n	180008fc <_reclaim_reent+0x28>
180008ee:	680c      	ldr	r4, [r1, #0]
180008f0:	1c28      	adds	r0, r5, #0
180008f2:	f000 f965 	bl	18000bc0 <_free_r>
180008f6:	1e21      	subs	r1, r4, #0
180008f8:	d1f9      	bne.n	180008ee <_reclaim_reent+0x1a>
180008fa:	6ceb      	ldr	r3, [r5, #76]	; 0x4c
180008fc:	3604      	adds	r6, #4
180008fe:	2e3c      	cmp	r6, #60	; 0x3c
18000900:	d1f2      	bne.n	180008e8 <_reclaim_reent+0x14>
18000902:	1c28      	adds	r0, r5, #0
18000904:	1c19      	adds	r1, r3, #0
18000906:	f000 f95b 	bl	18000bc0 <_free_r>
1800090a:	6c29      	ldr	r1, [r5, #64]	; 0x40
1800090c:	2900      	cmp	r1, #0
1800090e:	d002      	beq.n	18000916 <_reclaim_reent+0x42>
18000910:	1c28      	adds	r0, r5, #0
18000912:	f000 f955 	bl	18000bc0 <_free_r>
18000916:	23a4      	movs	r3, #164	; 0xa4
18000918:	005b      	lsls	r3, r3, #1
1800091a:	58e9      	ldr	r1, [r5, r3]
1800091c:	2900      	cmp	r1, #0
1800091e:	d00c      	beq.n	1800093a <_reclaim_reent+0x66>
18000920:	23a6      	movs	r3, #166	; 0xa6
18000922:	005b      	lsls	r3, r3, #1
18000924:	18ee      	adds	r6, r5, r3
18000926:	42b1      	cmp	r1, r6
18000928:	d101      	bne.n	1800092e <_reclaim_reent+0x5a>
1800092a:	e006      	b.n	1800093a <_reclaim_reent+0x66>
1800092c:	1c21      	adds	r1, r4, #0
1800092e:	680c      	ldr	r4, [r1, #0]
18000930:	1c28      	adds	r0, r5, #0
18000932:	f000 f945 	bl	18000bc0 <_free_r>
18000936:	42a6      	cmp	r6, r4
18000938:	d1f8      	bne.n	1800092c <_reclaim_reent+0x58>
1800093a:	6d69      	ldr	r1, [r5, #84]	; 0x54
1800093c:	2900      	cmp	r1, #0
1800093e:	d002      	beq.n	18000946 <_reclaim_reent+0x72>
18000940:	1c28      	adds	r0, r5, #0
18000942:	f000 f93d 	bl	18000bc0 <_free_r>
18000946:	6bab      	ldr	r3, [r5, #56]	; 0x38
18000948:	2b00      	cmp	r3, #0
1800094a:	d100      	bne.n	1800094e <_reclaim_reent+0x7a>
1800094c:	bd70      	pop	{r4, r5, r6, pc}
1800094e:	6beb      	ldr	r3, [r5, #60]	; 0x3c
18000950:	1c28      	adds	r0, r5, #0
18000952:	4798      	blx	r3
18000954:	23b8      	movs	r3, #184	; 0xb8
18000956:	009b      	lsls	r3, r3, #2
18000958:	58e9      	ldr	r1, [r5, r3]
1800095a:	2900      	cmp	r1, #0
1800095c:	d0f6      	beq.n	1800094c <_reclaim_reent+0x78>
1800095e:	1c28      	adds	r0, r5, #0
18000960:	f7ff ffaa 	bl	180008b8 <cleanup_glue>
18000964:	e7f2      	b.n	1800094c <_reclaim_reent+0x78>
18000966:	46c0      	nop			; (mov r8, r8)
18000968:	18001310 	.word	0x18001310

1800096c <_raise_r>:
1800096c:	b538      	push	{r3, r4, r5, lr}
1800096e:	1c05      	adds	r5, r0, #0
18000970:	1c0c      	adds	r4, r1, #0
18000972:	291f      	cmp	r1, #31
18000974:	d820      	bhi.n	180009b8 <_raise_r+0x4c>
18000976:	23b7      	movs	r3, #183	; 0xb7
18000978:	009b      	lsls	r3, r3, #2
1800097a:	58c3      	ldr	r3, [r0, r3]
1800097c:	2b00      	cmp	r3, #0
1800097e:	d012      	beq.n	180009a6 <_raise_r+0x3a>
18000980:	008a      	lsls	r2, r1, #2
18000982:	189a      	adds	r2, r3, r2
18000984:	6813      	ldr	r3, [r2, #0]
18000986:	2b00      	cmp	r3, #0
18000988:	d00d      	beq.n	180009a6 <_raise_r+0x3a>
1800098a:	2b01      	cmp	r3, #1
1800098c:	d005      	beq.n	1800099a <_raise_r+0x2e>
1800098e:	1c59      	adds	r1, r3, #1
18000990:	d005      	beq.n	1800099e <_raise_r+0x32>
18000992:	2100      	movs	r1, #0
18000994:	6011      	str	r1, [r2, #0]
18000996:	1c20      	adds	r0, r4, #0
18000998:	4798      	blx	r3
1800099a:	2000      	movs	r0, #0
1800099c:	bd38      	pop	{r3, r4, r5, pc}
1800099e:	2316      	movs	r3, #22
180009a0:	6003      	str	r3, [r0, #0]
180009a2:	2001      	movs	r0, #1
180009a4:	e7fa      	b.n	1800099c <_raise_r+0x30>
180009a6:	1c28      	adds	r0, r5, #0
180009a8:	f000 f894 	bl	18000ad4 <_getpid_r>
180009ac:	1c22      	adds	r2, r4, #0
180009ae:	1c01      	adds	r1, r0, #0
180009b0:	1c28      	adds	r0, r5, #0
180009b2:	f000 f893 	bl	18000adc <_kill_r>
180009b6:	e7f1      	b.n	1800099c <_raise_r+0x30>
180009b8:	2316      	movs	r3, #22
180009ba:	6003      	str	r3, [r0, #0]
180009bc:	2001      	movs	r0, #1
180009be:	4240      	negs	r0, r0
180009c0:	e7ec      	b.n	1800099c <_raise_r+0x30>
180009c2:	46c0      	nop			; (mov r8, r8)

180009c4 <raise>:
180009c4:	b508      	push	{r3, lr}
180009c6:	4b03      	ldr	r3, [pc, #12]	; (180009d4 <raise+0x10>)
180009c8:	1c01      	adds	r1, r0, #0
180009ca:	6818      	ldr	r0, [r3, #0]
180009cc:	f7ff ffce 	bl	1800096c <_raise_r>
180009d0:	bd08      	pop	{r3, pc}
180009d2:	46c0      	nop			; (mov r8, r8)
180009d4:	18001310 	.word	0x18001310

180009d8 <_init_signal_r>:
180009d8:	b538      	push	{r3, r4, r5, lr}
180009da:	24b7      	movs	r4, #183	; 0xb7
180009dc:	00a4      	lsls	r4, r4, #2
180009de:	5903      	ldr	r3, [r0, r4]
180009e0:	1c05      	adds	r5, r0, #0
180009e2:	2b00      	cmp	r3, #0
180009e4:	d001      	beq.n	180009ea <_init_signal_r+0x12>
180009e6:	2000      	movs	r0, #0
180009e8:	bd38      	pop	{r3, r4, r5, pc}
180009ea:	2180      	movs	r1, #128	; 0x80
180009ec:	f000 f9bc 	bl	18000d68 <_malloc_r>
180009f0:	5128      	str	r0, [r5, r4]
180009f2:	2800      	cmp	r0, #0
180009f4:	d006      	beq.n	18000a04 <_init_signal_r+0x2c>
180009f6:	1c02      	adds	r2, r0, #0
180009f8:	3280      	adds	r2, #128	; 0x80
180009fa:	2300      	movs	r3, #0
180009fc:	c008      	stmia	r0!, {r3}
180009fe:	4290      	cmp	r0, r2
18000a00:	d1fc      	bne.n	180009fc <_init_signal_r+0x24>
18000a02:	e7f0      	b.n	180009e6 <_init_signal_r+0xe>
18000a04:	2001      	movs	r0, #1
18000a06:	4240      	negs	r0, r0
18000a08:	e7ee      	b.n	180009e8 <_init_signal_r+0x10>
18000a0a:	46c0      	nop			; (mov r8, r8)

18000a0c <_init_signal>:
18000a0c:	b508      	push	{r3, lr}
18000a0e:	4b02      	ldr	r3, [pc, #8]	; (18000a18 <_init_signal+0xc>)
18000a10:	6818      	ldr	r0, [r3, #0]
18000a12:	f7ff ffe1 	bl	180009d8 <_init_signal_r>
18000a16:	bd08      	pop	{r3, pc}
18000a18:	18001310 	.word	0x18001310

18000a1c <__sigtramp_r>:
18000a1c:	b570      	push	{r4, r5, r6, lr}
18000a1e:	1c06      	adds	r6, r0, #0
18000a20:	1c0c      	adds	r4, r1, #0
18000a22:	291f      	cmp	r1, #31
18000a24:	d813      	bhi.n	18000a4e <__sigtramp_r+0x32>
18000a26:	25b7      	movs	r5, #183	; 0xb7
18000a28:	00ad      	lsls	r5, r5, #2
18000a2a:	5943      	ldr	r3, [r0, r5]
18000a2c:	2b00      	cmp	r3, #0
18000a2e:	d017      	beq.n	18000a60 <__sigtramp_r+0x44>
18000a30:	00a2      	lsls	r2, r4, #2
18000a32:	189a      	adds	r2, r3, r2
18000a34:	6813      	ldr	r3, [r2, #0]
18000a36:	2b00      	cmp	r3, #0
18000a38:	d00e      	beq.n	18000a58 <__sigtramp_r+0x3c>
18000a3a:	1c59      	adds	r1, r3, #1
18000a3c:	d00e      	beq.n	18000a5c <__sigtramp_r+0x40>
18000a3e:	2b01      	cmp	r3, #1
18000a40:	d008      	beq.n	18000a54 <__sigtramp_r+0x38>
18000a42:	2100      	movs	r1, #0
18000a44:	1c20      	adds	r0, r4, #0
18000a46:	6011      	str	r1, [r2, #0]
18000a48:	4798      	blx	r3
18000a4a:	2000      	movs	r0, #0
18000a4c:	bd70      	pop	{r4, r5, r6, pc}
18000a4e:	2001      	movs	r0, #1
18000a50:	4240      	negs	r0, r0
18000a52:	e7fb      	b.n	18000a4c <__sigtramp_r+0x30>
18000a54:	2003      	movs	r0, #3
18000a56:	e7f9      	b.n	18000a4c <__sigtramp_r+0x30>
18000a58:	2001      	movs	r0, #1
18000a5a:	e7f7      	b.n	18000a4c <__sigtramp_r+0x30>
18000a5c:	2002      	movs	r0, #2
18000a5e:	e7f5      	b.n	18000a4c <__sigtramp_r+0x30>
18000a60:	f7ff ffba 	bl	180009d8 <_init_signal_r>
18000a64:	2800      	cmp	r0, #0
18000a66:	d1f2      	bne.n	18000a4e <__sigtramp_r+0x32>
18000a68:	5973      	ldr	r3, [r6, r5]
18000a6a:	e7e1      	b.n	18000a30 <__sigtramp_r+0x14>

18000a6c <__sigtramp>:
18000a6c:	b508      	push	{r3, lr}
18000a6e:	4b03      	ldr	r3, [pc, #12]	; (18000a7c <__sigtramp+0x10>)
18000a70:	1c01      	adds	r1, r0, #0
18000a72:	6818      	ldr	r0, [r3, #0]
18000a74:	f7ff ffd2 	bl	18000a1c <__sigtramp_r>
18000a78:	bd08      	pop	{r3, pc}
18000a7a:	46c0      	nop			; (mov r8, r8)
18000a7c:	18001310 	.word	0x18001310

18000a80 <_signal_r>:
18000a80:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
18000a82:	1c05      	adds	r5, r0, #0
18000a84:	1c0c      	adds	r4, r1, #0
18000a86:	1c16      	adds	r6, r2, #0
18000a88:	291f      	cmp	r1, #31
18000a8a:	d809      	bhi.n	18000aa0 <_signal_r+0x20>
18000a8c:	27b7      	movs	r7, #183	; 0xb7
18000a8e:	00bf      	lsls	r7, r7, #2
18000a90:	59c3      	ldr	r3, [r0, r7]
18000a92:	2b00      	cmp	r3, #0
18000a94:	d009      	beq.n	18000aaa <_signal_r+0x2a>
18000a96:	00a4      	lsls	r4, r4, #2
18000a98:	191b      	adds	r3, r3, r4
18000a9a:	6818      	ldr	r0, [r3, #0]
18000a9c:	601e      	str	r6, [r3, #0]
18000a9e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
18000aa0:	2316      	movs	r3, #22
18000aa2:	6003      	str	r3, [r0, #0]
18000aa4:	2001      	movs	r0, #1
18000aa6:	4240      	negs	r0, r0
18000aa8:	e7f9      	b.n	18000a9e <_signal_r+0x1e>
18000aaa:	f7ff ff95 	bl	180009d8 <_init_signal_r>
18000aae:	2800      	cmp	r0, #0
18000ab0:	d101      	bne.n	18000ab6 <_signal_r+0x36>
18000ab2:	59eb      	ldr	r3, [r5, r7]
18000ab4:	e7ef      	b.n	18000a96 <_signal_r+0x16>
18000ab6:	2001      	movs	r0, #1
18000ab8:	4240      	negs	r0, r0
18000aba:	e7f0      	b.n	18000a9e <_signal_r+0x1e>

18000abc <signal>:
18000abc:	b508      	push	{r3, lr}
18000abe:	1c0a      	adds	r2, r1, #0
18000ac0:	4903      	ldr	r1, [pc, #12]	; (18000ad0 <signal+0x14>)
18000ac2:	1c03      	adds	r3, r0, #0
18000ac4:	6808      	ldr	r0, [r1, #0]
18000ac6:	1c19      	adds	r1, r3, #0
18000ac8:	f7ff ffda 	bl	18000a80 <_signal_r>
18000acc:	bd08      	pop	{r3, pc}
18000ace:	46c0      	nop			; (mov r8, r8)
18000ad0:	18001310 	.word	0x18001310

18000ad4 <_getpid_r>:
18000ad4:	b508      	push	{r3, lr}
18000ad6:	f7ff fbc5 	bl	18000264 <_getpid>
18000ada:	bd08      	pop	{r3, pc}

18000adc <_kill_r>:
18000adc:	b538      	push	{r3, r4, r5, lr}
18000ade:	4c08      	ldr	r4, [pc, #32]	; (18000b00 <_kill_r+0x24>)
18000ae0:	2300      	movs	r3, #0
18000ae2:	1c05      	adds	r5, r0, #0
18000ae4:	6023      	str	r3, [r4, #0]
18000ae6:	1c08      	adds	r0, r1, #0
18000ae8:	1c11      	adds	r1, r2, #0
18000aea:	f7ff fbcb 	bl	18000284 <_kill>
18000aee:	1c43      	adds	r3, r0, #1
18000af0:	d000      	beq.n	18000af4 <_kill_r+0x18>
18000af2:	bd38      	pop	{r3, r4, r5, pc}
18000af4:	6823      	ldr	r3, [r4, #0]
18000af6:	2b00      	cmp	r3, #0
18000af8:	d0fb      	beq.n	18000af2 <_kill_r+0x16>
18000afa:	602b      	str	r3, [r5, #0]
18000afc:	e7f9      	b.n	18000af2 <_kill_r+0x16>
18000afe:	46c0      	nop			; (mov r8, r8)
18000b00:	18001bb8 	.word	0x18001bb8

18000b04 <write>:
18000b04:	b538      	push	{r3, r4, r5, lr}
18000b06:	1c13      	adds	r3, r2, #0
18000b08:	4a04      	ldr	r2, [pc, #16]	; (18000b1c <write+0x18>)
18000b0a:	1c05      	adds	r5, r0, #0
18000b0c:	1c0c      	adds	r4, r1, #0
18000b0e:	6810      	ldr	r0, [r2, #0]
18000b10:	1c29      	adds	r1, r5, #0
18000b12:	1c22      	adds	r2, r4, #0
18000b14:	f7ff fc64 	bl	180003e0 <_write_r>
18000b18:	bd38      	pop	{r3, r4, r5, pc}
18000b1a:	46c0      	nop			; (mov r8, r8)
18000b1c:	18001310 	.word	0x18001310

18000b20 <_malloc_trim_r>:
18000b20:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
18000b22:	1c0f      	adds	r7, r1, #0
18000b24:	1c04      	adds	r4, r0, #0
18000b26:	f000 fb9d 	bl	18001264 <__malloc_lock>
18000b2a:	4d20      	ldr	r5, [pc, #128]	; (18000bac <_malloc_trim_r+0x8c>)
18000b2c:	4a20      	ldr	r2, [pc, #128]	; (18000bb0 <_malloc_trim_r+0x90>)
18000b2e:	68ab      	ldr	r3, [r5, #8]
18000b30:	685e      	ldr	r6, [r3, #4]
18000b32:	2303      	movs	r3, #3
18000b34:	439e      	bics	r6, r3
18000b36:	18b3      	adds	r3, r6, r2
18000b38:	1bdf      	subs	r7, r3, r7
18000b3a:	0b3f      	lsrs	r7, r7, #12
18000b3c:	3f01      	subs	r7, #1
18000b3e:	4b1d      	ldr	r3, [pc, #116]	; (18000bb4 <_malloc_trim_r+0x94>)
18000b40:	033f      	lsls	r7, r7, #12
18000b42:	429f      	cmp	r7, r3
18000b44:	dd07      	ble.n	18000b56 <_malloc_trim_r+0x36>
18000b46:	1c20      	adds	r0, r4, #0
18000b48:	2100      	movs	r1, #0
18000b4a:	f000 fb8f 	bl	1800126c <_sbrk_r>
18000b4e:	68ab      	ldr	r3, [r5, #8]
18000b50:	18f3      	adds	r3, r6, r3
18000b52:	4283      	cmp	r3, r0
18000b54:	d004      	beq.n	18000b60 <_malloc_trim_r+0x40>
18000b56:	1c20      	adds	r0, r4, #0
18000b58:	f000 fb86 	bl	18001268 <__malloc_unlock>
18000b5c:	2000      	movs	r0, #0
18000b5e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
18000b60:	4279      	negs	r1, r7
18000b62:	1c20      	adds	r0, r4, #0
18000b64:	f000 fb82 	bl	1800126c <_sbrk_r>
18000b68:	3001      	adds	r0, #1
18000b6a:	d00d      	beq.n	18000b88 <_malloc_trim_r+0x68>
18000b6c:	68ab      	ldr	r3, [r5, #8]
18000b6e:	1bf6      	subs	r6, r6, r7
18000b70:	2201      	movs	r2, #1
18000b72:	4316      	orrs	r6, r2
18000b74:	605e      	str	r6, [r3, #4]
18000b76:	4b10      	ldr	r3, [pc, #64]	; (18000bb8 <_malloc_trim_r+0x98>)
18000b78:	1c20      	adds	r0, r4, #0
18000b7a:	681a      	ldr	r2, [r3, #0]
18000b7c:	1bd7      	subs	r7, r2, r7
18000b7e:	601f      	str	r7, [r3, #0]
18000b80:	f000 fb72 	bl	18001268 <__malloc_unlock>
18000b84:	2001      	movs	r0, #1
18000b86:	e7ea      	b.n	18000b5e <_malloc_trim_r+0x3e>
18000b88:	1c20      	adds	r0, r4, #0
18000b8a:	2100      	movs	r1, #0
18000b8c:	f000 fb6e 	bl	1800126c <_sbrk_r>
18000b90:	68ab      	ldr	r3, [r5, #8]
18000b92:	1ac2      	subs	r2, r0, r3
18000b94:	2a0f      	cmp	r2, #15
18000b96:	ddde      	ble.n	18000b56 <_malloc_trim_r+0x36>
18000b98:	4908      	ldr	r1, [pc, #32]	; (18000bbc <_malloc_trim_r+0x9c>)
18000b9a:	6809      	ldr	r1, [r1, #0]
18000b9c:	1a40      	subs	r0, r0, r1
18000b9e:	4906      	ldr	r1, [pc, #24]	; (18000bb8 <_malloc_trim_r+0x98>)
18000ba0:	6008      	str	r0, [r1, #0]
18000ba2:	2101      	movs	r1, #1
18000ba4:	430a      	orrs	r2, r1
18000ba6:	605a      	str	r2, [r3, #4]
18000ba8:	e7d5      	b.n	18000b56 <_malloc_trim_r+0x36>
18000baa:	46c0      	nop			; (mov r8, r8)
18000bac:	18001740 	.word	0x18001740
18000bb0:	00000fef 	.word	0x00000fef
18000bb4:	00000fff 	.word	0x00000fff
18000bb8:	18001b88 	.word	0x18001b88
18000bbc:	18001b48 	.word	0x18001b48

18000bc0 <_free_r>:
18000bc0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
18000bc2:	4657      	mov	r7, sl
18000bc4:	4646      	mov	r6, r8
18000bc6:	b4c0      	push	{r6, r7}
18000bc8:	1c05      	adds	r5, r0, #0
18000bca:	1c0c      	adds	r4, r1, #0
18000bcc:	2900      	cmp	r1, #0
18000bce:	d05b      	beq.n	18000c88 <_free_r+0xc8>
18000bd0:	3c08      	subs	r4, #8
18000bd2:	f000 fb47 	bl	18001264 <__malloc_lock>
18000bd6:	6867      	ldr	r7, [r4, #4]
18000bd8:	2001      	movs	r0, #1
18000bda:	1c3b      	adds	r3, r7, #0
18000bdc:	4383      	bics	r3, r0
18000bde:	18e2      	adds	r2, r4, r3
18000be0:	4680      	mov	r8, r0
18000be2:	6850      	ldr	r0, [r2, #4]
18000be4:	2103      	movs	r1, #3
18000be6:	4388      	bics	r0, r1
18000be8:	4959      	ldr	r1, [pc, #356]	; (18000d50 <_free_r+0x190>)
18000bea:	688e      	ldr	r6, [r1, #8]
18000bec:	46b4      	mov	ip, r6
18000bee:	4594      	cmp	ip, r2
18000bf0:	d06a      	beq.n	18000cc8 <_free_r+0x108>
18000bf2:	4646      	mov	r6, r8
18000bf4:	6050      	str	r0, [r2, #4]
18000bf6:	4237      	tst	r7, r6
18000bf8:	d10b      	bne.n	18000c12 <_free_r+0x52>
18000bfa:	6826      	ldr	r6, [r4, #0]
18000bfc:	1c0f      	adds	r7, r1, #0
18000bfe:	1ba4      	subs	r4, r4, r6
18000c00:	199b      	adds	r3, r3, r6
18000c02:	68a6      	ldr	r6, [r4, #8]
18000c04:	3708      	adds	r7, #8
18000c06:	42be      	cmp	r6, r7
18000c08:	d100      	bne.n	18000c0c <_free_r+0x4c>
18000c0a:	e076      	b.n	18000cfa <_free_r+0x13a>
18000c0c:	68e7      	ldr	r7, [r4, #12]
18000c0e:	60f7      	str	r7, [r6, #12]
18000c10:	60be      	str	r6, [r7, #8]
18000c12:	2700      	movs	r7, #0
18000c14:	46ba      	mov	sl, r7
18000c16:	1817      	adds	r7, r2, r0
18000c18:	687f      	ldr	r7, [r7, #4]
18000c1a:	2601      	movs	r6, #1
18000c1c:	46b0      	mov	r8, r6
18000c1e:	4237      	tst	r7, r6
18000c20:	d107      	bne.n	18000c32 <_free_r+0x72>
18000c22:	4657      	mov	r7, sl
18000c24:	181b      	adds	r3, r3, r0
18000c26:	2f00      	cmp	r7, #0
18000c28:	d032      	beq.n	18000c90 <_free_r+0xd0>
18000c2a:	6890      	ldr	r0, [r2, #8]
18000c2c:	68d2      	ldr	r2, [r2, #12]
18000c2e:	60c2      	str	r2, [r0, #12]
18000c30:	6090      	str	r0, [r2, #8]
18000c32:	2201      	movs	r2, #1
18000c34:	1c18      	adds	r0, r3, #0
18000c36:	4310      	orrs	r0, r2
18000c38:	4657      	mov	r7, sl
18000c3a:	6060      	str	r0, [r4, #4]
18000c3c:	50e3      	str	r3, [r4, r3]
18000c3e:	2f00      	cmp	r7, #0
18000c40:	d11f      	bne.n	18000c82 <_free_r+0xc2>
18000c42:	4844      	ldr	r0, [pc, #272]	; (18000d54 <_free_r+0x194>)
18000c44:	4283      	cmp	r3, r0
18000c46:	d931      	bls.n	18000cac <_free_r+0xec>
18000c48:	0a5a      	lsrs	r2, r3, #9
18000c4a:	2a04      	cmp	r2, #4
18000c4c:	d858      	bhi.n	18000d00 <_free_r+0x140>
18000c4e:	099e      	lsrs	r6, r3, #6
18000c50:	3638      	adds	r6, #56	; 0x38
18000c52:	00f0      	lsls	r0, r6, #3
18000c54:	1808      	adds	r0, r1, r0
18000c56:	6882      	ldr	r2, [r0, #8]
18000c58:	4282      	cmp	r2, r0
18000c5a:	d057      	beq.n	18000d0c <_free_r+0x14c>
18000c5c:	6851      	ldr	r1, [r2, #4]
18000c5e:	2603      	movs	r6, #3
18000c60:	43b1      	bics	r1, r6
18000c62:	428b      	cmp	r3, r1
18000c64:	d208      	bcs.n	18000c78 <_free_r+0xb8>
18000c66:	2603      	movs	r6, #3
18000c68:	e003      	b.n	18000c72 <_free_r+0xb2>
18000c6a:	6851      	ldr	r1, [r2, #4]
18000c6c:	43b1      	bics	r1, r6
18000c6e:	428b      	cmp	r3, r1
18000c70:	d202      	bcs.n	18000c78 <_free_r+0xb8>
18000c72:	6892      	ldr	r2, [r2, #8]
18000c74:	4290      	cmp	r0, r2
18000c76:	d1f8      	bne.n	18000c6a <_free_r+0xaa>
18000c78:	68d3      	ldr	r3, [r2, #12]
18000c7a:	60e3      	str	r3, [r4, #12]
18000c7c:	60a2      	str	r2, [r4, #8]
18000c7e:	60d4      	str	r4, [r2, #12]
18000c80:	609c      	str	r4, [r3, #8]
18000c82:	1c28      	adds	r0, r5, #0
18000c84:	f000 faf0 	bl	18001268 <__malloc_unlock>
18000c88:	bc0c      	pop	{r2, r3}
18000c8a:	4690      	mov	r8, r2
18000c8c:	469a      	mov	sl, r3
18000c8e:	bdf8      	pop	{r3, r4, r5, r6, r7, pc}
18000c90:	4e31      	ldr	r6, [pc, #196]	; (18000d58 <_free_r+0x198>)
18000c92:	6890      	ldr	r0, [r2, #8]
18000c94:	46b4      	mov	ip, r6
18000c96:	4560      	cmp	r0, ip
18000c98:	d1c8      	bne.n	18000c2c <_free_r+0x6c>
18000c9a:	4647      	mov	r7, r8
18000c9c:	431f      	orrs	r7, r3
18000c9e:	60c4      	str	r4, [r0, #12]
18000ca0:	6084      	str	r4, [r0, #8]
18000ca2:	60e0      	str	r0, [r4, #12]
18000ca4:	60a0      	str	r0, [r4, #8]
18000ca6:	6067      	str	r7, [r4, #4]
18000ca8:	50e3      	str	r3, [r4, r3]
18000caa:	e7ea      	b.n	18000c82 <_free_r+0xc2>
18000cac:	08db      	lsrs	r3, r3, #3
18000cae:	1098      	asrs	r0, r3, #2
18000cb0:	4082      	lsls	r2, r0
18000cb2:	6848      	ldr	r0, [r1, #4]
18000cb4:	00db      	lsls	r3, r3, #3
18000cb6:	4302      	orrs	r2, r0
18000cb8:	604a      	str	r2, [r1, #4]
18000cba:	18c9      	adds	r1, r1, r3
18000cbc:	688b      	ldr	r3, [r1, #8]
18000cbe:	60e1      	str	r1, [r4, #12]
18000cc0:	60a3      	str	r3, [r4, #8]
18000cc2:	60dc      	str	r4, [r3, #12]
18000cc4:	608c      	str	r4, [r1, #8]
18000cc6:	e7dc      	b.n	18000c82 <_free_r+0xc2>
18000cc8:	18c3      	adds	r3, r0, r3
18000cca:	4640      	mov	r0, r8
18000ccc:	4207      	tst	r7, r0
18000cce:	d106      	bne.n	18000cde <_free_r+0x11e>
18000cd0:	6822      	ldr	r2, [r4, #0]
18000cd2:	1aa4      	subs	r4, r4, r2
18000cd4:	68a0      	ldr	r0, [r4, #8]
18000cd6:	189b      	adds	r3, r3, r2
18000cd8:	68e2      	ldr	r2, [r4, #12]
18000cda:	60c2      	str	r2, [r0, #12]
18000cdc:	6090      	str	r0, [r2, #8]
18000cde:	2201      	movs	r2, #1
18000ce0:	431a      	orrs	r2, r3
18000ce2:	6062      	str	r2, [r4, #4]
18000ce4:	4a1d      	ldr	r2, [pc, #116]	; (18000d5c <_free_r+0x19c>)
18000ce6:	608c      	str	r4, [r1, #8]
18000ce8:	6812      	ldr	r2, [r2, #0]
18000cea:	4293      	cmp	r3, r2
18000cec:	d3c9      	bcc.n	18000c82 <_free_r+0xc2>
18000cee:	4b1c      	ldr	r3, [pc, #112]	; (18000d60 <_free_r+0x1a0>)
18000cf0:	1c28      	adds	r0, r5, #0
18000cf2:	6819      	ldr	r1, [r3, #0]
18000cf4:	f7ff ff14 	bl	18000b20 <_malloc_trim_r>
18000cf8:	e7c3      	b.n	18000c82 <_free_r+0xc2>
18000cfa:	2601      	movs	r6, #1
18000cfc:	46b2      	mov	sl, r6
18000cfe:	e78a      	b.n	18000c16 <_free_r+0x56>
18000d00:	2a14      	cmp	r2, #20
18000d02:	d80c      	bhi.n	18000d1e <_free_r+0x15e>
18000d04:	1c16      	adds	r6, r2, #0
18000d06:	365b      	adds	r6, #91	; 0x5b
18000d08:	00f0      	lsls	r0, r6, #3
18000d0a:	e7a3      	b.n	18000c54 <_free_r+0x94>
18000d0c:	10b6      	asrs	r6, r6, #2
18000d0e:	2301      	movs	r3, #1
18000d10:	40b3      	lsls	r3, r6
18000d12:	1c1e      	adds	r6, r3, #0
18000d14:	684b      	ldr	r3, [r1, #4]
18000d16:	431e      	orrs	r6, r3
18000d18:	604e      	str	r6, [r1, #4]
18000d1a:	1c13      	adds	r3, r2, #0
18000d1c:	e7ad      	b.n	18000c7a <_free_r+0xba>
18000d1e:	2a54      	cmp	r2, #84	; 0x54
18000d20:	d803      	bhi.n	18000d2a <_free_r+0x16a>
18000d22:	0b1e      	lsrs	r6, r3, #12
18000d24:	366e      	adds	r6, #110	; 0x6e
18000d26:	00f0      	lsls	r0, r6, #3
18000d28:	e794      	b.n	18000c54 <_free_r+0x94>
18000d2a:	20aa      	movs	r0, #170	; 0xaa
18000d2c:	0040      	lsls	r0, r0, #1
18000d2e:	4282      	cmp	r2, r0
18000d30:	d803      	bhi.n	18000d3a <_free_r+0x17a>
18000d32:	0bde      	lsrs	r6, r3, #15
18000d34:	3677      	adds	r6, #119	; 0x77
18000d36:	00f0      	lsls	r0, r6, #3
18000d38:	e78c      	b.n	18000c54 <_free_r+0x94>
18000d3a:	480a      	ldr	r0, [pc, #40]	; (18000d64 <_free_r+0x1a4>)
18000d3c:	4282      	cmp	r2, r0
18000d3e:	d903      	bls.n	18000d48 <_free_r+0x188>
18000d40:	20fc      	movs	r0, #252	; 0xfc
18000d42:	0080      	lsls	r0, r0, #2
18000d44:	267e      	movs	r6, #126	; 0x7e
18000d46:	e785      	b.n	18000c54 <_free_r+0x94>
18000d48:	0c9e      	lsrs	r6, r3, #18
18000d4a:	367c      	adds	r6, #124	; 0x7c
18000d4c:	00f0      	lsls	r0, r6, #3
18000d4e:	e781      	b.n	18000c54 <_free_r+0x94>
18000d50:	18001740 	.word	0x18001740
18000d54:	000001ff 	.word	0x000001ff
18000d58:	18001748 	.word	0x18001748
18000d5c:	18001b4c 	.word	0x18001b4c
18000d60:	18001b84 	.word	0x18001b84
18000d64:	00000554 	.word	0x00000554

18000d68 <_malloc_r>:
18000d68:	b5f0      	push	{r4, r5, r6, r7, lr}
18000d6a:	465f      	mov	r7, fp
18000d6c:	4656      	mov	r6, sl
18000d6e:	464d      	mov	r5, r9
18000d70:	4644      	mov	r4, r8
18000d72:	b4f0      	push	{r4, r5, r6, r7}
18000d74:	1c0c      	adds	r4, r1, #0
18000d76:	340b      	adds	r4, #11
18000d78:	b083      	sub	sp, #12
18000d7a:	1c06      	adds	r6, r0, #0
18000d7c:	2c16      	cmp	r4, #22
18000d7e:	d82f      	bhi.n	18000de0 <_malloc_r+0x78>
18000d80:	2300      	movs	r3, #0
18000d82:	2410      	movs	r4, #16
18000d84:	428c      	cmp	r4, r1
18000d86:	d209      	bcs.n	18000d9c <_malloc_r+0x34>
18000d88:	230c      	movs	r3, #12
18000d8a:	6033      	str	r3, [r6, #0]
18000d8c:	2000      	movs	r0, #0
18000d8e:	b003      	add	sp, #12
18000d90:	bc3c      	pop	{r2, r3, r4, r5}
18000d92:	4690      	mov	r8, r2
18000d94:	4699      	mov	r9, r3
18000d96:	46a2      	mov	sl, r4
18000d98:	46ab      	mov	fp, r5
18000d9a:	bdf0      	pop	{r4, r5, r6, r7, pc}
18000d9c:	2b00      	cmp	r3, #0
18000d9e:	d1f3      	bne.n	18000d88 <_malloc_r+0x20>
18000da0:	1c30      	adds	r0, r6, #0
18000da2:	f000 fa5f 	bl	18001264 <__malloc_lock>
18000da6:	4bc7      	ldr	r3, [pc, #796]	; (180010c4 <_malloc_r+0x35c>)
18000da8:	429c      	cmp	r4, r3
18000daa:	d81d      	bhi.n	18000de8 <_malloc_r+0x80>
18000dac:	08e2      	lsrs	r2, r4, #3
18000dae:	4fc6      	ldr	r7, [pc, #792]	; (180010c8 <_malloc_r+0x360>)
18000db0:	00d3      	lsls	r3, r2, #3
18000db2:	18fb      	adds	r3, r7, r3
18000db4:	68dd      	ldr	r5, [r3, #12]
18000db6:	429d      	cmp	r5, r3
18000db8:	d100      	bne.n	18000dbc <_malloc_r+0x54>
18000dba:	e19a      	b.n	180010f2 <_malloc_r+0x38a>
18000dbc:	686b      	ldr	r3, [r5, #4]
18000dbe:	2203      	movs	r2, #3
18000dc0:	68a9      	ldr	r1, [r5, #8]
18000dc2:	4393      	bics	r3, r2
18000dc4:	68ea      	ldr	r2, [r5, #12]
18000dc6:	18eb      	adds	r3, r5, r3
18000dc8:	60ca      	str	r2, [r1, #12]
18000dca:	6091      	str	r1, [r2, #8]
18000dcc:	6859      	ldr	r1, [r3, #4]
18000dce:	2201      	movs	r2, #1
18000dd0:	430a      	orrs	r2, r1
18000dd2:	1c30      	adds	r0, r6, #0
18000dd4:	605a      	str	r2, [r3, #4]
18000dd6:	f000 fa47 	bl	18001268 <__malloc_unlock>
18000dda:	1c28      	adds	r0, r5, #0
18000ddc:	3008      	adds	r0, #8
18000dde:	e7d6      	b.n	18000d8e <_malloc_r+0x26>
18000de0:	2307      	movs	r3, #7
18000de2:	439c      	bics	r4, r3
18000de4:	0fe3      	lsrs	r3, r4, #31
18000de6:	e7cd      	b.n	18000d84 <_malloc_r+0x1c>
18000de8:	0a63      	lsrs	r3, r4, #9
18000dea:	2b00      	cmp	r3, #0
18000dec:	d100      	bne.n	18000df0 <_malloc_r+0x88>
18000dee:	e08d      	b.n	18000f0c <_malloc_r+0x1a4>
18000df0:	2b04      	cmp	r3, #4
18000df2:	d900      	bls.n	18000df6 <_malloc_r+0x8e>
18000df4:	e158      	b.n	180010a8 <_malloc_r+0x340>
18000df6:	09a3      	lsrs	r3, r4, #6
18000df8:	3338      	adds	r3, #56	; 0x38
18000dfa:	4698      	mov	r8, r3
18000dfc:	00d9      	lsls	r1, r3, #3
18000dfe:	4fb2      	ldr	r7, [pc, #712]	; (180010c8 <_malloc_r+0x360>)
18000e00:	1879      	adds	r1, r7, r1
18000e02:	68cd      	ldr	r5, [r1, #12]
18000e04:	42a9      	cmp	r1, r5
18000e06:	d017      	beq.n	18000e38 <_malloc_r+0xd0>
18000e08:	686a      	ldr	r2, [r5, #4]
18000e0a:	2303      	movs	r3, #3
18000e0c:	439a      	bics	r2, r3
18000e0e:	1b13      	subs	r3, r2, r4
18000e10:	2b0f      	cmp	r3, #15
18000e12:	dd00      	ble.n	18000e16 <_malloc_r+0xae>
18000e14:	e0c1      	b.n	18000f9a <_malloc_r+0x232>
18000e16:	2b00      	cmp	r3, #0
18000e18:	db00      	blt.n	18000e1c <_malloc_r+0xb4>
18000e1a:	e0c2      	b.n	18000fa2 <_malloc_r+0x23a>
18000e1c:	2003      	movs	r0, #3
18000e1e:	e008      	b.n	18000e32 <_malloc_r+0xca>
18000e20:	686a      	ldr	r2, [r5, #4]
18000e22:	4382      	bics	r2, r0
18000e24:	1b13      	subs	r3, r2, r4
18000e26:	2b0f      	cmp	r3, #15
18000e28:	dd00      	ble.n	18000e2c <_malloc_r+0xc4>
18000e2a:	e0b6      	b.n	18000f9a <_malloc_r+0x232>
18000e2c:	2b00      	cmp	r3, #0
18000e2e:	db00      	blt.n	18000e32 <_malloc_r+0xca>
18000e30:	e0b7      	b.n	18000fa2 <_malloc_r+0x23a>
18000e32:	68ed      	ldr	r5, [r5, #12]
18000e34:	42a9      	cmp	r1, r5
18000e36:	d1f3      	bne.n	18000e20 <_malloc_r+0xb8>
18000e38:	2501      	movs	r5, #1
18000e3a:	44a8      	add	r8, r5
18000e3c:	1c39      	adds	r1, r7, #0
18000e3e:	3108      	adds	r1, #8
18000e40:	688d      	ldr	r5, [r1, #8]
18000e42:	42a9      	cmp	r1, r5
18000e44:	d100      	bne.n	18000e48 <_malloc_r+0xe0>
18000e46:	e089      	b.n	18000f5c <_malloc_r+0x1f4>
18000e48:	686a      	ldr	r2, [r5, #4]
18000e4a:	2303      	movs	r3, #3
18000e4c:	439a      	bics	r2, r3
18000e4e:	1b13      	subs	r3, r2, r4
18000e50:	4693      	mov	fp, r2
18000e52:	2b0f      	cmp	r3, #15
18000e54:	dd00      	ble.n	18000e58 <_malloc_r+0xf0>
18000e56:	e130      	b.n	180010ba <_malloc_r+0x352>
18000e58:	60c9      	str	r1, [r1, #12]
18000e5a:	6089      	str	r1, [r1, #8]
18000e5c:	2b00      	cmp	r3, #0
18000e5e:	db00      	blt.n	18000e62 <_malloc_r+0xfa>
18000e60:	e0ae      	b.n	18000fc0 <_malloc_r+0x258>
18000e62:	4b9a      	ldr	r3, [pc, #616]	; (180010cc <_malloc_r+0x364>)
18000e64:	459b      	cmp	fp, r3
18000e66:	d855      	bhi.n	18000f14 <_malloc_r+0x1ac>
18000e68:	08d2      	lsrs	r2, r2, #3
18000e6a:	1093      	asrs	r3, r2, #2
18000e6c:	2001      	movs	r0, #1
18000e6e:	4098      	lsls	r0, r3
18000e70:	00d2      	lsls	r2, r2, #3
18000e72:	687b      	ldr	r3, [r7, #4]
18000e74:	18ba      	adds	r2, r7, r2
18000e76:	4303      	orrs	r3, r0
18000e78:	6890      	ldr	r0, [r2, #8]
18000e7a:	60ea      	str	r2, [r5, #12]
18000e7c:	60a8      	str	r0, [r5, #8]
18000e7e:	60c5      	str	r5, [r0, #12]
18000e80:	6095      	str	r5, [r2, #8]
18000e82:	4645      	mov	r5, r8
18000e84:	10aa      	asrs	r2, r5, #2
18000e86:	2001      	movs	r0, #1
18000e88:	4090      	lsls	r0, r2
18000e8a:	607b      	str	r3, [r7, #4]
18000e8c:	4298      	cmp	r0, r3
18000e8e:	d86c      	bhi.n	18000f6a <_malloc_r+0x202>
18000e90:	4203      	tst	r3, r0
18000e92:	d10c      	bne.n	18000eae <_malloc_r+0x146>
18000e94:	2203      	movs	r2, #3
18000e96:	4395      	bics	r5, r2
18000e98:	1c2a      	adds	r2, r5, #0
18000e9a:	3204      	adds	r2, #4
18000e9c:	0040      	lsls	r0, r0, #1
18000e9e:	4690      	mov	r8, r2
18000ea0:	4203      	tst	r3, r0
18000ea2:	d104      	bne.n	18000eae <_malloc_r+0x146>
18000ea4:	2204      	movs	r2, #4
18000ea6:	0040      	lsls	r0, r0, #1
18000ea8:	4490      	add	r8, r2
18000eaa:	4218      	tst	r0, r3
18000eac:	d0fa      	beq.n	18000ea4 <_malloc_r+0x13c>
18000eae:	2303      	movs	r3, #3
18000eb0:	469a      	mov	sl, r3
18000eb2:	4645      	mov	r5, r8
18000eb4:	00eb      	lsls	r3, r5, #3
18000eb6:	19db      	adds	r3, r3, r7
18000eb8:	469b      	mov	fp, r3
18000eba:	469c      	mov	ip, r3
18000ebc:	46c1      	mov	r9, r8
18000ebe:	4662      	mov	r2, ip
18000ec0:	68d5      	ldr	r5, [r2, #12]
18000ec2:	45ac      	cmp	ip, r5
18000ec4:	d107      	bne.n	18000ed6 <_malloc_r+0x16e>
18000ec6:	e10b      	b.n	180010e0 <_malloc_r+0x378>
18000ec8:	2b00      	cmp	r3, #0
18000eca:	db00      	blt.n	18000ece <_malloc_r+0x166>
18000ecc:	e11a      	b.n	18001104 <_malloc_r+0x39c>
18000ece:	68ed      	ldr	r5, [r5, #12]
18000ed0:	45ac      	cmp	ip, r5
18000ed2:	d100      	bne.n	18000ed6 <_malloc_r+0x16e>
18000ed4:	e104      	b.n	180010e0 <_malloc_r+0x378>
18000ed6:	686a      	ldr	r2, [r5, #4]
18000ed8:	4653      	mov	r3, sl
18000eda:	439a      	bics	r2, r3
18000edc:	1b13      	subs	r3, r2, r4
18000ede:	2b0f      	cmp	r3, #15
18000ee0:	ddf2      	ble.n	18000ec8 <_malloc_r+0x160>
18000ee2:	2001      	movs	r0, #1
18000ee4:	192a      	adds	r2, r5, r4
18000ee6:	4304      	orrs	r4, r0
18000ee8:	68af      	ldr	r7, [r5, #8]
18000eea:	606c      	str	r4, [r5, #4]
18000eec:	68ec      	ldr	r4, [r5, #12]
18000eee:	60fc      	str	r4, [r7, #12]
18000ef0:	60a7      	str	r7, [r4, #8]
18000ef2:	4318      	orrs	r0, r3
18000ef4:	60ca      	str	r2, [r1, #12]
18000ef6:	608a      	str	r2, [r1, #8]
18000ef8:	6050      	str	r0, [r2, #4]
18000efa:	60d1      	str	r1, [r2, #12]
18000efc:	1c30      	adds	r0, r6, #0
18000efe:	6091      	str	r1, [r2, #8]
18000f00:	50d3      	str	r3, [r2, r3]
18000f02:	f000 f9b1 	bl	18001268 <__malloc_unlock>
18000f06:	1c28      	adds	r0, r5, #0
18000f08:	3008      	adds	r0, #8
18000f0a:	e740      	b.n	18000d8e <_malloc_r+0x26>
18000f0c:	08e0      	lsrs	r0, r4, #3
18000f0e:	4680      	mov	r8, r0
18000f10:	00c1      	lsls	r1, r0, #3
18000f12:	e774      	b.n	18000dfe <_malloc_r+0x96>
18000f14:	0a53      	lsrs	r3, r2, #9
18000f16:	2b04      	cmp	r3, #4
18000f18:	d900      	bls.n	18000f1c <_malloc_r+0x1b4>
18000f1a:	e106      	b.n	1800112a <_malloc_r+0x3c2>
18000f1c:	0993      	lsrs	r3, r2, #6
18000f1e:	3338      	adds	r3, #56	; 0x38
18000f20:	469a      	mov	sl, r3
18000f22:	00d8      	lsls	r0, r3, #3
18000f24:	19c0      	adds	r0, r0, r7
18000f26:	6883      	ldr	r3, [r0, #8]
18000f28:	4684      	mov	ip, r0
18000f2a:	4563      	cmp	r3, ip
18000f2c:	d100      	bne.n	18000f30 <_malloc_r+0x1c8>
18000f2e:	e12e      	b.n	1800118e <_malloc_r+0x426>
18000f30:	685a      	ldr	r2, [r3, #4]
18000f32:	2003      	movs	r0, #3
18000f34:	4382      	bics	r2, r0
18000f36:	4593      	cmp	fp, r2
18000f38:	d20b      	bcs.n	18000f52 <_malloc_r+0x1ea>
18000f3a:	2203      	movs	r2, #3
18000f3c:	4692      	mov	sl, r2
18000f3e:	e005      	b.n	18000f4c <_malloc_r+0x1e4>
18000f40:	6858      	ldr	r0, [r3, #4]
18000f42:	1c02      	adds	r2, r0, #0
18000f44:	4650      	mov	r0, sl
18000f46:	4382      	bics	r2, r0
18000f48:	4593      	cmp	fp, r2
18000f4a:	d202      	bcs.n	18000f52 <_malloc_r+0x1ea>
18000f4c:	689b      	ldr	r3, [r3, #8]
18000f4e:	459c      	cmp	ip, r3
18000f50:	d1f6      	bne.n	18000f40 <_malloc_r+0x1d8>
18000f52:	68da      	ldr	r2, [r3, #12]
18000f54:	60ea      	str	r2, [r5, #12]
18000f56:	60ab      	str	r3, [r5, #8]
18000f58:	60dd      	str	r5, [r3, #12]
18000f5a:	6095      	str	r5, [r2, #8]
18000f5c:	4645      	mov	r5, r8
18000f5e:	10aa      	asrs	r2, r5, #2
18000f60:	2001      	movs	r0, #1
18000f62:	687b      	ldr	r3, [r7, #4]
18000f64:	4090      	lsls	r0, r2
18000f66:	4298      	cmp	r0, r3
18000f68:	d992      	bls.n	18000e90 <_malloc_r+0x128>
18000f6a:	68bd      	ldr	r5, [r7, #8]
18000f6c:	2203      	movs	r2, #3
18000f6e:	686b      	ldr	r3, [r5, #4]
18000f70:	4393      	bics	r3, r2
18000f72:	469b      	mov	fp, r3
18000f74:	1b1b      	subs	r3, r3, r4
18000f76:	2b0f      	cmp	r3, #15
18000f78:	dd24      	ble.n	18000fc4 <_malloc_r+0x25c>
18000f7a:	455c      	cmp	r4, fp
18000f7c:	d822      	bhi.n	18000fc4 <_malloc_r+0x25c>
18000f7e:	2201      	movs	r2, #1
18000f80:	1c21      	adds	r1, r4, #0
18000f82:	4311      	orrs	r1, r2
18000f84:	192c      	adds	r4, r5, r4
18000f86:	4313      	orrs	r3, r2
18000f88:	6069      	str	r1, [r5, #4]
18000f8a:	1c30      	adds	r0, r6, #0
18000f8c:	60bc      	str	r4, [r7, #8]
18000f8e:	6063      	str	r3, [r4, #4]
18000f90:	f000 f96a 	bl	18001268 <__malloc_unlock>
18000f94:	1c28      	adds	r0, r5, #0
18000f96:	3008      	adds	r0, #8
18000f98:	e6f9      	b.n	18000d8e <_malloc_r+0x26>
18000f9a:	2301      	movs	r3, #1
18000f9c:	425b      	negs	r3, r3
18000f9e:	4498      	add	r8, r3
18000fa0:	e74a      	b.n	18000e38 <_malloc_r+0xd0>
18000fa2:	68eb      	ldr	r3, [r5, #12]
18000fa4:	68a9      	ldr	r1, [r5, #8]
18000fa6:	18aa      	adds	r2, r5, r2
18000fa8:	60cb      	str	r3, [r1, #12]
18000faa:	6099      	str	r1, [r3, #8]
18000fac:	6851      	ldr	r1, [r2, #4]
18000fae:	2301      	movs	r3, #1
18000fb0:	430b      	orrs	r3, r1
18000fb2:	1c30      	adds	r0, r6, #0
18000fb4:	6053      	str	r3, [r2, #4]
18000fb6:	f000 f957 	bl	18001268 <__malloc_unlock>
18000fba:	1c28      	adds	r0, r5, #0
18000fbc:	3008      	adds	r0, #8
18000fbe:	e6e6      	b.n	18000d8e <_malloc_r+0x26>
18000fc0:	18aa      	adds	r2, r5, r2
18000fc2:	e7f3      	b.n	18000fac <_malloc_r+0x244>
18000fc4:	4842      	ldr	r0, [pc, #264]	; (180010d0 <_malloc_r+0x368>)
18000fc6:	4943      	ldr	r1, [pc, #268]	; (180010d4 <_malloc_r+0x36c>)
18000fc8:	6803      	ldr	r3, [r0, #0]
18000fca:	4680      	mov	r8, r0
18000fcc:	3310      	adds	r3, #16
18000fce:	191b      	adds	r3, r3, r4
18000fd0:	9301      	str	r3, [sp, #4]
18000fd2:	688b      	ldr	r3, [r1, #8]
18000fd4:	4689      	mov	r9, r1
18000fd6:	3301      	adds	r3, #1
18000fd8:	d005      	beq.n	18000fe6 <_malloc_r+0x27e>
18000fda:	9b01      	ldr	r3, [sp, #4]
18000fdc:	483e      	ldr	r0, [pc, #248]	; (180010d8 <_malloc_r+0x370>)
18000fde:	181a      	adds	r2, r3, r0
18000fe0:	4b3e      	ldr	r3, [pc, #248]	; (180010dc <_malloc_r+0x374>)
18000fe2:	401a      	ands	r2, r3
18000fe4:	9201      	str	r2, [sp, #4]
18000fe6:	9901      	ldr	r1, [sp, #4]
18000fe8:	1c30      	adds	r0, r6, #0
18000fea:	f000 f93f 	bl	1800126c <_sbrk_r>
18000fee:	1c01      	adds	r1, r0, #0
18000ff0:	4682      	mov	sl, r0
18000ff2:	3101      	adds	r1, #1
18000ff4:	d100      	bne.n	18000ff8 <_malloc_r+0x290>
18000ff6:	e0a1      	b.n	1800113c <_malloc_r+0x3d4>
18000ff8:	465b      	mov	r3, fp
18000ffa:	18ea      	adds	r2, r5, r3
18000ffc:	4552      	cmp	r2, sl
18000ffe:	d900      	bls.n	18001002 <_malloc_r+0x29a>
18001000:	e099      	b.n	18001136 <_malloc_r+0x3ce>
18001002:	4640      	mov	r0, r8
18001004:	6843      	ldr	r3, [r0, #4]
18001006:	9901      	ldr	r1, [sp, #4]
18001008:	18cb      	adds	r3, r1, r3
1800100a:	6043      	str	r3, [r0, #4]
1800100c:	4552      	cmp	r2, sl
1800100e:	d100      	bne.n	18001012 <_malloc_r+0x2aa>
18001010:	e101      	b.n	18001216 <_malloc_r+0x4ae>
18001012:	4648      	mov	r0, r9
18001014:	6881      	ldr	r1, [r0, #8]
18001016:	3101      	adds	r1, #1
18001018:	d100      	bne.n	1800101c <_malloc_r+0x2b4>
1800101a:	e109      	b.n	18001230 <_malloc_r+0x4c8>
1800101c:	4453      	add	r3, sl
1800101e:	1a9a      	subs	r2, r3, r2
18001020:	4643      	mov	r3, r8
18001022:	605a      	str	r2, [r3, #4]
18001024:	2307      	movs	r3, #7
18001026:	4650      	mov	r0, sl
18001028:	4003      	ands	r3, r0
1800102a:	d000      	beq.n	1800102e <_malloc_r+0x2c6>
1800102c:	e0a8      	b.n	18001180 <_malloc_r+0x418>
1800102e:	2380      	movs	r3, #128	; 0x80
18001030:	015b      	lsls	r3, r3, #5
18001032:	9a01      	ldr	r2, [sp, #4]
18001034:	1c30      	adds	r0, r6, #0
18001036:	1c11      	adds	r1, r2, #0
18001038:	4a27      	ldr	r2, [pc, #156]	; (180010d8 <_malloc_r+0x370>)
1800103a:	4451      	add	r1, sl
1800103c:	400a      	ands	r2, r1
1800103e:	1a9a      	subs	r2, r3, r2
18001040:	1c11      	adds	r1, r2, #0
18001042:	4691      	mov	r9, r2
18001044:	f000 f912 	bl	1800126c <_sbrk_r>
18001048:	1c43      	adds	r3, r0, #1
1800104a:	d100      	bne.n	1800104e <_malloc_r+0x2e6>
1800104c:	e0ec      	b.n	18001228 <_malloc_r+0x4c0>
1800104e:	4652      	mov	r2, sl
18001050:	1a80      	subs	r0, r0, r2
18001052:	4448      	add	r0, r9
18001054:	2301      	movs	r3, #1
18001056:	4318      	orrs	r0, r3
18001058:	4641      	mov	r1, r8
1800105a:	684b      	ldr	r3, [r1, #4]
1800105c:	4652      	mov	r2, sl
1800105e:	444b      	add	r3, r9
18001060:	604b      	str	r3, [r1, #4]
18001062:	60ba      	str	r2, [r7, #8]
18001064:	6050      	str	r0, [r2, #4]
18001066:	42bd      	cmp	r5, r7
18001068:	d012      	beq.n	18001090 <_malloc_r+0x328>
1800106a:	4658      	mov	r0, fp
1800106c:	280f      	cmp	r0, #15
1800106e:	d800      	bhi.n	18001072 <_malloc_r+0x30a>
18001070:	e0a6      	b.n	180011c0 <_malloc_r+0x458>
18001072:	465a      	mov	r2, fp
18001074:	2107      	movs	r1, #7
18001076:	3a0c      	subs	r2, #12
18001078:	438a      	bics	r2, r1
1800107a:	18a9      	adds	r1, r5, r2
1800107c:	2005      	movs	r0, #5
1800107e:	6048      	str	r0, [r1, #4]
18001080:	6088      	str	r0, [r1, #8]
18001082:	6868      	ldr	r0, [r5, #4]
18001084:	2101      	movs	r1, #1
18001086:	4001      	ands	r1, r0
18001088:	4311      	orrs	r1, r2
1800108a:	6069      	str	r1, [r5, #4]
1800108c:	2a0f      	cmp	r2, #15
1800108e:	d861      	bhi.n	18001154 <_malloc_r+0x3ec>
18001090:	4655      	mov	r5, sl
18001092:	4640      	mov	r0, r8
18001094:	6ac2      	ldr	r2, [r0, #44]	; 0x2c
18001096:	4293      	cmp	r3, r2
18001098:	d900      	bls.n	1800109c <_malloc_r+0x334>
1800109a:	62c3      	str	r3, [r0, #44]	; 0x2c
1800109c:	4641      	mov	r1, r8
1800109e:	6b0a      	ldr	r2, [r1, #48]	; 0x30
180010a0:	4293      	cmp	r3, r2
180010a2:	d94c      	bls.n	1800113e <_malloc_r+0x3d6>
180010a4:	630b      	str	r3, [r1, #48]	; 0x30
180010a6:	e04a      	b.n	1800113e <_malloc_r+0x3d6>
180010a8:	2b14      	cmp	r3, #20
180010aa:	d93a      	bls.n	18001122 <_malloc_r+0x3ba>
180010ac:	2b54      	cmp	r3, #84	; 0x54
180010ae:	d85e      	bhi.n	1800116e <_malloc_r+0x406>
180010b0:	0b23      	lsrs	r3, r4, #12
180010b2:	336e      	adds	r3, #110	; 0x6e
180010b4:	4698      	mov	r8, r3
180010b6:	00d9      	lsls	r1, r3, #3
180010b8:	e6a1      	b.n	18000dfe <_malloc_r+0x96>
180010ba:	2001      	movs	r0, #1
180010bc:	192a      	adds	r2, r5, r4
180010be:	4304      	orrs	r4, r0
180010c0:	606c      	str	r4, [r5, #4]
180010c2:	e716      	b.n	18000ef2 <_malloc_r+0x18a>
180010c4:	000001f7 	.word	0x000001f7
180010c8:	18001740 	.word	0x18001740
180010cc:	000001ff 	.word	0x000001ff
180010d0:	18001b84 	.word	0x18001b84
180010d4:	18001b40 	.word	0x18001b40
180010d8:	00000fff 	.word	0x00000fff
180010dc:	fffff000 	.word	0xfffff000
180010e0:	2201      	movs	r2, #1
180010e2:	4491      	add	r9, r2
180010e4:	464b      	mov	r3, r9
180010e6:	4652      	mov	r2, sl
180010e8:	4213      	tst	r3, r2
180010ea:	d06e      	beq.n	180011ca <_malloc_r+0x462>
180010ec:	3508      	adds	r5, #8
180010ee:	46ac      	mov	ip, r5
180010f0:	e6e5      	b.n	18000ebe <_malloc_r+0x156>
180010f2:	1c2b      	adds	r3, r5, #0
180010f4:	3308      	adds	r3, #8
180010f6:	68dd      	ldr	r5, [r3, #12]
180010f8:	42ab      	cmp	r3, r5
180010fa:	d000      	beq.n	180010fe <_malloc_r+0x396>
180010fc:	e65e      	b.n	18000dbc <_malloc_r+0x54>
180010fe:	3202      	adds	r2, #2
18001100:	4690      	mov	r8, r2
18001102:	e69b      	b.n	18000e3c <_malloc_r+0xd4>
18001104:	18aa      	adds	r2, r5, r2
18001106:	6851      	ldr	r1, [r2, #4]
18001108:	2301      	movs	r3, #1
1800110a:	430b      	orrs	r3, r1
1800110c:	6053      	str	r3, [r2, #4]
1800110e:	68eb      	ldr	r3, [r5, #12]
18001110:	68aa      	ldr	r2, [r5, #8]
18001112:	1c30      	adds	r0, r6, #0
18001114:	60d3      	str	r3, [r2, #12]
18001116:	609a      	str	r2, [r3, #8]
18001118:	f000 f8a6 	bl	18001268 <__malloc_unlock>
1800111c:	1c28      	adds	r0, r5, #0
1800111e:	3008      	adds	r0, #8
18001120:	e635      	b.n	18000d8e <_malloc_r+0x26>
18001122:	335b      	adds	r3, #91	; 0x5b
18001124:	4698      	mov	r8, r3
18001126:	00d9      	lsls	r1, r3, #3
18001128:	e669      	b.n	18000dfe <_malloc_r+0x96>
1800112a:	2b14      	cmp	r3, #20
1800112c:	d841      	bhi.n	180011b2 <_malloc_r+0x44a>
1800112e:	335b      	adds	r3, #91	; 0x5b
18001130:	469a      	mov	sl, r3
18001132:	00d8      	lsls	r0, r3, #3
18001134:	e6f6      	b.n	18000f24 <_malloc_r+0x1bc>
18001136:	42bd      	cmp	r5, r7
18001138:	d100      	bne.n	1800113c <_malloc_r+0x3d4>
1800113a:	e762      	b.n	18001002 <_malloc_r+0x29a>
1800113c:	68bd      	ldr	r5, [r7, #8]
1800113e:	686a      	ldr	r2, [r5, #4]
18001140:	2303      	movs	r3, #3
18001142:	439a      	bics	r2, r3
18001144:	1b13      	subs	r3, r2, r4
18001146:	2b0f      	cmp	r3, #15
18001148:	dc0d      	bgt.n	18001166 <_malloc_r+0x3fe>
1800114a:	1c30      	adds	r0, r6, #0
1800114c:	f000 f88c 	bl	18001268 <__malloc_unlock>
18001150:	2000      	movs	r0, #0
18001152:	e61c      	b.n	18000d8e <_malloc_r+0x26>
18001154:	1c29      	adds	r1, r5, #0
18001156:	3108      	adds	r1, #8
18001158:	1c30      	adds	r0, r6, #0
1800115a:	f7ff fd31 	bl	18000bc0 <_free_r>
1800115e:	4642      	mov	r2, r8
18001160:	6853      	ldr	r3, [r2, #4]
18001162:	68bd      	ldr	r5, [r7, #8]
18001164:	e795      	b.n	18001092 <_malloc_r+0x32a>
18001166:	4294      	cmp	r4, r2
18001168:	d800      	bhi.n	1800116c <_malloc_r+0x404>
1800116a:	e708      	b.n	18000f7e <_malloc_r+0x216>
1800116c:	e7ed      	b.n	1800114a <_malloc_r+0x3e2>
1800116e:	22aa      	movs	r2, #170	; 0xaa
18001170:	0052      	lsls	r2, r2, #1
18001172:	4293      	cmp	r3, r2
18001174:	d815      	bhi.n	180011a2 <_malloc_r+0x43a>
18001176:	0be3      	lsrs	r3, r4, #15
18001178:	3377      	adds	r3, #119	; 0x77
1800117a:	4698      	mov	r8, r3
1800117c:	00d9      	lsls	r1, r3, #3
1800117e:	e63e      	b.n	18000dfe <_malloc_r+0x96>
18001180:	2208      	movs	r2, #8
18001182:	2180      	movs	r1, #128	; 0x80
18001184:	1ad3      	subs	r3, r2, r3
18001186:	0149      	lsls	r1, r1, #5
18001188:	449a      	add	sl, r3
1800118a:	185b      	adds	r3, r3, r1
1800118c:	e751      	b.n	18001032 <_malloc_r+0x2ca>
1800118e:	4650      	mov	r0, sl
18001190:	1082      	asrs	r2, r0, #2
18001192:	2001      	movs	r0, #1
18001194:	4090      	lsls	r0, r2
18001196:	1c02      	adds	r2, r0, #0
18001198:	6878      	ldr	r0, [r7, #4]
1800119a:	4302      	orrs	r2, r0
1800119c:	607a      	str	r2, [r7, #4]
1800119e:	1c1a      	adds	r2, r3, #0
180011a0:	e6d8      	b.n	18000f54 <_malloc_r+0x1ec>
180011a2:	4a2f      	ldr	r2, [pc, #188]	; (18001260 <_malloc_r+0x4f8>)
180011a4:	4293      	cmp	r3, r2
180011a6:	d928      	bls.n	180011fa <_malloc_r+0x492>
180011a8:	21fc      	movs	r1, #252	; 0xfc
180011aa:	227e      	movs	r2, #126	; 0x7e
180011ac:	0089      	lsls	r1, r1, #2
180011ae:	4690      	mov	r8, r2
180011b0:	e625      	b.n	18000dfe <_malloc_r+0x96>
180011b2:	2b54      	cmp	r3, #84	; 0x54
180011b4:	d826      	bhi.n	18001204 <_malloc_r+0x49c>
180011b6:	0b13      	lsrs	r3, r2, #12
180011b8:	336e      	adds	r3, #110	; 0x6e
180011ba:	469a      	mov	sl, r3
180011bc:	00d8      	lsls	r0, r3, #3
180011be:	e6b1      	b.n	18000f24 <_malloc_r+0x1bc>
180011c0:	2301      	movs	r3, #1
180011c2:	4651      	mov	r1, sl
180011c4:	604b      	str	r3, [r1, #4]
180011c6:	4655      	mov	r5, sl
180011c8:	e7b9      	b.n	1800113e <_malloc_r+0x3d6>
180011ca:	465b      	mov	r3, fp
180011cc:	4645      	mov	r5, r8
180011ce:	e000      	b.n	180011d2 <_malloc_r+0x46a>
180011d0:	3d01      	subs	r5, #1
180011d2:	4652      	mov	r2, sl
180011d4:	4215      	tst	r5, r2
180011d6:	d036      	beq.n	18001246 <_malloc_r+0x4de>
180011d8:	1c1a      	adds	r2, r3, #0
180011da:	3a08      	subs	r2, #8
180011dc:	6893      	ldr	r3, [r2, #8]
180011de:	4293      	cmp	r3, r2
180011e0:	d0f6      	beq.n	180011d0 <_malloc_r+0x468>
180011e2:	687b      	ldr	r3, [r7, #4]
180011e4:	0040      	lsls	r0, r0, #1
180011e6:	4298      	cmp	r0, r3
180011e8:	d900      	bls.n	180011ec <_malloc_r+0x484>
180011ea:	e6be      	b.n	18000f6a <_malloc_r+0x202>
180011ec:	2800      	cmp	r0, #0
180011ee:	d100      	bne.n	180011f2 <_malloc_r+0x48a>
180011f0:	e6bb      	b.n	18000f6a <_malloc_r+0x202>
180011f2:	4218      	tst	r0, r3
180011f4:	d02b      	beq.n	1800124e <_malloc_r+0x4e6>
180011f6:	46c8      	mov	r8, r9
180011f8:	e65b      	b.n	18000eb2 <_malloc_r+0x14a>
180011fa:	0ca3      	lsrs	r3, r4, #18
180011fc:	337c      	adds	r3, #124	; 0x7c
180011fe:	4698      	mov	r8, r3
18001200:	00d9      	lsls	r1, r3, #3
18001202:	e5fc      	b.n	18000dfe <_malloc_r+0x96>
18001204:	20aa      	movs	r0, #170	; 0xaa
18001206:	0040      	lsls	r0, r0, #1
18001208:	4283      	cmp	r3, r0
1800120a:	d814      	bhi.n	18001236 <_malloc_r+0x4ce>
1800120c:	0bd3      	lsrs	r3, r2, #15
1800120e:	3377      	adds	r3, #119	; 0x77
18001210:	469a      	mov	sl, r3
18001212:	00d8      	lsls	r0, r3, #3
18001214:	e686      	b.n	18000f24 <_malloc_r+0x1bc>
18001216:	0510      	lsls	r0, r2, #20
18001218:	d000      	beq.n	1800121c <_malloc_r+0x4b4>
1800121a:	e6fa      	b.n	18001012 <_malloc_r+0x2aa>
1800121c:	68bd      	ldr	r5, [r7, #8]
1800121e:	4459      	add	r1, fp
18001220:	2201      	movs	r2, #1
18001222:	430a      	orrs	r2, r1
18001224:	606a      	str	r2, [r5, #4]
18001226:	e734      	b.n	18001092 <_malloc_r+0x32a>
18001228:	2100      	movs	r1, #0
1800122a:	2001      	movs	r0, #1
1800122c:	4689      	mov	r9, r1
1800122e:	e713      	b.n	18001058 <_malloc_r+0x2f0>
18001230:	4651      	mov	r1, sl
18001232:	6081      	str	r1, [r0, #8]
18001234:	e6f6      	b.n	18001024 <_malloc_r+0x2bc>
18001236:	480a      	ldr	r0, [pc, #40]	; (18001260 <_malloc_r+0x4f8>)
18001238:	4283      	cmp	r3, r0
1800123a:	d90c      	bls.n	18001256 <_malloc_r+0x4ee>
1800123c:	20fc      	movs	r0, #252	; 0xfc
1800123e:	227e      	movs	r2, #126	; 0x7e
18001240:	0080      	lsls	r0, r0, #2
18001242:	4692      	mov	sl, r2
18001244:	e66e      	b.n	18000f24 <_malloc_r+0x1bc>
18001246:	687b      	ldr	r3, [r7, #4]
18001248:	4383      	bics	r3, r0
1800124a:	607b      	str	r3, [r7, #4]
1800124c:	e7ca      	b.n	180011e4 <_malloc_r+0x47c>
1800124e:	2504      	movs	r5, #4
18001250:	44a9      	add	r9, r5
18001252:	0040      	lsls	r0, r0, #1
18001254:	e7cd      	b.n	180011f2 <_malloc_r+0x48a>
18001256:	0c93      	lsrs	r3, r2, #18
18001258:	337c      	adds	r3, #124	; 0x7c
1800125a:	469a      	mov	sl, r3
1800125c:	00d8      	lsls	r0, r3, #3
1800125e:	e661      	b.n	18000f24 <_malloc_r+0x1bc>
18001260:	00000554 	.word	0x00000554

18001264 <__malloc_lock>:
18001264:	4770      	bx	lr
18001266:	46c0      	nop			; (mov r8, r8)

18001268 <__malloc_unlock>:
18001268:	4770      	bx	lr
1800126a:	46c0      	nop			; (mov r8, r8)

1800126c <_sbrk_r>:
1800126c:	b538      	push	{r3, r4, r5, lr}
1800126e:	4c07      	ldr	r4, [pc, #28]	; (1800128c <_sbrk_r+0x20>)
18001270:	2300      	movs	r3, #0
18001272:	1c05      	adds	r5, r0, #0
18001274:	6023      	str	r3, [r4, #0]
18001276:	1c08      	adds	r0, r1, #0
18001278:	f7ff f848 	bl	1800030c <_sbrk>
1800127c:	1c43      	adds	r3, r0, #1
1800127e:	d000      	beq.n	18001282 <_sbrk_r+0x16>
18001280:	bd38      	pop	{r3, r4, r5, pc}
18001282:	6823      	ldr	r3, [r4, #0]
18001284:	2b00      	cmp	r3, #0
18001286:	d0fb      	beq.n	18001280 <_sbrk_r+0x14>
18001288:	602b      	str	r3, [r5, #0]
1800128a:	e7f9      	b.n	18001280 <_sbrk_r+0x14>
1800128c:	18001bb8 	.word	0x18001bb8
18001290:	70616548 	.word	0x70616548
18001294:	646e6120 	.word	0x646e6120
18001298:	61747320 	.word	0x61747320
1800129c:	63206b63 	.word	0x63206b63
180012a0:	696c6c6f 	.word	0x696c6c6f
180012a4:	6e6f6973 	.word	0x6e6f6973
180012a8:	0000000a 	.word	0x0000000a
180012ac:	642f2e2e 	.word	0x642f2e2e
180012b0:	65766972 	.word	0x65766972
180012b4:	432f7372 	.word	0x432f7372
180012b8:	5565726f 	.word	0x5565726f
180012bc:	61545241 	.word	0x61545241
180012c0:	632f6270 	.word	0x632f6270
180012c4:	5f65726f 	.word	0x5f65726f
180012c8:	74726175 	.word	0x74726175
180012cc:	6270615f 	.word	0x6270615f
180012d0:	0000632e 	.word	0x0000632e

180012d4 <_global_impure_ptr>:
180012d4:	18001318 00000043                       ....C...

180012dc <__EH_FRAME_BEGIN__>:
180012dc:	00000000                                ....

180012e0 <_init>:
180012e0:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
180012e2:	46c0      	nop			; (mov r8, r8)
180012e4:	bcf8      	pop	{r3, r4, r5, r6, r7}
180012e6:	bc08      	pop	{r3}
180012e8:	469e      	mov	lr, r3
180012ea:	4770      	bx	lr

180012ec <_fini>:
180012ec:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
180012ee:	46c0      	nop			; (mov r8, r8)
180012f0:	bcf8      	pop	{r3, r4, r5, r6, r7}
180012f2:	bc08      	pop	{r3}
180012f4:	469e      	mov	lr, r3
180012f6:	4770      	bx	lr

180012f8 <__frame_dummy_init_array_entry>:
180012f8:	0029 1800                                   )...

180012fc <__do_global_dtors_aux_fini_array_entry>:
180012fc:	0001 1800                                   ....
