Actel Designer Software
Version: 10.0.20.2
Release: v10.0 SP2

Info: The design SF_Zi1.adb was last modified by software version 10.0.20.2.
Opened an existing Libero design SF_Zi1.adb.
'BA_NAME' set to 'SF_Zi1_ba'
'IDE_DESIGNERVIEW_NAME' set to 'Impl3'
'IDE_DESIGNERVIEW_COUNT' set to '3'
'IDE_DESIGNERVIEW_REV0' set to 'Impl1'
'IDE_DESIGNERVIEW_REVNUM0' set to '1'
'IDE_DESIGNERVIEW_REV1' set to 'Impl2'
'IDE_DESIGNERVIEW_REVNUM1' set to '2'
'IDE_DESIGNERVIEW_REV2' set to 'Impl3'
'IDE_DESIGNERVIEW_REVNUM2' set to '3'
'IDE_DESIGNERVIEW_ROOTDIR' set to 'C:\Libero 10.1\LPF_AC382_DF\A2F200\zeroization\designer'
'IDE_DESIGNERVIEW_LASTREV' set to '3'
***** Layout Variables *********************************************

Mode: TIMING_DRIVEN
Power-driven Layout: OFF
Incremental Placement: OFF
Incremental Route: OFF


Info: I/O Bank Assigner detected (1) out of (6) I/O Bank(s) with locked I/O technologies.

Running I/O Bank Assigner.

I/O Bank Assigner completed successfully.
 

Planning global net placement...


Global net placement completed successfully.


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Timing-driven Placer Started: Mon Jul 30 14:45:50 2012



Placer Finished: Mon Jul 30 14:46:22 2012

Total Placer CPU Time:     00:00:32



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Timing-driven Router 

Design: SF_Zi1                          Started: Mon Jul 30 14:46:27 2012



 

Iterative improvement...



Timing-driven Router completed successfully.



Design: SF_Zi1                          

Finished: Mon Jul 30 14:46:48 2012

Total CPU Time:     00:00:20            Total Elapsed Time: 00:00:21

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Loading the Timing data for the design.
Finished loading the Timing data.
TIMER: Max delay timing requirements have been met.
TIMER: Min delay timing requirements have been met.

The Layout command succeeded ( 00:01:07 )
Wrote status report to file: SF_Zi1_place_and_route_report.txt

The Report command succeeded ( 00:00:00 )
Wrote globalnet report to file: SF_Zi1_globalnet_report.txt

The Report command succeeded ( 00:00:00 )
Wrote globalusage report to file: SF_Zi1_globalusage_report.txt

The Report command succeeded ( 00:00:01 )
Wrote iobank report to file: SF_Zi1_iobank_report.txt

The Report command succeeded ( 00:00:00 )
Design saved to file C:\Libero 10.1\LPF_AC382_DF\A2F200\zeroization\designer\impl3\SF_Zi1.adb.

The Execute Script command succeeded ( 00:01:10 )
Design closed.

