C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\bin\m_proasic.exe  -prodtype synplify_pro -encrypt  -pro  -rundir  C:\LPF_AC382_DF\A2F500\zeroization\synthesis  -part A2F500M3G  -package FBGA484  -grade STD   -globalthreshold 50 -maxfan 24 -opcond COMWC     -report_path 0       -summaryfile C:\LPF_AC382_DF\A2F500\zeroization\synthesis\synlog\report\SF_Zi1_fpga_mapper.xml -top_level_module  SF_Zi1  -flow mapping  -mp 1 -prjfile  C:\LPF_AC382_DF\A2F500\zeroization\synthesis\scratchproject.prs  -implementation synthesis -licensetype  synplifypro_actel  -oedif  C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.edn  -freq 100.000  -tcl  C:\LPF_AC382_DF\A2F500\zeroization\component\work\SF_Zi1_MSS\mss_tshell_syn.sdc  C:\LPF_AC382_DF\A2F500\zeroization\synthesis\synwork\SF_Zi1_premap.srd  -sap  C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.sap  -otap  C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.tap  -omap  C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.map  -devicelib  C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.v  -sap  C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.sap  -ologparam  C:\LPF_AC382_DF\A2F500\zeroization\synthesis\syntmp\SF_Zi1.plg  -osyn  C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.srm  -prjdir  C:\LPF_AC382_DF\A2F500\zeroization\synthesis\  -prjname  SF_Zi1_syn  -log  C:\LPF_AC382_DF\A2F500\zeroization\synthesis\synlog\SF_Zi1_fpga_mapper.srr 
rc:1 success:1
C:\LPF_AC382_DF\A2F500\zeroization\synthesis\scratchproject.prs|o|1353301113|3730
C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.edn|o|1353301155|1267383
C:\LPF_AC382_DF\A2F500\zeroization\component\work\SF_Zi1_MSS\mss_tshell_syn.sdc|i|1330337780|190
C:\LPF_AC382_DF\A2F500\zeroization\synthesis\synwork\SF_Zi1_premap.srd|i|1353301125|80837
C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.sap|o|1353301125|8127
C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.tap|o|0|0
C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.map|o|1353301156|28
C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\lib\proasic\smartfusion.v|i|1339996216|72817
C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.sap|o|1353301125|8127
C:\LPF_AC382_DF\A2F500\zeroization\synthesis\syntmp\SF_Zi1.plg|o|1353301156|1734
C:\LPF_AC382_DF\A2F500\zeroization\synthesis\SF_Zi1.srm|o|1353301152|995599
C:\LPF_AC382_DF\A2F500\zeroization\synthesis\synlog\SF_Zi1_fpga_mapper.srr|o|1353301156|29857
C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\bin\m_proasic.exe|i|1340167048|13099520
C:\Microsemi\Libero_v10.1\Synopsys\synplify_F201203MSP1\bin64\m_proasic.exe|i|1340167062|15745024
