Synopsys Actel Technology Mapper, Version map201109rcp1, Build 024R, Built Sep 28 2011 11:20:53
Copyright (C) 1994-2011, Synopsys, Inc. This software the associated documentation are confidential and proprietary to Synopsys, Inc. Your use or disclosure of this software subject to the terms and conditions of a written license agreement between you, or your company, and Synopsys, Inc.
Product Version F-2011.09M

Mapper Startup Complete (Time elapsed 0h:00m:00s; Memory used current: 48MB peak: 49MB)

Reading constraint file: C:\Libero 10.1\LPF_AC382_DF\A2F200\zeroization\component\work\SF_Zi1_MSS\mss_tshell_syn.sdc
@N: MF249 |Running in 32-bit mode.
@N: MF258 |Gated clock conversion disabled 
@N: MF547 |Generated clock conversion disabled 

Design Input Complete (Time elapsed 0h:00m:00s; Memory used current: 50MB peak: 51MB)


Mapper Initialization Complete (Time elapsed 0h:00m:00s; Memory used current: 50MB peak: 51MB)


Finished Pre Mapping Phase. (Time elapsed 0h:00m:00s; Memory used current: 56MB peak: 58MB)

@N: BN225 |Writing default property annotation file C:\Libero 10.1\LPF_AC382_DF\A2F200\zeroization\synthesis\SF_Zi1.sap.
Pre Mapping successful!

At Mapper Exit (Time elapsed 0h:00m:00s; Memory used current: 24MB peak: 58MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Mon Jul 30 14:45:07 2012

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