Synopsys Actel Technology Mapper, Version map201109rcp1, Build 024R, Built Sep 28 2011 11:20:53
Copyright (C) 1994-2011, Synopsys, Inc. This software the associated documentation are confidential and proprietary to Synopsys, Inc. Your use or disclosure of this software subject to the terms and conditions of a written license agreement between you, or your company, and Synopsys, Inc.
Product Version F-2011.09M

Mapper Startup Complete (Time elapsed 0h:00m:00s; Memory used current: 48MB peak: 49MB)

@N:MF249 :  | Running in 32-bit mode. 
@N:MF258 :  | Gated clock conversion disabled  
@N:MF547 :  | Generated clock conversion disabled  

Design Input Complete (Time elapsed 0h:00m:00s; Memory used current: 48MB peak: 49MB)


Mapper Initialization Complete (Time elapsed 0h:00m:00s; Memory used current: 48MB peak: 49MB)


Finished Pre Mapping Phase. (Time elapsed 0h:00m:00s; Memory used current: 54MB peak: 56MB)

@N:BN225 :  | Writing default property annotation file D:\DATA\POR\Libero_SoC\POR_PPR_AGL1000_CNT\POR_PPR_AGL1000_CNT\synthesis\top.sap. 
Pre Mapping successful!

At Mapper Exit (Time elapsed 0h:00m:00s; Memory used current: 22MB peak: 56MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Wed Jan 25 20:45:57 2012

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