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<?xml-stylesheet href="rptstyle.xsl" type="text/xsl" ?>
<doc>
<title>Timing Violation Report Min Delay Analysis
</title>
<text>SmartTime Version 11.3.0.112</text>
<text>Microsemi Corporation - Microsemi Libero Software Release v11.3 (Version 11.3.0.112)</text>
<text>Date: Fri Apr 18 10:01:22 2014
</text>
<table>
<header>
</header>
<row>
 <cell>Design</cell>
 <cell>IGLOO2_Oversampling_top</cell>
</row>
<row>
 <cell>Family</cell>
 <cell>IGLOO2</cell>
</row>
<row>
 <cell>Die</cell>
 <cell>M2GL010T</cell>
</row>
<row>
 <cell>Package</cell>
 <cell>484 FBGA</cell>
</row>
<row>
 <cell>Temperature</cell>
 <cell>COM</cell>
</row>
<row>
 <cell>Voltage</cell>
 <cell>COM</cell>
</row>
<row>
 <cell>Speed Grade</cell>
 <cell>-1</cell>
</row>
<row>
 <cell>Design State</cell>
 <cell>Post-Layout</cell>
</row>
<row>
 <cell>Data source</cell>
 <cell>Preliminary</cell>
</row>
<row>
 <cell>Min Operating Condition</cell>
 <cell>BEST</cell>
</row>
<row>
 <cell>Max Operating Condition</cell>
 <cell>WORST</cell>
</row>
<row>
 <cell>Scenario for Timing Analysis</cell>
 <cell>Primary</cell>
</row>
</table>
<text></text>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>IGLOO2_Oversampling_0/CORERESETP_0/count_sdif0_enable:CLK</cell>
 <cell>IGLOO2_Oversampling_0/CORERESETP_0/count_sdif0_enable_q1:D</cell>
 <cell>0.383</cell>
 <cell>-0.352</cell>
 <cell>1.300</cell>
 <cell>1.652</cell>
</row>
</table>
<text></text>
</doc>
