<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<?xml-stylesheet href="rptstyle.xsl" type="text/xsl" ?>
<doc>
<table>
<header>
</header>
<row>
 <cell>Design</cell>
 <cell>IGLOO2_Oversampling_top</cell>
</row>
<row>
 <cell>Family</cell>
 <cell>IGLOO2</cell>
</row>
<row>
 <cell>Die</cell>
 <cell>M2GL010T</cell>
</row>
<row>
 <cell>Package</cell>
 <cell>484 FBGA</cell>
</row>
<row>
 <cell>Temperature</cell>
 <cell>COM</cell>
</row>
<row>
 <cell>Voltage</cell>
 <cell>COM</cell>
</row>
<row>
 <cell>Speed Grade</cell>
 <cell>-1</cell>
</row>
<row>
 <cell>Design State</cell>
 <cell>Post-Layout</cell>
</row>
<row>
 <cell>Data source</cell>
 <cell>Preliminary</cell>
</row>
<row>
 <cell>Min Operating Condition</cell>
 <cell>BEST</cell>
</row>
<row>
 <cell>Max Operating Condition</cell>
 <cell>WORST</cell>
</row>
<row>
 <cell>Scenario for Timing Analysis</cell>
 <cell>Primary</cell>
</row>
</table>
<text></text>
<section>
<name>Summary</name>
<table>
<header>
 <cell>Clock Domain</cell>
 <cell>Period (ns)</cell>
 <cell>Frequency (MHz)</cell>
 <cell>Required Period (ns)</cell>
 <cell>Required Frequency (MHz)</cell>
 <cell>External Setup (ns)</cell>
 <cell>External Hold (ns)</cell>
 <cell>Min Clock-To-Out (ns)</cell>
 <cell>Max Clock-To-Out (ns)</cell>
</header>
<row>
 <cell>CLK0</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>FCCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>3.546</cell>
 <cell>282.008</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>2.715</cell>
 <cell>-1.327</cell>
 <cell>3.458</cell>
 <cell>5.742</cell>
</row>
<row>
 <cell>FCCC_0/CCC_INST/INST_CCC_IP:GL1</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>FCCC_GL0</cell>
 <cell>7.827</cell>
 <cell>127.763</cell>
 <cell>20.000</cell>
 <cell>50.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>IGLOO2_Oversampling_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell>3.913</cell>
 <cell>255.558</cell>
 <cell>20.000</cell>
 <cell>50.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>IGLOO2_Oversampling_0/IGLOO2_Oversampling_HPMS_0/MSS_ADLIB_INST/INST_MSS_010_IP:CLK_CONFIG_APB</cell>
 <cell>6.978</cell>
 <cell>143.308</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>SERDES_IF_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK_1</cell>
 <cell>4.638</cell>
 <cell>215.610</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>FCCC_GL1</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>8.482</cell>
 <cell>117.897</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>EPCS_TX_CLK</cell>
 <cell>2.266</cell>
 <cell>441.306</cell>
 <cell>8.482</cell>
 <cell>117.897</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>EPCS_RX_CLK</cell>
 <cell>1.916</cell>
 <cell>521.921</cell>
 <cell>8.482</cell>
 <cell>117.897</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
<text></text>
<table>
<header>
 <cell></cell>
 <cell>Min Delay (ns)</cell>
 <cell>Max Delay (ns)</cell>
</header>
<row>
 <cell>Input to Output</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
</section>
</doc>
