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K3
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cModel Technology
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Ecoef_ram
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Z4 dD:\Mathblock\SF2 DSP Application Notes\DSP Reference Guide\Ref. Guide Design Examples\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\simulation
Z5 8D:/Mathblock/SF2 DSP Application Notes/DSP Reference Guide/Ref. Guide Design Examples/VHDL/Filters/Single MAC FIR Filters/Symmetric_MAC_FIR_Filter/synthesis/Symmetric_MAC_FIR.vhd
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Z10 !s107 D:/Mathblock/SF2 DSP Application Notes/DSP Reference Guide/Ref. Guide Design Examples/VHDL/Filters/Single MAC FIR Filters/Symmetric_MAC_FIR_Filter/synthesis/Symmetric_MAC_FIR.vhd|
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Adef_arch
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R2
R3
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L1820
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31
R8
R9
R10
R11
!s100 ^F=kh]2WY0TRMSXNh6FN^0
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Ecoef_ram_coef_ram_0_uram
R1
R2
R3
R4
R5
R6
l0
L1658
VH92<A^CWL8mTibbeSbEP;3
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31
R8
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!s100 E<K_3`_Q_I0BCjEM?_YVO3
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Adef_arch
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R3
R12
l1729
L1668
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R7
31
R8
R9
R10
R11
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Einp_ram
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R2
R3
R4
R5
R6
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L1125
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31
R8
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Adef_arch
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R2
R3
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l1193
L1152
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R7
31
R8
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R10
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Einp_ram1
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R2
R3
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L336
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31
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R10
R11
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Adef_arch
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R3
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l388
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R7
31
R8
R9
R10
R11
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Einp_ram1_inp_ram1_0_uram
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R4
R5
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L8
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31
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Adef_arch
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R3
R16
l108
L27
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R7
31
R8
R9
R10
R11
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Einp_ram_inp_ram_0_uram
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R2
R3
R4
R5
R6
l0
L483
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R7
31
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R9
R10
R11
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Adef_arch
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R3
R14
l624
L510
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R7
31
R8
R9
R10
R11
!s100 8o=F`c^EL4cCZ[nW`Z^211
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Emulacc_18x18
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R2
R3
R4
R5
R6
l0
L1553
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R7
31
R8
R9
R10
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!s100 @7TAa7;oB[K<AfA6lU:NA1
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Adef_arch
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R2
R3
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R7
31
R8
R9
R10
R11
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!i10b 1
Emulacc_18x18_mulacc_18x18_0_hard_mult_acc
R1
R2
R3
R4
R5
R6
l0
L1327
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R7
31
R8
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R10
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!i10b 1
Adef_arch
R2
R3
R18
l1419
L1340
VcgbQMaUIWMma`SeJbV73O3
R7
31
R8
R9
R10
R11
!s100 ZMDZD><?P9?i8AFjIZ=`g0
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Esymmetric_mac_fir
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R2
R3
R4
R5
R6
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L1881
VD:QnYOzAoa4c31GEA=8mI0
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R8
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R10
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Adef_arch
R13
R19
R15
R17
R2
R3
DEx4 work 17 symmetric_mac_fir 0 22 D:QnYOzAoa4c31GEA=8mI0
l2355
L1894
Vc^2mCi5Mc=3Z;XL=:fdFd3
R7
31
R8
R9
R10
R11
!s100 _=h43EUHJHlPRXc8o:nIi0
!i10b 1
Esymmetric_mac_fir_testbench
Z20 w1382551731
Z21 DPx4 ieee 15 std_logic_arith 0 22 4`Y?g_lkdn;7UL9IiJck01
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R2
R3
R4
Z23 8D:/Mathblock/SF2 DSP Application Notes/DSP Reference Guide/Ref. Guide Design Examples/VHDL/Filters/Single MAC FIR Filters/Symmetric_MAC_FIR_Filter/stimulus/Symmetric_MAC_FIR_Testbench.vhd
Z24 FD:/Mathblock/SF2 DSP Application Notes/DSP Reference Guide/Ref. Guide Design Examples/VHDL/Filters/Single MAC FIR Filters/Symmetric_MAC_FIR_Filter/stimulus/Symmetric_MAC_FIR_Testbench.vhd
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L21
VCd29?z`FA=iS?04?Va4F^1
!s100 ed>S:JkRbB1MEEHiD^8YA1
R7
31
!i10b 1
Z25 !s108 1382734882.535000
Z26 !s90 -reportprogress|300|-93|-explicit|-work|postsynth|D:/Mathblock/SF2 DSP Application Notes/DSP Reference Guide/Ref. Guide Design Examples/VHDL/Filters/Single MAC FIR Filters/Symmetric_MAC_FIR_Filter/stimulus/Symmetric_MAC_FIR_Testbench.vhd|
Z27 !s107 D:/Mathblock/SF2 DSP Application Notes/DSP Reference Guide/Ref. Guide Design Examples/VHDL/Filters/Single MAC FIR Filters/Symmetric_MAC_FIR_Filter/stimulus/Symmetric_MAC_FIR_Testbench.vhd|
R11
Asymmetric_macfir_testbench_arch
R21
R22
R2
R3
DEx4 work 27 symmetric_mac_fir_testbench 0 22 Cd29?z`FA=iS?04?Va4F^1
l49
L24
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R7
31
!i10b 1
R25
R26
R27
R11
