@W: CD638 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Extended Adder\Extended_adder_2_input\hdl\Extended_adder_2_input.vhd":69:7:69:7|Signal u is undriven 
@W: CD638 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Extended Adder\Extended_adder_2_input\hdl\Extended_adder_2_input.vhd":73:7:73:7|Signal c is undriven 
@W: CD638 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Extended Adder\Extended_adder_2_input\hdl\Extended_adder_2_input.vhd":74:7:74:8|Signal b0 is undriven 
@W: CD638 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Extended Adder\Extended_adder_2_input\hdl\Extended_adder_2_input.vhd":75:7:75:8|Signal a0 is undriven 

