#--  Synopsys, Inc.
#--  Version I-2013.09M-SP1 
#--  Project file D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Extended Adder\Extended_adder_2_input\synthesis\run_options.txt
#--  Written on Wed May 21 18:23:19 2014


#project files
add_file -vhdl -lib work "D:/DSP reference guide/DSP Reference Guide/Ref. Guide Design Examples/Liberov11.3/VHDL/Extended Adder/Extended_adder_2_input/component/work/dotp_multadd/dotp_multadd_0/dotp_multadd_dotp_multadd_0_HARD_MULT_ADDSUB.vhd"
add_file -vhdl -lib work "D:/DSP reference guide/DSP Reference Guide/Ref. Guide Design Examples/Liberov11.3/VHDL/Extended Adder/Extended_adder_2_input/component/work/dotp_multadd/dotp_multadd.vhd"
add_file -vhdl -lib work "D:/DSP reference guide/DSP Reference Guide/Ref. Guide Design Examples/Liberov11.3/VHDL/Extended Adder/Extended_adder_2_input/hdl/Extended_adder_2_input.vhd"



#implementation: "synthesis"
impl -add synthesis -type fpga

#device options
set_option -technology SmartFusion2
set_option -part M2S050T
set_option -package FBGA896
set_option -speed_grade STD
set_option -part_companion ""

#compilation/mapping options
set_option -use_fsm_explorer 0
set_option -top_module "work.Extended_adder_2_input"

# mapper_options
set_option -frequency 100.000
set_option -write_verilog 0
set_option -write_vhdl 0
set_option -srs_instrumentation 1

# actel_options
set_option -RWCheckOnRam 0

# Microsemi G4
set_option -run_prop_extract 1
set_option -maxfan 10000
set_option -disable_io_insertion 0
set_option -opcond COMWC
set_option -retiming 0
set_option -report_path 0
set_option -update_models_cp 0
set_option -preserve_registers 0

# sequential_optimization_options
set_option -symbolic_fsm_compiler 1

# Compiler Options
set_option -compiler_compatible 0
set_option -resource_sharing 1

# Compiler Options
set_option -auto_infer_blackbox 0

# Compiler Options
set_option -vhdl2008 1

#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_file "./Extended_adder_2_input.edn"
impl -active "synthesis"
