--------------------------------------------------------------------------------
-- Company:
--
-- File: Accumulator_TestBench.vhd
--
-- File history:
--
-- Description	  : Provides stimuls vectors to the Accumulator_TestBench
--				
-- Targeted device: Family		:: SmartFusion2  
-- 					  Die		:: M2S050T
--					  Package	:: 896 FBGA
--		Author	  : PHANIKIRAN T
--------------------------------------------------------------------------------


LIBRARY IEEE;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.ALL;

ENTITY Accumulator_88bit_TestBench IS
END Accumulator_88bit_TestBench;

ARCHITECTURE behavioral OF Accumulator_88bit_TestBench IS



COMPONENT Accumulator_88bit IS
PORT (
    CLK 		: IN STD_LOGIC;
    RSTN 		: IN STD_LOGIC;

-- Input
	LD_88b_IN	: IN STD_LOGIC_VECTOR(87 DOWNTO 0);
-- Output
   	RESULT	 	: OUT STD_LOGIC_VECTOR(87 DOWNTO 0)
	);
END COMPONENT Accumulator_88bit;

CONSTANT clk_period : time := 10 ns;

SIGNAL clk			: STD_LOGIC:= '0';
SIGNAL reset_n		: STD_LOGIC:= '0';

SIGNAL CARRYIN_T	: STD_LOGIC;

SIGNAL LD_88b_IN	: STD_LOGIC_VECTOR(87 DOWNTO 0):= (OTHERS=> '0');

SIGNAL RESULT		: STD_LOGIC_VECTOR(87 DOWNTO 0);

SIGNAL stop 		: STD_LOGIC := '0';	


BEGIN


UUT: Accumulator_88bit
		port map(	

				CLK 	=> CLK,
				RSTN 	=> reset_n,

				-- Input
				LD_88b_IN 	=> LD_88b_IN,

				-- Output
			   	RESULT	 	=> RESULT,
				CARRYIN_T	=> CARRYIN_T

         		);

--- Clock and Reset Generation 

 clk_proc : PROCESS
   			BEGIN
				IF(stop = '0')THEN
					clk <= '0';
    			    WAIT FOR clk_period/2;
					clk <= '1';
					WAIT FOR clk_period/2;
				ELSE
					clk <= '0';
				END IF;
			END PROCESS;

 stim_proc: PROCESS
			BEGIN
				reset_n <='0';
					WAIT FOR 20 ns;
				reset_n	<='1';
					WAIT;
			END PROCESS;


PROCESS
BEGIN
		WAIT UNTIL(reset_n ='1');
		WAIT UNTIL rising_edge(clk);
		 
		LD_88b_IN	<= x"000000000000EDCBA94321";--FEDCBA987654321

		WAIT UNTIL rising_edge(clk);
		WAIT FOR 1000 ns;
		WAIT UNTIL rising_edge(clk);
			stop <=  '1';
		
		report "TEST FINISHED!"
		severity failure;
		--wait;
END PROCESS;

end behavioral;

