Project Settings
Project Name | MAC_FIR_syn | Implementation Name | synthesis
Top Module | work.MAC_FIR | Retiming | 0
Resource Sharing | 1 | Fanout Guide | 10000
Disable I/O Insertion | 0 | FSM Compiler | 1
Run Status
Job Name | Status |  |  |  | CPU Time | Real Time | Memory | Date/Time
Compile Input | Complete | 21 | 101 | 0 | - | 0m:00s | - | 5/21/2014 7:41:08 PM
Pre-mapping | Complete | 3 | 1 | 0 | 0m:00s | 0m:00s | 134MB | 5/21/2014 7:41:09 PM
Map & Optimize | Complete | 11 | 2 | 0 | 0m:01s | 0m:01s | 135MB | 5/21/2014 7:41:11 PM
Area Summary
Carry Cells | 8 | Sequential Cells | 216
DSP Blocks (MACC) (dsp_used) | 1 | I/O Cells | 67
Global Clock Buffers | 2 | Block Rams (RAM64x18) (v_ram) | 4
LUTs (total_luts) | 182 |  |
Timing Summary
Clock Name | Req Freq | Est Freq | Slack
--- | --- | --- | ---
MAC_FIR|clk | 327.7 MHz | 278.5 MHz | -0.538
System | 1.0 MHz | 1.0 MHz | 1.538
Optimizations Summary
Combined Clock Conversion | 1 / 0 |  |