--------------------------------------------------------------------------------
-- Company:
--
-- File: BarrelShifter_testbench.vhd
--
-- File history:
--
-- Description	  : Provides stimuls vectors to the Barrel shifter
--				
-- Targeted device: Family		:: SmartFusion2  
-- 					  Die		:: M2S050T
--					  Package	:: 896 FBGA
--		Author	  : PHANIKIRAN T
--------------------------------------------------------------------------------


LIBRARY IEEE;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.ALL;

ENTITY BarrelShifter_testbench IS
END BarrelShifter_testbench;

ARCHITECTURE behavioral OF BarrelShifter_testbench IS



COMPONENT BarrelShifter_18bit IS
PORT (
    CLK 		: IN STD_LOGIC;
    RSTN 		: IN STD_LOGIC;
	INA 		: IN STD_LOGIC_VECTOR(17 DOWNTO 0);
   	SHIFT_OP	: OUT STD_LOGIC_VECTOR(17 DOWNTO 0)
);
END COMPONENT BarrelShifter_18bit;

CONSTANT clk_period : time := 10 ns;

SIGNAL clk		: STD_LOGIC:= '0';
SIGNAL reset_n	: STD_LOGIC:= '0';

SIGNAL SHIFT_INP: STD_LOGIC_VECTOR(17 downto 0);
SIGNAL SHIFT_OP	: STD_LOGIC_VECTOR(17 downto 0);

SIGNAL stop 	: STD_LOGIC := '0';	


BEGIN


UUT: BarrelShifter_18bit
		port map(	
				CLK 		=> clk,
			    RSTN 		=> reset_n,
				INA 		=> SHIFT_INP,
   				SHIFT_OP 	=> SHIFT_OP
         );

--- Clock and Reset Generation 

 clk_proc :PROCESS
   BEGIN
		IF(stop = '0')THEN
	        clk <= '0';
    	    WAIT FOR clk_period/2;
        	clk <= '1';
	        WAIT FOR clk_period/2;
		ELSE
			clk <= '0';
		END IF;
 	END PROCESS;

  stim_proc: PROCESS
   BEGIN
        reset_n <='0';
        WAIT FOR 20 ns;
        reset_n	<='1';
        WAIT;
  END PROCESS;



PROCESS
BEGIN
		WAIT UNTIL(reset_n ='1');
		WAIT UNTIL rising_edge(clk);
		SHIFT_INP	<= "111100110010101101";--3CCADh
		WAIT UNTIL rising_edge(clk);
		WAIT UNTIL rising_edge(clk);
		SHIFT_INP	<= "011001010110101111";--195AFh
		WAIT UNTIL rising_edge(clk);
		WAIT FOR 500 ns;
		WAIT UNTIL rising_edge(clk);
			stop <=  '1';
		
		report "TEST FINISHED!"
		severity failure;
		--wait;
END PROCESS;

end behavioral;

