report \
    -type     timing \
    -analysis max \
    -format   xml \
    {D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Parallel FIR Filters\Systolic FIR Filter\Systolic_FIR_Filter\designer\Systolic_FIR_Filter\Systolic_FIR_Filter_maxdelay_timing_report.xml}
report \
    -type     timing \
    -analysis min \
    -format   xml \
    {D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Parallel FIR Filters\Systolic FIR Filter\Systolic_FIR_Filter\designer\Systolic_FIR_Filter\Systolic_FIR_Filter_mindelay_timing_report.xml}
report \
    -type     timing_violations \
    -analysis max \
    -format   xml \
    {D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Parallel FIR Filters\Systolic FIR Filter\Systolic_FIR_Filter\designer\Systolic_FIR_Filter\Systolic_FIR_Filter_maxdelay_timing_violations_report.xml}
report \
    -type     timing_violations \
    -analysis min \
    -format   xml \
    {D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Parallel FIR Filters\Systolic FIR Filter\Systolic_FIR_Filter\designer\Systolic_FIR_Filter\Systolic_FIR_Filter_mindelay_timing_violations_report.xml}
set has_violations {D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Parallel FIR Filters\Systolic FIR Filter\Systolic_FIR_Filter\designer\Systolic_FIR_Filter\Systolic_FIR_Filter_has_violations}
set fp [open $has_violations w]
puts $fp [has_violations -short]
close $fp
