@N|Running in 64-bit mode
@N: CD720 :"C:\Microsemi\Libero_v11.3\Synopsys\synplify_I201309MSP1\lib\vhd\std.vhd":123:18:123:21|Setting time resolution to ns
@N:"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Wide Multiplier\Mult32x32\hdl\Mult32x32_SingleMACC.vhd":23:7:23:26|Top entity is set to Mult32x32_SingleMACC.
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Wide Multiplier\Mult32x32\hdl\Mult32x32_SingleMACC.vhd":23:7:23:26|Synthesizing work.mult32x32_singlemacc.mult32x32_sf2_arch 
@N: CD231 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Wide Multiplier\Mult32x32\hdl\Mult32x32_SingleMACC.vhd":67:12:67:13|Using onehot encoding for type state (idle="100000000")
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Wide Multiplier\Mult32x32\component\work\acc_0\acc_0.vhd":17:7:17:11|Synthesizing work.acc_0.rtl 
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Wide Multiplier\Mult32x32\component\work\acc_0\acc_0_0\acc_0_acc_0_0_HARD_MULT_ACC.vhd":8:7:8:33|Synthesizing work.acc_0_acc_0_0_hard_mult_acc.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v11.3\Synopsys\synplify_I201309MSP1\lib\generic\smartfusion2.vhd":575:10:575:12|Synthesizing smartfusion2.vcc.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v11.3\Synopsys\synplify_I201309MSP1\lib\generic\smartfusion2.vhd":569:10:569:12|Synthesizing smartfusion2.gnd.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v11.3\Synopsys\synplify_I201309MSP1\lib\generic\smartfusion2.vhd":695:10:695:13|Synthesizing smartfusion2.macc.syn_black_box 
@N: CL201 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Wide Multiplier\Mult32x32\hdl\Mult32x32_SingleMACC.vhd":98:7:98:8|Trying to extract state machine for register Curr_State

