@N|Running in 64-bit mode
@N: CD720 :"C:\Microsemi\Libero_v11.3\Synopsys\synplify_I201309MSP1\lib\vhd2008\std.vhd":146:18:146:21|Setting time resolution to ns
@N:"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\hdl\Symmetric_MAC_FIR.vhd":21:7:21:23|Top entity is set to Symmetric_MAC_FIR.
@N: CD231 :"C:\Microsemi\Libero_v11.3\Synopsys\synplify_I201309MSP1\lib\vhd2008\std1164.vhd":913:16:913:17|Using onehot encoding for type mvl9plus ('U'="1000000000")
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\hdl\Symmetric_MAC_FIR.vhd":21:7:21:23|Synthesizing work.symmetric_mac_fir.symmetric_mac_fir_arch 
@N: CD231 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\hdl\Symmetric_MAC_FIR.vhd":149:11:149:12|Using onehot encoding for type state (mac_idle="100000")
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\component\work\Inp_RAM1\Inp_RAM1.vhd":17:7:17:14|Synthesizing work.inp_ram1.rtl 
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\component\work\Inp_RAM1\Inp_RAM1_0\Inp_RAM1_Inp_RAM1_0_URAM.vhd":8:7:8:30|Synthesizing work.inp_ram1_inp_ram1_0_uram.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v11.3\Synopsys\synplify_I201309MSP1\lib\generic\smartfusion2.vhd":620:10:620:17|Synthesizing smartfusion2.ram64x18.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v11.3\Synopsys\synplify_I201309MSP1\lib\generic\smartfusion2.vhd":575:10:575:12|Synthesizing smartfusion2.vcc.syn_black_box 
@N: CD630 :"C:\Microsemi\Libero_v11.3\Synopsys\synplify_I201309MSP1\lib\generic\smartfusion2.vhd":569:10:569:12|Synthesizing smartfusion2.gnd.syn_black_box 
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\component\work\Inp_RAM\Inp_RAM.vhd":17:7:17:13|Synthesizing work.inp_ram.rtl 
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\component\work\Inp_RAM\Inp_RAM_0\Inp_RAM_Inp_RAM_0_URAM.vhd":8:7:8:28|Synthesizing work.inp_ram_inp_ram_0_uram.def_arch 
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\component\work\Coef_RAM\Coef_RAM.vhd":17:7:17:14|Synthesizing work.coef_ram.rtl 
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\component\work\Coef_RAM\Coef_RAM_0\Coef_RAM_Coef_RAM_0_URAM.vhd":8:7:8:30|Synthesizing work.coef_ram_coef_ram_0_uram.def_arch 
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\component\work\mulacc_18x18\mulacc_18x18.vhd":17:7:17:18|Synthesizing work.mulacc_18x18.rtl 
@N: CD630 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\component\work\mulacc_18x18\mulacc_18x18_0\mulacc_18x18_mulacc_18x18_0_HARD_MULT_ACC.vhd":8:7:8:47|Synthesizing work.mulacc_18x18_mulacc_18x18_0_hard_mult_acc.def_arch 
@N: CD630 :"C:\Microsemi\Libero_v11.3\Synopsys\synplify_I201309MSP1\lib\generic\smartfusion2.vhd":695:10:695:13|Synthesizing smartfusion2.macc.syn_black_box 
@N: CL201 :"D:\DSP reference guide\DSP Reference Guide\Ref. Guide Design Examples\Liberov11.3\VHDL\Filters\Single MAC FIR Filters\Symmetric_MAC_FIR_Filter\hdl\Symmetric_MAC_FIR.vhd":293:1:293:2|Trying to extract state machine for register mac_state

