@N: MF248 |Running in 64-bit mode.
@N: MF667 |Clock conversion disabled 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":461:4:461:9|Removing sequential instance MDDR_PENABLE of view:PrimLib.dffr(prim) in hierarchy view:work.CoreConfigP_Z18(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":461:4:461:9|Removing sequential instance FDDR_PENABLE of view:PrimLib.dffr(prim) in hierarchy view:work.CoreConfigP_Z18(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":461:4:461:9|Removing sequential instance SDIF0_PENABLE of view:PrimLib.dffr(prim) in hierarchy view:work.CoreConfigP_Z18(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":461:4:461:9|Removing sequential instance SDIF2_PENABLE of view:PrimLib.dffr(prim) in hierarchy view:work.CoreConfigP_Z18(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":461:4:461:9|Removing sequential instance SDIF3_PENABLE of view:PrimLib.dffr(prim) in hierarchy view:work.CoreConfigP_Z18(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance DDR_READY_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":589:9:589:14|Removing sequential instance genblk1\.MST_RDGNT_NUM[0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":470:3:470:8|Removing sequential instance rd_wen_flag of view:PrimLib.dffre(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":492:3:492:8|Removing sequential instance rd_ren_flag of view:PrimLib.dffre(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wresp_channel.v":459:3:459:8|Removing sequential instance BID_IM_1[5:4] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_wresp_channel_Z5(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance FDDR_CORE_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1170:4:1170:9|Removing sequential instance SDIF0_PHY_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1170:4:1170:9|Removing sequential instance SDIF0_CORE_RESET_N_0 of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1300:4:1300:9|Removing sequential instance SDIF2_PHY_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1300:4:1300:9|Removing sequential instance SDIF2_CORE_RESET_N_0 of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1365:4:1365:9|Removing sequential instance SDIF3_PHY_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1365:4:1365:9|Removing sequential instance SDIF3_CORE_RESET_N_0 of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance SDIF_READY_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance genblk1\.AWLEN_S[3:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_slave_stage_Z17(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance genblk1\.AWLOCK_S[1:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_slave_stage_Z17(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance genblk1\.AWCACHE_S[3:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_slave_stage_Z17(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance genblk1\.AWPROT_S[2:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_slave_stage_Z17(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":575:9:575:14|Removing sequential instance genblk1\.WID_S[5:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_slave_stage_Z17(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance genblk1\.ARLOCK_S[1:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_slave_stage_Z17(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance genblk1\.ARCACHE_S[3:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_slave_stage_Z17(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance genblk1\.ARPROT_S[2:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_slave_stage_Z17(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1170:4:1170:9|Removing sequential instance sdif0_state[3:0] of view:PrimLib.statemachine(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1300:4:1300:9|Removing sequential instance sdif2_state[3:0] of view:PrimLib.statemachine(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1365:4:1365:9|Removing sequential instance sdif3_state[3:0] of view:PrimLib.statemachine(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":797:4:797:9|Removing sequential instance sdif0_areset_n_clk_base of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":825:4:825:9|Removing sequential instance sdif2_areset_n_clk_base of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":839:4:839:9|Removing sequential instance sdif3_areset_n_clk_base of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":797:4:797:9|Removing sequential instance sdif0_areset_n_q1 of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":825:4:825:9|Removing sequential instance sdif2_areset_n_q1 of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":839:4:839:9|Removing sequential instance sdif3_areset_n_q1 of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z19(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wd_channel.v":320:3:320:8|Removing sequential instance genblk1\.WID_IS[5:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_wd_channel_Z11(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":506:3:506:8|Removing sequential instance AWLEN_IS[3:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_wrmatrix_4Mto1S_Z10(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":506:3:506:8|Removing sequential instance AWLOCK_IS[1:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_wrmatrix_4Mto1S_Z10(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":506:3:506:8|Removing sequential instance AWCACHE_IS[3:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_wrmatrix_4Mto1S_Z10(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":506:3:506:8|Removing sequential instance AWPROT_IS[2:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_wrmatrix_4Mto1S_Z10(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":524:3:524:8|Removing sequential instance ARLOCK_IS[1:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":524:3:524:8|Removing sequential instance ARCACHE_IS[3:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":524:3:524:8|Removing sequential instance ARPROT_IS[2:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":553:9:553:14|Removing sequential instance genblk1\.AWLEN_IS_int[3:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_wrmatrix_4Mto1S_Z10(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":553:9:553:14|Removing sequential instance genblk1\.AWLOCK_IS_int[1:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_wrmatrix_4Mto1S_Z10(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":553:9:553:14|Removing sequential instance genblk1\.AWCACHE_IS_int[3:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_wrmatrix_4Mto1S_Z10(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":553:9:553:14|Removing sequential instance genblk1\.AWPROT_IS_int[2:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_wrmatrix_4Mto1S_Z10(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":589:9:589:14|Removing sequential instance genblk1\.ARLOCK_IS_int[1:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":589:9:589:14|Removing sequential instance genblk1\.ARCACHE_IS_int[3:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":589:9:589:14|Removing sequential instance genblk1\.ARPROT_IS_int[2:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":2086:3:2086:8|Removing sequential instance WID_MI_1[1:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_master_stage_Z16(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":2086:3:2086:8|Removing sequential instance WID_MI_1[5:4] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_master_stage_Z16(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":1395:9:1395:14|Removing sequential instance genblk4\.WID_M_INPFF1[1:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_master_stage_Z16(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":1395:9:1395:14|Removing sequential instance genblk4\.WID_M_INPFF1[5:4] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_master_stage_Z16(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":1255:9:1255:14|Removing sequential instance genblk4\.AWLEN_M_INPFF1[3:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_master_stage_Z16(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":1255:9:1255:14|Removing sequential instance genblk4\.AWCACHE_M_INPFF1[3:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_master_stage_Z16(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":1255:9:1255:14|Removing sequential instance genblk4\.AWPROT_M_INPFF1[2:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_master_stage_Z16(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":1255:9:1255:14|Removing sequential instance genblk4\.ARCACHE_M_INPFF1[3:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_master_stage_Z16(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\pcie_with_axi_slave\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":1255:9:1255:14|Removing sequential instance genblk4\.ARPROT_M_INPFF1[2:0] of view:PrimLib.dffre(prim) in hierarchy view:work.axi_master_stage_Z16(verilog) because there are no references to its outputs 
@N: BN225 |Writing default property annotation file D:\Appsnotes\2014\AXI__update\design_file\Libero\PCIe_with_AXI_SLAVE\synthesis\Top_level.sap.
