@N: MF248 |Running in 64-bit mode.
@N: MF667 |Clock conversion disabled 
@N: FA239 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":1744:6:1744:9|ROM SLAVE_SELECT_WADDRCH_M_cnst[15:0] mapped in logic.
@N: FA239 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":1744:6:1744:9|ROM SLAVE_SELECT_WADDRCH_M_cnst[15:0] mapped in logic.
@N: MO106 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":1744:6:1744:9|Found ROM, 'SLAVE_SELECT_WADDRCH_M_cnst[15:0]', 16 words by 16 bits 
@N: FA239 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":1785:6:1785:9|ROM SLAVE_SELECT_RADDRCH_M_cnst[15:0] mapped in logic.
@N: FA239 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":1785:6:1785:9|ROM SLAVE_SELECT_RADDRCH_M_cnst[15:0] mapped in logic.
@N: MO106 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":1785:6:1785:9|Found ROM, 'SLAVE_SELECT_RADDRCH_M_cnst[15:0]', 16 words by 16 bits 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":1942:3:1942:8|Removing sequential instance SLAVE_SELECT_WADDRCH_M_r[15:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_wrmatrix_4Mto1S_Z10(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":470:3:470:8|Removing sequential instance rd_wdcntr[3:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":492:3:492:8|Removing sequential instance rd_rdcntr[3:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":1984:3:1984:8|Removing sequential instance SLAVE_SELECT_RADDRCH_M_r[15:0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_4Mto1S_Z14(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance COREAXI_0.genblk7\.slave_stage0.genblk1\.AWSIZE_S[2] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance COREAXI_0.genblk7\.slave_stage0.genblk1\.ARSIZE_S[2] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":1255:9:1255:14|Removing sequential instance COREAXI_0.genblk3\.master_stage0.genblk4\.AWSIZE_M_INPFF1[2] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":1255:9:1255:14|Removing sequential instance COREAXI_0.genblk3\.master_stage0.genblk4\.ARSIZE_M_INPFF1[2] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\hdl\axi_master_if.v":223:0:223:5|Removing sequential instance ARBURST[1] in hierarchy view:work.AXI_MASTER_IF_0s_1s_2s_3s_4294967292s_4294967293s_0s_1s_4294967294s_4294967295s_Z1(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\hdl\axi_master_if.v":98:0:98:5|Removing sequential instance AWBURST[1] in hierarchy view:work.AXI_MASTER_IF_0s_1s_2s_3s_4294967292s_4294967293s_0s_1s_4294967294s_4294967295s_Z1(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_16sto1m.v":586:3:586:8|Removing sequential instance RID_IM[0] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_16Sto1M_Z3(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_16sto1m.v":586:3:586:8|Removing sequential instance RID_IM[1] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_16Sto1M_Z3(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_16sto1m.v":586:3:586:8|Removing sequential instance RID_IM[4] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_16Sto1M_Z3(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_16sto1m.v":586:3:586:8|Removing sequential instance RID_IM[5] of view:PrimLib.dffr(prim) in hierarchy view:work.axi_rdmatrix_16Sto1M_Z3(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_ra_arbiter.v":568:3:568:8|Removing sequential instance m0_lock_clear_read of view:PrimLib.dffre(prim) in hierarchy view:work.axi_RA_ARBITER_Z13(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[16] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[17] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[18] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[19] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[20] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[21] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[22] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[23] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[24] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[25] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[26] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[27] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[28] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[29] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[30] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance pwdata[31] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance paddr[11] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":422:4:422:9|Removing sequential instance FIC_2_APB_M_PRDATA[16] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance paddr[16] in hierarchy view:work.CoreSF2Config(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2reset\3.0.100\rtl\vlog\core\coresf2reset.v":550:4:550:9|Removing sequential instance sm0_state[6] in hierarchy view:work.CoreSF2Reset_Z18(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":506:3:506:8|Removing sequential instance COREAXI_0.genblk2\.u_interconnect_ntom.genblk4\.inst_matrix_S0.inst_wa_channel.genblk1\.inst_wrmatrix_4Mto1S.AWSIZE_IS[2] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":524:3:524:8|Removing sequential instance COREAXI_0.genblk2\.u_interconnect_ntom.genblk4\.inst_matrix_S0.inst_ra_channel.genblk1\.inst_rdmatrix_4Mto1S.ARSIZE_IS[2] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coresf2config\3.0.100\rtl\vlog\core\coresf2config.v":150:4:150:9|Removing sequential instance SF2_FDDR_INIT_BLK_0.CORESF2CONFIG_0.paddr[14] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":506:3:506:8|Removing sequential instance COREAXI_0.genblk2\.u_interconnect_ntom.genblk4\.inst_matrix_S0.inst_wa_channel.genblk1\.inst_wrmatrix_4Mto1S.AWADDR_IS[28] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":524:3:524:8|Removing sequential instance COREAXI_0.genblk2\.u_interconnect_ntom.genblk4\.inst_matrix_S0.inst_ra_channel.genblk1\.inst_rdmatrix_4Mto1S.ARADDR_IS[28] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":589:9:589:14|Removing sequential instance COREAXI_0.genblk2\.u_interconnect_ntom.genblk4\.inst_matrix_S0.inst_ra_channel.genblk1\.inst_rdmatrix_4Mto1S.genblk1\.ARSIZE_IS_int[2] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":1255:9:1255:14|Removing sequential instance COREAXI_0.genblk3\.master_stage0.genblk4\.AWBURST_M_INPFF1[1] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_master_stage.v":1255:9:1255:14|Removing sequential instance COREAXI_0.genblk3\.master_stage0.genblk4\.ARBURST_M_INPFF1[1] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":589:9:589:14|Removing sequential instance COREAXI_0.genblk2\.u_interconnect_ntom.genblk4\.inst_matrix_S0.inst_ra_channel.genblk1\.inst_rdmatrix_4Mto1S.genblk1\.ARBURST_IS_int[1] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance COREAXI_0.genblk7\.slave_stage0.genblk1\.AWADDR_S[28] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance COREAXI_0.genblk7\.slave_stage0.genblk1\.ARADDR_S[28] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_wrmatrix_4mto1s.v":506:3:506:8|Removing sequential instance COREAXI_0.genblk2\.u_interconnect_ntom.genblk4\.inst_matrix_S0.inst_wa_channel.genblk1\.inst_wrmatrix_4Mto1S.AWBURST_IS[1] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_rdmatrix_4mto1s.v":524:3:524:8|Removing sequential instance COREAXI_0.genblk2\.u_interconnect_ntom.genblk4\.inst_matrix_S0.inst_ra_channel.genblk1\.inst_rdmatrix_4Mto1S.ARBURST_IS[1] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance COREAXI_0.genblk7\.slave_stage0.genblk1\.AWBURST_S[1] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: BN362 :"d:\appsnotes\2014\axi__update\design_file\libero\fabric_axi_master\component\actel\directcore\coreaxi\3.0.112\rtl\vlog\core\axi_slave_stage.v":497:9:497:14|Removing sequential instance COREAXI_0.genblk7\.slave_stage0.genblk1\.ARBURST_S[1] in hierarchy view:work.SF2_AXI_master_top(verilog) because there are no references to its outputs 
@N: FP130 |Promoting Net SF2_FDDR_INIT_BLK_0.CORESF2CONFIG_0_APB_S_PCLK on CLKINT  I_173 
@N: FP130 |Promoting Net SF2_FDDR_INIT_BLK_0_USER_FAB_RESET_N on CLKINT  I_174 
@N: FP130 |Promoting Net SF2_FDDR_INIT_BLK_0.CORESF2CONFIG_0_APB_S_PRESET_N on CLKINT  I_175 
@N: FP130 |Promoting Net SF2_FDDR_INIT_BLK_0.CORESF2RESET_0.sm0_areset_n_rcosc on CLKINT  I_176 
@N: BW103 |Synopsys Constraint File time units using default value of 1ns 
@N: BW107 |Synopsys Constraint File capacitance units using default value of 1pF 
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.
@N: MT322 |Clock constraints cover only FF-to-FF paths associated with the clock.
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.
@N: MT322 |Clock constraints cover only FF-to-FF paths associated with the clock.
